203 int error; 204 205 sc->sc_dev = dev; 206 207 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 208 MTX_DEF | MTX_RECURSE); 209 210 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); 211 mbufq_init(&sc->sc_snd, ifqmaxlen); 212 213 /* retrieve RT2560 rev. no */ 214 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 215 216 /* retrieve RF rev. no and various other things from EEPROM */ 217 rt2560_read_config(sc); 218 219 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 220 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 221 222 /* 223 * Allocate Tx and Rx rings. 224 */ 225 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 226 if (error != 0) { 227 device_printf(sc->sc_dev, "could not allocate Tx ring\n"); 228 goto fail1; 229 } 230 231 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 232 if (error != 0) { 233 device_printf(sc->sc_dev, "could not allocate ATIM ring\n"); 234 goto fail2; 235 } 236 237 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 238 if (error != 0) { 239 device_printf(sc->sc_dev, "could not allocate Prio ring\n"); 240 goto fail3; 241 } 242 243 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 244 if (error != 0) { 245 device_printf(sc->sc_dev, "could not allocate Beacon ring\n"); 246 goto fail4; 247 } 248 249 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 250 if (error != 0) { 251 device_printf(sc->sc_dev, "could not allocate Rx ring\n"); 252 goto fail5; 253 } 254 255 /* retrieve MAC address */ 256 rt2560_get_macaddr(sc, ic->ic_macaddr); 257 258 ic->ic_softc = sc; 259 ic->ic_name = device_get_nameunit(dev); 260 ic->ic_opmode = IEEE80211_M_STA; 261 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 262 263 /* set device capabilities */ 264 ic->ic_caps = 265 IEEE80211_C_STA /* station mode */ 266 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */ 267 | IEEE80211_C_HOSTAP /* hostap mode */ 268 | IEEE80211_C_MONITOR /* monitor mode */ 269 | IEEE80211_C_AHDEMO /* adhoc demo mode */ 270 | IEEE80211_C_WDS /* 4-address traffic works */ 271 | IEEE80211_C_MBSS /* mesh point link mode */ 272 | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 273 | IEEE80211_C_SHSLOT /* short slot time supported */ 274 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 275 | IEEE80211_C_BGSCAN /* capable of bg scanning */ 276#ifdef notyet 277 | IEEE80211_C_TXFRAG /* handle tx frags */ 278#endif 279 ; 280 281 memset(bands, 0, sizeof(bands)); 282 setbit(bands, IEEE80211_MODE_11B); 283 setbit(bands, IEEE80211_MODE_11G); 284 if (sc->rf_rev == RT2560_RF_5222) 285 setbit(bands, IEEE80211_MODE_11A); 286 ieee80211_init_channels(ic, NULL, bands); 287 288 ieee80211_ifattach(ic); 289 ic->ic_raw_xmit = rt2560_raw_xmit; 290 ic->ic_updateslot = rt2560_update_slot; 291 ic->ic_update_promisc = rt2560_update_promisc; 292 ic->ic_scan_start = rt2560_scan_start; 293 ic->ic_scan_end = rt2560_scan_end; 294 ic->ic_set_channel = rt2560_set_channel; 295 296 ic->ic_vap_create = rt2560_vap_create; 297 ic->ic_vap_delete = rt2560_vap_delete; 298 ic->ic_parent = rt2560_parent; 299 ic->ic_transmit = rt2560_transmit; 300 301 ieee80211_radiotap_attach(ic, 302 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 303 RT2560_TX_RADIOTAP_PRESENT, 304 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 305 RT2560_RX_RADIOTAP_PRESENT); 306 307 /* 308 * Add a few sysctl knobs. 309 */ 310#ifdef RAL_DEBUG 311 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 312 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 313 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs"); 314#endif 315 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 316 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 317 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)"); 318 319 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev), 320 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, 321 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)"); 322 323 if (bootverbose) 324 ieee80211_announce(ic); 325 326 return 0; 327 328fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 329fail4: rt2560_free_tx_ring(sc, &sc->prioq); 330fail3: rt2560_free_tx_ring(sc, &sc->atimq); 331fail2: rt2560_free_tx_ring(sc, &sc->txq); 332fail1: mtx_destroy(&sc->sc_mtx); 333 334 return ENXIO; 335} 336 337int 338rt2560_detach(void *xsc) 339{ 340 struct rt2560_softc *sc = xsc; 341 struct ieee80211com *ic = &sc->sc_ic; 342 343 rt2560_stop(sc); 344 345 ieee80211_ifdetach(ic); 346 mbufq_drain(&sc->sc_snd); 347 348 rt2560_free_tx_ring(sc, &sc->txq); 349 rt2560_free_tx_ring(sc, &sc->atimq); 350 rt2560_free_tx_ring(sc, &sc->prioq); 351 rt2560_free_tx_ring(sc, &sc->bcnq); 352 rt2560_free_rx_ring(sc, &sc->rxq); 353 354 mtx_destroy(&sc->sc_mtx); 355 356 return 0; 357} 358 359static struct ieee80211vap * 360rt2560_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 361 enum ieee80211_opmode opmode, int flags, 362 const uint8_t bssid[IEEE80211_ADDR_LEN], 363 const uint8_t mac[IEEE80211_ADDR_LEN]) 364{ 365 struct rt2560_softc *sc = ic->ic_softc; 366 struct rt2560_vap *rvp; 367 struct ieee80211vap *vap; 368 369 switch (opmode) { 370 case IEEE80211_M_STA: 371 case IEEE80211_M_IBSS: 372 case IEEE80211_M_AHDEMO: 373 case IEEE80211_M_MONITOR: 374 case IEEE80211_M_HOSTAP: 375 case IEEE80211_M_MBSS: 376 /* XXXRP: TBD */ 377 if (!TAILQ_EMPTY(&ic->ic_vaps)) { 378 device_printf(sc->sc_dev, "only 1 vap supported\n"); 379 return NULL; 380 } 381 if (opmode == IEEE80211_M_STA) 382 flags |= IEEE80211_CLONE_NOBEACONS; 383 break; 384 case IEEE80211_M_WDS: 385 if (TAILQ_EMPTY(&ic->ic_vaps) || 386 ic->ic_opmode != IEEE80211_M_HOSTAP) { 387 device_printf(sc->sc_dev, 388 "wds only supported in ap mode\n"); 389 return NULL; 390 } 391 /* 392 * Silently remove any request for a unique 393 * bssid; WDS vap's always share the local 394 * mac address. 395 */ 396 flags &= ~IEEE80211_CLONE_BSSID; 397 break; 398 default: 399 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode); 400 return NULL; 401 } 402 rvp = malloc(sizeof(struct rt2560_vap), M_80211_VAP, M_WAITOK | M_ZERO); 403 vap = &rvp->ral_vap; 404 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid); 405 406 /* override state transition machine */ 407 rvp->ral_newstate = vap->iv_newstate; 408 vap->iv_newstate = rt2560_newstate; 409 vap->iv_update_beacon = rt2560_beacon_update; 410 411 ieee80211_ratectl_init(vap); 412 /* complete setup */ 413 ieee80211_vap_attach(vap, ieee80211_media_change, 414 ieee80211_media_status, mac); 415 if (TAILQ_FIRST(&ic->ic_vaps) == vap) 416 ic->ic_opmode = opmode; 417 return vap; 418} 419 420static void 421rt2560_vap_delete(struct ieee80211vap *vap) 422{ 423 struct rt2560_vap *rvp = RT2560_VAP(vap); 424 425 ieee80211_ratectl_deinit(vap); 426 ieee80211_vap_detach(vap); 427 free(rvp, M_80211_VAP); 428} 429 430void 431rt2560_resume(void *xsc) 432{ 433 struct rt2560_softc *sc = xsc; 434 435 if (sc->sc_ic.ic_nrunning > 0) 436 rt2560_init(sc); 437} 438 439static void 440rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 441{ 442 if (error != 0) 443 return; 444 445 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 446 447 *(bus_addr_t *)arg = segs[0].ds_addr; 448} 449 450static int 451rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 452 int count) 453{ 454 int i, error; 455 456 ring->count = count; 457 ring->queued = 0; 458 ring->cur = ring->next = 0; 459 ring->cur_encrypt = ring->next_encrypt = 0; 460 461 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 462 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 463 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE, 464 0, NULL, NULL, &ring->desc_dmat); 465 if (error != 0) { 466 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 467 goto fail; 468 } 469 470 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 471 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 472 if (error != 0) { 473 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 474 goto fail; 475 } 476 477 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 478 count * RT2560_TX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 479 0); 480 if (error != 0) { 481 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 482 goto fail; 483 } 484 485 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 486 M_NOWAIT | M_ZERO); 487 if (ring->data == NULL) { 488 device_printf(sc->sc_dev, "could not allocate soft data\n"); 489 error = ENOMEM; 490 goto fail; 491 } 492 493 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 494 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 495 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, 496 &ring->data_dmat); 497 if (error != 0) { 498 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 499 goto fail; 500 } 501 502 for (i = 0; i < count; i++) { 503 error = bus_dmamap_create(ring->data_dmat, 0, 504 &ring->data[i].map); 505 if (error != 0) { 506 device_printf(sc->sc_dev, "could not create DMA map\n"); 507 goto fail; 508 } 509 } 510 511 return 0; 512 513fail: rt2560_free_tx_ring(sc, ring); 514 return error; 515} 516 517static void 518rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 519{ 520 struct rt2560_tx_desc *desc; 521 struct rt2560_tx_data *data; 522 int i; 523 524 for (i = 0; i < ring->count; i++) { 525 desc = &ring->desc[i]; 526 data = &ring->data[i]; 527 528 if (data->m != NULL) { 529 bus_dmamap_sync(ring->data_dmat, data->map, 530 BUS_DMASYNC_POSTWRITE); 531 bus_dmamap_unload(ring->data_dmat, data->map); 532 m_freem(data->m); 533 data->m = NULL; 534 } 535 536 if (data->ni != NULL) { 537 ieee80211_free_node(data->ni); 538 data->ni = NULL; 539 } 540 541 desc->flags = 0; 542 } 543 544 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 545 546 ring->queued = 0; 547 ring->cur = ring->next = 0; 548 ring->cur_encrypt = ring->next_encrypt = 0; 549} 550 551static void 552rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 553{ 554 struct rt2560_tx_data *data; 555 int i; 556 557 if (ring->desc != NULL) { 558 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 559 BUS_DMASYNC_POSTWRITE); 560 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 561 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 562 } 563 564 if (ring->desc_dmat != NULL) 565 bus_dma_tag_destroy(ring->desc_dmat); 566 567 if (ring->data != NULL) { 568 for (i = 0; i < ring->count; i++) { 569 data = &ring->data[i]; 570 571 if (data->m != NULL) { 572 bus_dmamap_sync(ring->data_dmat, data->map, 573 BUS_DMASYNC_POSTWRITE); 574 bus_dmamap_unload(ring->data_dmat, data->map); 575 m_freem(data->m); 576 } 577 578 if (data->ni != NULL) 579 ieee80211_free_node(data->ni); 580 581 if (data->map != NULL) 582 bus_dmamap_destroy(ring->data_dmat, data->map); 583 } 584 585 free(ring->data, M_DEVBUF); 586 } 587 588 if (ring->data_dmat != NULL) 589 bus_dma_tag_destroy(ring->data_dmat); 590} 591 592static int 593rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 594 int count) 595{ 596 struct rt2560_rx_desc *desc; 597 struct rt2560_rx_data *data; 598 bus_addr_t physaddr; 599 int i, error; 600 601 ring->count = count; 602 ring->cur = ring->next = 0; 603 ring->cur_decrypt = 0; 604 605 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0, 606 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 607 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE, 608 0, NULL, NULL, &ring->desc_dmat); 609 if (error != 0) { 610 device_printf(sc->sc_dev, "could not create desc DMA tag\n"); 611 goto fail; 612 } 613 614 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc, 615 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map); 616 if (error != 0) { 617 device_printf(sc->sc_dev, "could not allocate DMA memory\n"); 618 goto fail; 619 } 620 621 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc, 622 count * RT2560_RX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr, 623 0); 624 if (error != 0) { 625 device_printf(sc->sc_dev, "could not load desc DMA map\n"); 626 goto fail; 627 } 628 629 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 630 M_NOWAIT | M_ZERO); 631 if (ring->data == NULL) { 632 device_printf(sc->sc_dev, "could not allocate soft data\n"); 633 error = ENOMEM; 634 goto fail; 635 } 636 637 /* 638 * Pre-allocate Rx buffers and populate Rx ring. 639 */ 640 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, 641 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 642 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat); 643 if (error != 0) { 644 device_printf(sc->sc_dev, "could not create data DMA tag\n"); 645 goto fail; 646 } 647 648 for (i = 0; i < count; i++) { 649 desc = &sc->rxq.desc[i]; 650 data = &sc->rxq.data[i]; 651 652 error = bus_dmamap_create(ring->data_dmat, 0, &data->map); 653 if (error != 0) { 654 device_printf(sc->sc_dev, "could not create DMA map\n"); 655 goto fail; 656 } 657 658 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 659 if (data->m == NULL) { 660 device_printf(sc->sc_dev, 661 "could not allocate rx mbuf\n"); 662 error = ENOMEM; 663 goto fail; 664 } 665 666 error = bus_dmamap_load(ring->data_dmat, data->map, 667 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr, 668 &physaddr, 0); 669 if (error != 0) { 670 device_printf(sc->sc_dev, 671 "could not load rx buf DMA map"); 672 goto fail; 673 } 674 675 desc->flags = htole32(RT2560_RX_BUSY); 676 desc->physaddr = htole32(physaddr); 677 } 678 679 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 680 681 return 0; 682 683fail: rt2560_free_rx_ring(sc, ring); 684 return error; 685} 686 687static void 688rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 689{ 690 int i; 691 692 for (i = 0; i < ring->count; i++) { 693 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 694 ring->data[i].drop = 0; 695 } 696 697 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE); 698 699 ring->cur = ring->next = 0; 700 ring->cur_decrypt = 0; 701} 702 703static void 704rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 705{ 706 struct rt2560_rx_data *data; 707 int i; 708 709 if (ring->desc != NULL) { 710 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, 711 BUS_DMASYNC_POSTWRITE); 712 bus_dmamap_unload(ring->desc_dmat, ring->desc_map); 713 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map); 714 } 715 716 if (ring->desc_dmat != NULL) 717 bus_dma_tag_destroy(ring->desc_dmat); 718 719 if (ring->data != NULL) { 720 for (i = 0; i < ring->count; i++) { 721 data = &ring->data[i]; 722 723 if (data->m != NULL) { 724 bus_dmamap_sync(ring->data_dmat, data->map, 725 BUS_DMASYNC_POSTREAD); 726 bus_dmamap_unload(ring->data_dmat, data->map); 727 m_freem(data->m); 728 } 729 730 if (data->map != NULL) 731 bus_dmamap_destroy(ring->data_dmat, data->map); 732 } 733 734 free(ring->data, M_DEVBUF); 735 } 736 737 if (ring->data_dmat != NULL) 738 bus_dma_tag_destroy(ring->data_dmat); 739} 740 741static int 742rt2560_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 743{ 744 struct rt2560_vap *rvp = RT2560_VAP(vap); 745 struct rt2560_softc *sc = vap->iv_ic->ic_softc; 746 int error; 747 748 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) { 749 /* abort TSF synchronization */ 750 RAL_WRITE(sc, RT2560_CSR14, 0); 751 752 /* turn association led off */ 753 rt2560_update_led(sc, 0, 0); 754 } 755 756 error = rvp->ral_newstate(vap, nstate, arg); 757 758 if (error == 0 && nstate == IEEE80211_S_RUN) { 759 struct ieee80211_node *ni = vap->iv_bss; 760 struct mbuf *m; 761 762 if (vap->iv_opmode != IEEE80211_M_MONITOR) { 763 rt2560_update_plcp(sc); 764 rt2560_set_basicrates(sc, &ni->ni_rates); 765 rt2560_set_bssid(sc, ni->ni_bssid); 766 } 767 768 if (vap->iv_opmode == IEEE80211_M_HOSTAP || 769 vap->iv_opmode == IEEE80211_M_IBSS || 770 vap->iv_opmode == IEEE80211_M_MBSS) { 771 m = ieee80211_beacon_alloc(ni); 772 if (m == NULL) { 773 device_printf(sc->sc_dev, 774 "could not allocate beacon\n"); 775 return ENOBUFS; 776 } 777 ieee80211_ref_node(ni); 778 error = rt2560_tx_bcn(sc, m, ni); 779 if (error != 0) 780 return error; 781 } 782 783 /* turn assocation led on */ 784 rt2560_update_led(sc, 1, 0); 785 786 if (vap->iv_opmode != IEEE80211_M_MONITOR) 787 rt2560_enable_tsf_sync(sc); 788 else 789 rt2560_enable_tsf(sc); 790 } 791 return error; 792} 793 794/* 795 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 796 * 93C66). 797 */ 798static uint16_t 799rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 800{ 801 uint32_t tmp; 802 uint16_t val; 803 int n; 804 805 /* clock C once before the first command */ 806 RT2560_EEPROM_CTL(sc, 0); 807 808 RT2560_EEPROM_CTL(sc, RT2560_S); 809 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 810 RT2560_EEPROM_CTL(sc, RT2560_S); 811 812 /* write start bit (1) */ 813 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 814 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 815 816 /* write READ opcode (10) */ 817 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 818 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 819 RT2560_EEPROM_CTL(sc, RT2560_S); 820 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 821 822 /* write address (A5-A0 or A7-A0) */ 823 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 824 for (; n >= 0; n--) { 825 RT2560_EEPROM_CTL(sc, RT2560_S | 826 (((addr >> n) & 1) << RT2560_SHIFT_D)); 827 RT2560_EEPROM_CTL(sc, RT2560_S | 828 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 829 } 830 831 RT2560_EEPROM_CTL(sc, RT2560_S); 832 833 /* read data Q15-Q0 */ 834 val = 0; 835 for (n = 15; n >= 0; n--) { 836 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 837 tmp = RAL_READ(sc, RT2560_CSR21); 838 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 839 RT2560_EEPROM_CTL(sc, RT2560_S); 840 } 841 842 RT2560_EEPROM_CTL(sc, 0); 843 844 /* clear Chip Select and clock C */ 845 RT2560_EEPROM_CTL(sc, RT2560_S); 846 RT2560_EEPROM_CTL(sc, 0); 847 RT2560_EEPROM_CTL(sc, RT2560_C); 848 849 return val; 850} 851 852/* 853 * Some frames were processed by the hardware cipher engine and are ready for 854 * transmission. 855 */ 856static void 857rt2560_encryption_intr(struct rt2560_softc *sc) 858{ 859 struct rt2560_tx_desc *desc; 860 int hw; 861 862 /* retrieve last descriptor index processed by cipher engine */ 863 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr; 864 hw /= RT2560_TX_DESC_SIZE; 865 866 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 867 BUS_DMASYNC_POSTREAD); 868 869 while (sc->txq.next_encrypt != hw) { 870 if (sc->txq.next_encrypt == sc->txq.cur_encrypt) { 871 printf("hw encrypt %d, cur_encrypt %d\n", hw, 872 sc->txq.cur_encrypt); 873 break; 874 } 875 876 desc = &sc->txq.desc[sc->txq.next_encrypt]; 877 878 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 879 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY)) 880 break; 881 882 /* for TKIP, swap eiv field to fix a bug in ASIC */ 883 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 884 RT2560_TX_CIPHER_TKIP) 885 desc->eiv = bswap32(desc->eiv); 886 887 /* mark the frame ready for transmission */ 888 desc->flags |= htole32(RT2560_TX_VALID); 889 desc->flags |= htole32(RT2560_TX_BUSY); 890 891 DPRINTFN(sc, 15, "encryption done idx=%u\n", 892 sc->txq.next_encrypt); 893 894 sc->txq.next_encrypt = 895 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 896 } 897 898 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 899 BUS_DMASYNC_PREWRITE); 900 901 /* kick Tx */ 902 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 903} 904 905static void 906rt2560_tx_intr(struct rt2560_softc *sc) 907{ 908 struct rt2560_tx_desc *desc; 909 struct rt2560_tx_data *data; 910 struct mbuf *m; 911 struct ieee80211vap *vap; 912 struct ieee80211_node *ni; 913 uint32_t flags; 914 int retrycnt, status; 915 916 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 917 BUS_DMASYNC_POSTREAD); 918 919 for (;;) { 920 desc = &sc->txq.desc[sc->txq.next]; 921 data = &sc->txq.data[sc->txq.next]; 922 923 flags = le32toh(desc->flags); 924 if ((flags & RT2560_TX_BUSY) || 925 (flags & RT2560_TX_CIPHER_BUSY) || 926 !(flags & RT2560_TX_VALID)) 927 break; 928 929 m = data->m; 930 ni = data->ni; 931 vap = ni->ni_vap; 932 933 switch (flags & RT2560_TX_RESULT_MASK) { 934 case RT2560_TX_SUCCESS: 935 retrycnt = 0; 936 937 DPRINTFN(sc, 10, "%s\n", "data frame sent successfully"); 938 if (data->rix != IEEE80211_FIXED_RATE_NONE) 939 ieee80211_ratectl_tx_complete(vap, ni, 940 IEEE80211_RATECTL_TX_SUCCESS, 941 &retrycnt, NULL); 942 status = 0; 943 break; 944 945 case RT2560_TX_SUCCESS_RETRY: 946 retrycnt = RT2560_TX_RETRYCNT(flags); 947 948 DPRINTFN(sc, 9, "data frame sent after %u retries\n", 949 retrycnt); 950 if (data->rix != IEEE80211_FIXED_RATE_NONE) 951 ieee80211_ratectl_tx_complete(vap, ni, 952 IEEE80211_RATECTL_TX_SUCCESS, 953 &retrycnt, NULL); 954 status = 0; 955 break; 956 957 case RT2560_TX_FAIL_RETRY: 958 retrycnt = RT2560_TX_RETRYCNT(flags); 959 960 DPRINTFN(sc, 9, "data frame failed after %d retries\n", 961 retrycnt); 962 if (data->rix != IEEE80211_FIXED_RATE_NONE) 963 ieee80211_ratectl_tx_complete(vap, ni, 964 IEEE80211_RATECTL_TX_FAILURE, 965 &retrycnt, NULL); 966 status = 1; 967 break; 968 969 case RT2560_TX_FAIL_INVALID: 970 case RT2560_TX_FAIL_OTHER: 971 default: 972 device_printf(sc->sc_dev, "sending data frame failed " 973 "0x%08x\n", flags); 974 status = 1; 975 } 976 977 bus_dmamap_sync(sc->txq.data_dmat, data->map, 978 BUS_DMASYNC_POSTWRITE); 979 bus_dmamap_unload(sc->txq.data_dmat, data->map); 980 981 ieee80211_tx_complete(ni, m, status); 982 data->ni = NULL; 983 data->m = NULL; 984 985 /* descriptor is no longer valid */ 986 desc->flags &= ~htole32(RT2560_TX_VALID); 987 988 DPRINTFN(sc, 15, "tx done idx=%u\n", sc->txq.next); 989 990 sc->txq.queued--; 991 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 992 } 993 994 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 995 BUS_DMASYNC_PREWRITE); 996 997 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 998 sc->sc_tx_timer = 0; 999 1000 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) 1001 rt2560_start(sc); 1002} 1003 1004static void 1005rt2560_prio_intr(struct rt2560_softc *sc) 1006{ 1007 struct rt2560_tx_desc *desc; 1008 struct rt2560_tx_data *data; 1009 struct ieee80211_node *ni; 1010 struct mbuf *m; 1011 int flags; 1012 1013 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1014 BUS_DMASYNC_POSTREAD); 1015 1016 for (;;) { 1017 desc = &sc->prioq.desc[sc->prioq.next]; 1018 data = &sc->prioq.data[sc->prioq.next]; 1019 1020 flags = le32toh(desc->flags); 1021 if ((flags & RT2560_TX_BUSY) || (flags & RT2560_TX_VALID) == 0) 1022 break; 1023 1024 switch (flags & RT2560_TX_RESULT_MASK) { 1025 case RT2560_TX_SUCCESS: 1026 DPRINTFN(sc, 10, "%s\n", "mgt frame sent successfully"); 1027 break; 1028 1029 case RT2560_TX_SUCCESS_RETRY: 1030 DPRINTFN(sc, 9, "mgt frame sent after %u retries\n", 1031 (flags >> 5) & 0x7); 1032 break; 1033 1034 case RT2560_TX_FAIL_RETRY: 1035 DPRINTFN(sc, 9, "%s\n", 1036 "sending mgt frame failed (too much retries)"); 1037 break; 1038 1039 case RT2560_TX_FAIL_INVALID: 1040 case RT2560_TX_FAIL_OTHER: 1041 default: 1042 device_printf(sc->sc_dev, "sending mgt frame failed " 1043 "0x%08x\n", flags); 1044 break; 1045 } 1046 1047 bus_dmamap_sync(sc->prioq.data_dmat, data->map, 1048 BUS_DMASYNC_POSTWRITE); 1049 bus_dmamap_unload(sc->prioq.data_dmat, data->map); 1050 1051 m = data->m; 1052 data->m = NULL; 1053 ni = data->ni; 1054 data->ni = NULL; 1055 1056 /* descriptor is no longer valid */ 1057 desc->flags &= ~htole32(RT2560_TX_VALID); 1058 1059 DPRINTFN(sc, 15, "prio done idx=%u\n", sc->prioq.next); 1060 1061 sc->prioq.queued--; 1062 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1063 1064 if (m->m_flags & M_TXCB) 1065 ieee80211_process_callback(ni, m, 1066 (flags & RT2560_TX_RESULT_MASK) &~ 1067 (RT2560_TX_SUCCESS | RT2560_TX_SUCCESS_RETRY)); 1068 m_freem(m); 1069 ieee80211_free_node(ni); 1070 } 1071 1072 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1073 BUS_DMASYNC_PREWRITE); 1074 1075 if (sc->prioq.queued == 0 && sc->txq.queued == 0) 1076 sc->sc_tx_timer = 0; 1077 1078 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) 1079 rt2560_start(sc); 1080} 1081 1082/* 1083 * Some frames were processed by the hardware cipher engine and are ready for 1084 * handoff to the IEEE802.11 layer. 1085 */ 1086static void 1087rt2560_decryption_intr(struct rt2560_softc *sc) 1088{ 1089 struct ieee80211com *ic = &sc->sc_ic; 1090 struct rt2560_rx_desc *desc; 1091 struct rt2560_rx_data *data; 1092 bus_addr_t physaddr; 1093 struct ieee80211_frame *wh; 1094 struct ieee80211_node *ni; 1095 struct mbuf *mnew, *m; 1096 int hw, error; 1097 int8_t rssi, nf; 1098 1099 /* retrieve last decriptor index processed by cipher engine */ 1100 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr; 1101 hw /= RT2560_RX_DESC_SIZE; 1102 1103 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1104 BUS_DMASYNC_POSTREAD); 1105 1106 for (; sc->rxq.cur_decrypt != hw;) { 1107 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1108 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1109 1110 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1111 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1112 break; 1113 1114 if (data->drop) { 1115 counter_u64_add(ic->ic_ierrors, 1); 1116 goto skip; 1117 } 1118 1119 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1120 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1121 counter_u64_add(ic->ic_ierrors, 1); 1122 goto skip; 1123 } 1124 1125 /* 1126 * Try to allocate a new mbuf for this ring element and load it 1127 * before processing the current mbuf. If the ring element 1128 * cannot be loaded, drop the received packet and reuse the old 1129 * mbuf. In the unlikely case that the old mbuf can't be 1130 * reloaded either, explicitly panic. 1131 */ 1132 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1133 if (mnew == NULL) { 1134 counter_u64_add(ic->ic_ierrors, 1); 1135 goto skip; 1136 } 1137 1138 bus_dmamap_sync(sc->rxq.data_dmat, data->map, 1139 BUS_DMASYNC_POSTREAD); 1140 bus_dmamap_unload(sc->rxq.data_dmat, data->map); 1141 1142 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1143 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr, 1144 &physaddr, 0); 1145 if (error != 0) { 1146 m_freem(mnew); 1147 1148 /* try to reload the old mbuf */ 1149 error = bus_dmamap_load(sc->rxq.data_dmat, data->map, 1150 mtod(data->m, void *), MCLBYTES, 1151 rt2560_dma_map_addr, &physaddr, 0); 1152 if (error != 0) { 1153 /* very unlikely that it will fail... */ 1154 panic("%s: could not load old rx mbuf", 1155 device_get_name(sc->sc_dev)); 1156 } 1157 counter_u64_add(ic->ic_ierrors, 1); 1158 goto skip; 1159 } 1160 1161 /* 1162 * New mbuf successfully loaded, update Rx ring and continue 1163 * processing. 1164 */ 1165 m = data->m; 1166 data->m = mnew; 1167 desc->physaddr = htole32(physaddr); 1168 1169 /* finalize mbuf */ 1170 m->m_pkthdr.len = m->m_len = 1171 (le32toh(desc->flags) >> 16) & 0xfff; 1172 1173 rssi = RT2560_RSSI(sc, desc->rssi); 1174 nf = RT2560_NOISE_FLOOR; 1175 if (ieee80211_radiotap_active(ic)) { 1176 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1177 uint32_t tsf_lo, tsf_hi; 1178 1179 /* get timestamp (low and high 32 bits) */ 1180 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1181 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1182 1183 tap->wr_tsf = 1184 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1185 tap->wr_flags = 0; 1186 tap->wr_rate = ieee80211_plcp2rate(desc->rate, 1187 (desc->flags & htole32(RT2560_RX_OFDM)) ? 1188 IEEE80211_T_OFDM : IEEE80211_T_CCK); 1189 tap->wr_antenna = sc->rx_ant; 1190 tap->wr_antsignal = nf + rssi; 1191 tap->wr_antnoise = nf; 1192 } 1193 1194 sc->sc_flags |= RT2560_F_INPUT_RUNNING; 1195 RAL_UNLOCK(sc); 1196 wh = mtod(m, struct ieee80211_frame *); 1197 ni = ieee80211_find_rxnode(ic, 1198 (struct ieee80211_frame_min *)wh); 1199 if (ni != NULL) { 1200 (void) ieee80211_input(ni, m, rssi, nf); 1201 ieee80211_free_node(ni); 1202 } else 1203 (void) ieee80211_input_all(ic, m, rssi, nf); 1204 1205 RAL_LOCK(sc); 1206 sc->sc_flags &= ~RT2560_F_INPUT_RUNNING; 1207skip: desc->flags = htole32(RT2560_RX_BUSY); 1208 1209 DPRINTFN(sc, 15, "decryption done idx=%u\n", sc->rxq.cur_decrypt); 1210 1211 sc->rxq.cur_decrypt = 1212 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1213 } 1214 1215 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1216 BUS_DMASYNC_PREWRITE); 1217} 1218 1219/* 1220 * Some frames were received. Pass them to the hardware cipher engine before 1221 * sending them to the 802.11 layer. 1222 */ 1223static void 1224rt2560_rx_intr(struct rt2560_softc *sc) 1225{ 1226 struct rt2560_rx_desc *desc; 1227 struct rt2560_rx_data *data; 1228 1229 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1230 BUS_DMASYNC_POSTREAD); 1231 1232 for (;;) { 1233 desc = &sc->rxq.desc[sc->rxq.cur]; 1234 data = &sc->rxq.data[sc->rxq.cur]; 1235 1236 if ((le32toh(desc->flags) & RT2560_RX_BUSY) || 1237 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY)) 1238 break; 1239 1240 data->drop = 0; 1241 1242 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) || 1243 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) { 1244 /* 1245 * This should not happen since we did not request 1246 * to receive those frames when we filled RXCSR0. 1247 */ 1248 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n", 1249 le32toh(desc->flags)); 1250 data->drop = 1; 1251 } 1252 1253 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1254 DPRINTFN(sc, 5, "%s\n", "bad length"); 1255 data->drop = 1; 1256 } 1257 1258 /* mark the frame for decryption */ 1259 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1260 1261 DPRINTFN(sc, 15, "rx done idx=%u\n", sc->rxq.cur); 1262 1263 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1264 } 1265 1266 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map, 1267 BUS_DMASYNC_PREWRITE); 1268 1269 /* kick decrypt */ 1270 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1271} 1272 1273static void 1274rt2560_beacon_update(struct ieee80211vap *vap, int item) 1275{ 1276 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1277 1278 setbit(bo->bo_flags, item); 1279} 1280 1281/* 1282 * This function is called periodically in IBSS mode when a new beacon must be 1283 * sent out. 1284 */ 1285static void 1286rt2560_beacon_expire(struct rt2560_softc *sc) 1287{ 1288 struct ieee80211com *ic = &sc->sc_ic; 1289 struct rt2560_tx_data *data; 1290 1291 if (ic->ic_opmode != IEEE80211_M_IBSS && 1292 ic->ic_opmode != IEEE80211_M_HOSTAP && 1293 ic->ic_opmode != IEEE80211_M_MBSS) 1294 return; 1295 1296 data = &sc->bcnq.data[sc->bcnq.next]; 1297 /* 1298 * Don't send beacon if bsschan isn't set 1299 */ 1300 if (data->ni == NULL) 1301 return; 1302 1303 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE); 1304 bus_dmamap_unload(sc->bcnq.data_dmat, data->map); 1305 1306 /* XXX 1 =>'s mcast frames which means all PS sta's will wakeup! */ 1307 ieee80211_beacon_update(data->ni, data->m, 1); 1308 1309 rt2560_tx_bcn(sc, data->m, data->ni); 1310 1311 DPRINTFN(sc, 15, "%s", "beacon expired\n"); 1312 1313 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1314} 1315 1316/* ARGSUSED */ 1317static void 1318rt2560_wakeup_expire(struct rt2560_softc *sc) 1319{ 1320 DPRINTFN(sc, 2, "%s", "wakeup expired\n"); 1321} 1322 1323void 1324rt2560_intr(void *arg) 1325{ 1326 struct rt2560_softc *sc = arg; 1327 uint32_t r; 1328 1329 RAL_LOCK(sc); 1330 1331 /* disable interrupts */ 1332 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1333 1334 /* don't re-enable interrupts if we're shutting down */ 1335 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 1336 RAL_UNLOCK(sc); 1337 return; 1338 } 1339 1340 r = RAL_READ(sc, RT2560_CSR7); 1341 RAL_WRITE(sc, RT2560_CSR7, r); 1342 1343 if (r & RT2560_BEACON_EXPIRE) 1344 rt2560_beacon_expire(sc); 1345 1346 if (r & RT2560_WAKEUP_EXPIRE) 1347 rt2560_wakeup_expire(sc); 1348 1349 if (r & RT2560_ENCRYPTION_DONE) 1350 rt2560_encryption_intr(sc); 1351 1352 if (r & RT2560_TX_DONE) 1353 rt2560_tx_intr(sc); 1354 1355 if (r & RT2560_PRIO_DONE) 1356 rt2560_prio_intr(sc); 1357 1358 if (r & RT2560_DECRYPTION_DONE) 1359 rt2560_decryption_intr(sc); 1360 1361 if (r & RT2560_RX_DONE) { 1362 rt2560_rx_intr(sc); 1363 rt2560_encryption_intr(sc); 1364 } 1365 1366 /* re-enable interrupts */ 1367 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1368 1369 RAL_UNLOCK(sc); 1370} 1371 1372#define RAL_SIFS 10 /* us */ 1373 1374#define RT2560_TXRX_TURNAROUND 10 /* us */ 1375 1376static uint8_t 1377rt2560_plcp_signal(int rate) 1378{ 1379 switch (rate) { 1380 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1381 case 12: return 0xb; 1382 case 18: return 0xf; 1383 case 24: return 0xa; 1384 case 36: return 0xe; 1385 case 48: return 0x9; 1386 case 72: return 0xd; 1387 case 96: return 0x8; 1388 case 108: return 0xc; 1389 1390 /* CCK rates (NB: not IEEE std, device-specific) */ 1391 case 2: return 0x0; 1392 case 4: return 0x1; 1393 case 11: return 0x2; 1394 case 22: return 0x3; 1395 } 1396 return 0xff; /* XXX unsupported/unknown rate */ 1397} 1398 1399static void 1400rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1401 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1402{ 1403 struct ieee80211com *ic = &sc->sc_ic; 1404 uint16_t plcp_length; 1405 int remainder; 1406 1407 desc->flags = htole32(flags); 1408 desc->flags |= htole32(len << 16); 1409 1410 desc->physaddr = htole32(physaddr); 1411 desc->wme = htole16( 1412 RT2560_AIFSN(2) | 1413 RT2560_LOGCWMIN(3) | 1414 RT2560_LOGCWMAX(8)); 1415 1416 /* setup PLCP fields */ 1417 desc->plcp_signal = rt2560_plcp_signal(rate); 1418 desc->plcp_service = 4; 1419 1420 len += IEEE80211_CRC_LEN; 1421 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1422 desc->flags |= htole32(RT2560_TX_OFDM); 1423 1424 plcp_length = len & 0xfff; 1425 desc->plcp_length_hi = plcp_length >> 6; 1426 desc->plcp_length_lo = plcp_length & 0x3f; 1427 } else { 1428 plcp_length = howmany(16 * len, rate); 1429 if (rate == 22) { 1430 remainder = (16 * len) % 22; 1431 if (remainder != 0 && remainder < 7) 1432 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1433 } 1434 desc->plcp_length_hi = plcp_length >> 8; 1435 desc->plcp_length_lo = plcp_length & 0xff; 1436 1437 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1438 desc->plcp_signal |= 0x08; 1439 } 1440 1441 if (!encrypt) 1442 desc->flags |= htole32(RT2560_TX_VALID); 1443 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) 1444 : htole32(RT2560_TX_BUSY); 1445} 1446 1447static int 1448rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1449 struct ieee80211_node *ni) 1450{ 1451 struct ieee80211vap *vap = ni->ni_vap; 1452 struct rt2560_tx_desc *desc; 1453 struct rt2560_tx_data *data; 1454 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1455 int nsegs, rate, error; 1456 1457 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1458 data = &sc->bcnq.data[sc->bcnq.cur]; 1459 1460 /* XXX maybe a separate beacon rate? */ 1461 rate = vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)].mgmtrate; 1462 1463 error = bus_dmamap_load_mbuf_sg(sc->bcnq.data_dmat, data->map, m0, 1464 segs, &nsegs, BUS_DMA_NOWAIT); 1465 if (error != 0) { 1466 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1467 error); 1468 m_freem(m0); 1469 return error; 1470 } 1471 1472 if (ieee80211_radiotap_active_vap(vap)) { 1473 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1474 1475 tap->wt_flags = 0; 1476 tap->wt_rate = rate; 1477 tap->wt_antenna = sc->tx_ant; 1478 1479 ieee80211_radiotap_tx(vap, m0); 1480 } 1481 1482 data->m = m0; 1483 data->ni = ni; 1484 1485 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1486 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, segs->ds_addr); 1487 1488 DPRINTFN(sc, 10, "sending beacon frame len=%u idx=%u rate=%u\n", 1489 m0->m_pkthdr.len, sc->bcnq.cur, rate); 1490 1491 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1492 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map, 1493 BUS_DMASYNC_PREWRITE); 1494 1495 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT; 1496 1497 return 0; 1498} 1499 1500static int 1501rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1502 struct ieee80211_node *ni) 1503{ 1504 struct ieee80211vap *vap = ni->ni_vap; 1505 struct ieee80211com *ic = ni->ni_ic; 1506 struct rt2560_tx_desc *desc; 1507 struct rt2560_tx_data *data; 1508 struct ieee80211_frame *wh; 1509 struct ieee80211_key *k; 1510 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1511 uint16_t dur; 1512 uint32_t flags = 0; 1513 int nsegs, rate, error; 1514 1515 desc = &sc->prioq.desc[sc->prioq.cur]; 1516 data = &sc->prioq.data[sc->prioq.cur]; 1517 1518 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate; 1519 1520 wh = mtod(m0, struct ieee80211_frame *); 1521 1522 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1523 k = ieee80211_crypto_encap(ni, m0); 1524 if (k == NULL) { 1525 m_freem(m0); 1526 return ENOBUFS; 1527 } 1528 } 1529 1530 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1531 segs, &nsegs, 0); 1532 if (error != 0) { 1533 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1534 error); 1535 m_freem(m0); 1536 return error; 1537 } 1538 1539 if (ieee80211_radiotap_active_vap(vap)) { 1540 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1541 1542 tap->wt_flags = 0; 1543 tap->wt_rate = rate; 1544 tap->wt_antenna = sc->tx_ant; 1545 1546 ieee80211_radiotap_tx(vap, m0); 1547 } 1548 1549 data->m = m0; 1550 data->ni = ni; 1551 /* management frames are not taken into account for amrr */ 1552 data->rix = IEEE80211_FIXED_RATE_NONE; 1553 1554 wh = mtod(m0, struct ieee80211_frame *); 1555 1556 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1557 flags |= RT2560_TX_ACK; 1558 1559 dur = ieee80211_ack_duration(ic->ic_rt, 1560 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1561 *(uint16_t *)wh->i_dur = htole16(dur); 1562 1563 /* tell hardware to add timestamp for probe responses */ 1564 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1565 IEEE80211_FC0_TYPE_MGT && 1566 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1567 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1568 flags |= RT2560_TX_TIMESTAMP; 1569 } 1570 1571 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1572 segs->ds_addr); 1573 1574 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1575 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1576 BUS_DMASYNC_PREWRITE); 1577 1578 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n", 1579 m0->m_pkthdr.len, sc->prioq.cur, rate); 1580 1581 /* kick prio */ 1582 sc->prioq.queued++; 1583 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1584 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1585 1586 return 0; 1587} 1588 1589static int 1590rt2560_sendprot(struct rt2560_softc *sc, 1591 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1592{ 1593 struct ieee80211com *ic = ni->ni_ic; 1594 const struct ieee80211_frame *wh; 1595 struct rt2560_tx_desc *desc; 1596 struct rt2560_tx_data *data; 1597 struct mbuf *mprot; 1598 int protrate, ackrate, pktlen, flags, isshort, error; 1599 uint16_t dur; 1600 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1601 int nsegs; 1602 1603 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1604 ("protection %d", prot)); 1605 1606 wh = mtod(m, const struct ieee80211_frame *); 1607 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1608 1609 protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1610 ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1611 1612 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1613 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1614 + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1615 flags = RT2560_TX_MORE_FRAG; 1616 if (prot == IEEE80211_PROT_RTSCTS) { 1617 /* NB: CTS is the same size as an ACK */ 1618 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1619 flags |= RT2560_TX_ACK; 1620 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1621 } else { 1622 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1623 } 1624 if (mprot == NULL) { 1625 /* XXX stat + msg */ 1626 return ENOBUFS; 1627 } 1628 1629 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1630 data = &sc->txq.data[sc->txq.cur_encrypt]; 1631 1632 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1633 mprot, segs, &nsegs, 0); 1634 if (error != 0) { 1635 device_printf(sc->sc_dev, 1636 "could not map mbuf (error %d)\n", error); 1637 m_freem(mprot); 1638 return error; 1639 } 1640 1641 data->m = mprot; 1642 data->ni = ieee80211_ref_node(ni); 1643 /* ctl frames are not taken into account for amrr */ 1644 data->rix = IEEE80211_FIXED_RATE_NONE; 1645 1646 rt2560_setup_tx_desc(sc, desc, flags, mprot->m_pkthdr.len, protrate, 1, 1647 segs->ds_addr); 1648 1649 bus_dmamap_sync(sc->txq.data_dmat, data->map, 1650 BUS_DMASYNC_PREWRITE); 1651 1652 sc->txq.queued++; 1653 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1654 1655 return 0; 1656} 1657 1658static int 1659rt2560_tx_raw(struct rt2560_softc *sc, struct mbuf *m0, 1660 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params) 1661{ 1662 struct ieee80211vap *vap = ni->ni_vap; 1663 struct ieee80211com *ic = ni->ni_ic; 1664 struct rt2560_tx_desc *desc; 1665 struct rt2560_tx_data *data; 1666 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1667 uint32_t flags; 1668 int nsegs, rate, error; 1669 1670 desc = &sc->prioq.desc[sc->prioq.cur]; 1671 data = &sc->prioq.data[sc->prioq.cur]; 1672 1673 rate = params->ibp_rate0; 1674 if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1675 /* XXX fall back to mcast/mgmt rate? */ 1676 m_freem(m0); 1677 return EINVAL; 1678 } 1679 1680 flags = 0; 1681 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1682 flags |= RT2560_TX_ACK; 1683 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1684 error = rt2560_sendprot(sc, m0, ni, 1685 params->ibp_flags & IEEE80211_BPF_RTS ? 1686 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1687 rate); 1688 if (error) { 1689 m_freem(m0); 1690 return error; 1691 } 1692 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1693 } 1694 1695 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0, 1696 segs, &nsegs, 0); 1697 if (error != 0) { 1698 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1699 error); 1700 m_freem(m0); 1701 return error; 1702 } 1703 1704 if (ieee80211_radiotap_active_vap(vap)) { 1705 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1706 1707 tap->wt_flags = 0; 1708 tap->wt_rate = rate; 1709 tap->wt_antenna = sc->tx_ant; 1710 1711 ieee80211_radiotap_tx(ni->ni_vap, m0); 1712 } 1713 1714 data->m = m0; 1715 data->ni = ni; 1716 1717 /* XXX need to setup descriptor ourself */ 1718 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, 1719 rate, (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0, 1720 segs->ds_addr); 1721 1722 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1723 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map, 1724 BUS_DMASYNC_PREWRITE); 1725 1726 DPRINTFN(sc, 10, "sending raw frame len=%u idx=%u rate=%u\n", 1727 m0->m_pkthdr.len, sc->prioq.cur, rate); 1728 1729 /* kick prio */ 1730 sc->prioq.queued++; 1731 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1732 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1733 1734 return 0; 1735} 1736 1737static int 1738rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1739 struct ieee80211_node *ni) 1740{ 1741 struct ieee80211vap *vap = ni->ni_vap; 1742 struct ieee80211com *ic = ni->ni_ic; 1743 struct rt2560_tx_desc *desc; 1744 struct rt2560_tx_data *data; 1745 struct ieee80211_frame *wh; 1746 const struct ieee80211_txparam *tp; 1747 struct ieee80211_key *k; 1748 struct mbuf *mnew; 1749 bus_dma_segment_t segs[RT2560_MAX_SCATTER]; 1750 uint16_t dur; 1751 uint32_t flags; 1752 int nsegs, rate, error; 1753 1754 wh = mtod(m0, struct ieee80211_frame *); 1755 1756 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1757 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1758 rate = tp->mcastrate; 1759 } else if (m0->m_flags & M_EAPOL) { 1760 rate = tp->mgmtrate; 1761 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) { 1762 rate = tp->ucastrate; 1763 } else { 1764 (void) ieee80211_ratectl_rate(ni, NULL, 0); 1765 rate = ni->ni_txrate; 1766 } 1767 1768 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1769 k = ieee80211_crypto_encap(ni, m0); 1770 if (k == NULL) { 1771 m_freem(m0); 1772 return ENOBUFS; 1773 } 1774 1775 /* packet header may have moved, reset our local pointer */ 1776 wh = mtod(m0, struct ieee80211_frame *); 1777 } 1778 1779 flags = 0; 1780 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1781 int prot = IEEE80211_PROT_NONE; 1782 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1783 prot = IEEE80211_PROT_RTSCTS; 1784 else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1785 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1786 prot = ic->ic_protmode; 1787 if (prot != IEEE80211_PROT_NONE) { 1788 error = rt2560_sendprot(sc, m0, ni, prot, rate); 1789 if (error) { 1790 m_freem(m0); 1791 return error; 1792 } 1793 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1794 } 1795 } 1796 1797 data = &sc->txq.data[sc->txq.cur_encrypt]; 1798 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1799 1800 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, m0, 1801 segs, &nsegs, 0); 1802 if (error != 0 && error != EFBIG) { 1803 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n", 1804 error); 1805 m_freem(m0); 1806 return error; 1807 } 1808 if (error != 0) { 1809 mnew = m_defrag(m0, M_NOWAIT); 1810 if (mnew == NULL) { 1811 device_printf(sc->sc_dev, 1812 "could not defragment mbuf\n"); 1813 m_freem(m0); 1814 return ENOBUFS; 1815 } 1816 m0 = mnew; 1817 1818 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, 1819 m0, segs, &nsegs, 0); 1820 if (error != 0) { 1821 device_printf(sc->sc_dev, 1822 "could not map mbuf (error %d)\n", error); 1823 m_freem(m0); 1824 return error; 1825 } 1826 1827 /* packet header may have moved, reset our local pointer */ 1828 wh = mtod(m0, struct ieee80211_frame *); 1829 } 1830 1831 if (ieee80211_radiotap_active_vap(vap)) { 1832 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1833 1834 tap->wt_flags = 0; 1835 tap->wt_rate = rate; 1836 tap->wt_antenna = sc->tx_ant; 1837 1838 ieee80211_radiotap_tx(vap, m0); 1839 } 1840 1841 data->m = m0; 1842 data->ni = ni; 1843 1844 /* remember link conditions for rate adaptation algorithm */ 1845 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) { 1846 data->rix = ni->ni_txrate; 1847 /* XXX probably need last rssi value and not avg */ 1848 data->rssi = ic->ic_node_getrssi(ni); 1849 } else 1850 data->rix = IEEE80211_FIXED_RATE_NONE; 1851 1852 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1853 flags |= RT2560_TX_ACK; 1854 1855 dur = ieee80211_ack_duration(ic->ic_rt, 1856 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1857 *(uint16_t *)wh->i_dur = htole16(dur); 1858 } 1859 1860 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1861 segs->ds_addr); 1862 1863 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE); 1864 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map, 1865 BUS_DMASYNC_PREWRITE); 1866 1867 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n", 1868 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate); 1869 1870 /* kick encrypt */ 1871 sc->txq.queued++; 1872 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1873 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1874 1875 return 0; 1876} 1877 1878static int 1879rt2560_transmit(struct ieee80211com *ic, struct mbuf *m) 1880{ 1881 struct rt2560_softc *sc = ic->ic_softc; 1882 int error; 1883 1884 RAL_LOCK(sc); 1885 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 1886 RAL_UNLOCK(sc); 1887 return (ENXIO); 1888 } 1889 error = mbufq_enqueue(&sc->sc_snd, m); 1890 if (error) { 1891 RAL_UNLOCK(sc); 1892 return (error); 1893 } 1894 rt2560_start(sc); 1895 RAL_UNLOCK(sc); 1896 1897 return (0); 1898} 1899 1900static void 1901rt2560_start(struct rt2560_softc *sc) 1902{ 1903 struct ieee80211_node *ni; 1904 struct mbuf *m; 1905 1906 RAL_LOCK_ASSERT(sc); 1907 1908 while (sc->txq.queued < RT2560_TX_RING_COUNT - 1 && 1909 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1910 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1911 if (rt2560_tx_data(sc, m, ni) != 0) { 1912 if_inc_counter(ni->ni_vap->iv_ifp, 1913 IFCOUNTER_OERRORS, 1); 1914 ieee80211_free_node(ni); 1915 break; 1916 } 1917 sc->sc_tx_timer = 5; 1918 } 1919} 1920 1921static void 1922rt2560_watchdog(void *arg) 1923{ 1924 struct rt2560_softc *sc = arg; 1925 1926 RAL_LOCK_ASSERT(sc); 1927 1928 KASSERT(sc->sc_flags & RT2560_F_RUNNING, ("not running")); 1929 1930 if (sc->sc_invalid) /* card ejected */ 1931 return; 1932 1933 rt2560_encryption_intr(sc); 1934 rt2560_tx_intr(sc); 1935 1936 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) { 1937 device_printf(sc->sc_dev, "device timeout\n"); 1938 rt2560_init_locked(sc); 1939 counter_u64_add(sc->sc_ic.ic_oerrors, 1); 1940 /* NB: callout is reset in rt2560_init() */ 1941 return; 1942 } 1943 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 1944} 1945 1946static void 1947rt2560_parent(struct ieee80211com *ic) 1948{ 1949 struct rt2560_softc *sc = ic->ic_softc; 1950 int startall = 0; 1951 1952 RAL_LOCK(sc); 1953 if (ic->ic_nrunning > 0) { 1954 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) { 1955 rt2560_init_locked(sc); 1956 startall = 1; 1957 } else 1958 rt2560_update_promisc(ic); 1959 } else if (sc->sc_flags & RT2560_F_RUNNING) 1960 rt2560_stop_locked(sc); 1961 RAL_UNLOCK(sc); 1962 if (startall) 1963 ieee80211_start_all(ic); 1964} 1965 1966static void 1967rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 1968{ 1969 uint32_t tmp; 1970 int ntries; 1971 1972 for (ntries = 0; ntries < 100; ntries++) { 1973 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 1974 break; 1975 DELAY(1); 1976 } 1977 if (ntries == 100) { 1978 device_printf(sc->sc_dev, "could not write to BBP\n"); 1979 return; 1980 } 1981 1982 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 1983 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 1984 1985 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val); 1986} 1987 1988static uint8_t 1989rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 1990{ 1991 uint32_t val; 1992 int ntries; 1993 1994 for (ntries = 0; ntries < 100; ntries++) { 1995 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 1996 break; 1997 DELAY(1); 1998 } 1999 if (ntries == 100) { 2000 device_printf(sc->sc_dev, "could not read from BBP\n"); 2001 return 0; 2002 } 2003 2004 val = RT2560_BBP_BUSY | reg << 8; 2005 RAL_WRITE(sc, RT2560_BBPCSR, val); 2006 2007 for (ntries = 0; ntries < 100; ntries++) { 2008 val = RAL_READ(sc, RT2560_BBPCSR); 2009 if (!(val & RT2560_BBP_BUSY)) 2010 return val & 0xff; 2011 DELAY(1); 2012 } 2013 2014 device_printf(sc->sc_dev, "could not read from BBP\n"); 2015 return 0; 2016} 2017 2018static void 2019rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2020{ 2021 uint32_t tmp; 2022 int ntries; 2023 2024 for (ntries = 0; ntries < 100; ntries++) { 2025 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2026 break; 2027 DELAY(1); 2028 } 2029 if (ntries == 100) { 2030 device_printf(sc->sc_dev, "could not write to RF\n"); 2031 return; 2032 } 2033 2034 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2035 (reg & 0x3); 2036 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2037 2038 /* remember last written value in sc */ 2039 sc->rf_regs[reg] = val; 2040 2041 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 2042} 2043 2044static void 2045rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2046{ 2047 struct ieee80211com *ic = &sc->sc_ic; 2048 uint8_t power, tmp; 2049 u_int i, chan; 2050 2051 chan = ieee80211_chan2ieee(ic, c); 2052 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan)); 2053 2054 if (IEEE80211_IS_CHAN_2GHZ(c)) 2055 power = min(sc->txpow[chan - 1], 31); 2056 else 2057 power = 31; 2058 2059 /* adjust txpower using ifconfig settings */ 2060 power -= (100 - ic->ic_txpowlimit) / 8; 2061 2062 DPRINTFN(sc, 2, "setting channel to %u, txpower to %u\n", chan, power); 2063 2064 switch (sc->rf_rev) { 2065 case RT2560_RF_2522: 2066 rt2560_rf_write(sc, RAL_RF1, 0x00814); 2067 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]); 2068 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2069 break; 2070 2071 case RT2560_RF_2523: 2072 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2073 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]); 2074 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 2075 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2076 break; 2077 2078 case RT2560_RF_2524: 2079 rt2560_rf_write(sc, RAL_RF1, 0x0c808); 2080 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]); 2081 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2082 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2083 break; 2084 2085 case RT2560_RF_2525: 2086 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2087 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2088 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2089 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2090 2091 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2092 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]); 2093 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2094 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 2095 break; 2096 2097 case RT2560_RF_2525E: 2098 rt2560_rf_write(sc, RAL_RF1, 0x08808); 2099 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]); 2100 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2101 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 2102 break; 2103 2104 case RT2560_RF_2526: 2105 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2106 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2107 rt2560_rf_write(sc, RAL_RF1, 0x08804); 2108 2109 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]); 2110 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 2111 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 2112 break; 2113 2114 /* dual-band RF */ 2115 case RT2560_RF_5222: 2116 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2117 2118 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1); 2119 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2); 2120 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 2121 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4); 2122 break; 2123 default: 2124 printf("unknown ral rev=%d\n", sc->rf_rev); 2125 } 2126 2127 /* XXX */ 2128 if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) { 2129 /* set Japan filter bit for channel 14 */ 2130 tmp = rt2560_bbp_read(sc, 70); 2131 2132 tmp &= ~RT2560_JAPAN_FILTER; 2133 if (chan == 14) 2134 tmp |= RT2560_JAPAN_FILTER; 2135 2136 rt2560_bbp_write(sc, 70, tmp); 2137 2138 /* clear CRC errors */ 2139 RAL_READ(sc, RT2560_CNT0); 2140 } 2141} 2142 2143static void 2144rt2560_set_channel(struct ieee80211com *ic) 2145{ 2146 struct rt2560_softc *sc = ic->ic_softc; 2147 2148 RAL_LOCK(sc); 2149 rt2560_set_chan(sc, ic->ic_curchan); 2150 RAL_UNLOCK(sc); 2151 2152} 2153 2154#if 0 2155/* 2156 * Disable RF auto-tuning. 2157 */ 2158static void 2159rt2560_disable_rf_tune(struct rt2560_softc *sc) 2160{ 2161 uint32_t tmp; 2162 2163 if (sc->rf_rev != RT2560_RF_2523) { 2164 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 2165 rt2560_rf_write(sc, RAL_RF1, tmp); 2166 } 2167 2168 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 2169 rt2560_rf_write(sc, RAL_RF3, tmp); 2170 2171 DPRINTFN(sc, 2, "%s", "disabling RF autotune\n"); 2172} 2173#endif 2174 2175/* 2176 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2177 * synchronization. 2178 */ 2179static void 2180rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2181{ 2182 struct ieee80211com *ic = &sc->sc_ic; 2183 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2184 uint16_t logcwmin, preload; 2185 uint32_t tmp; 2186 2187 /* first, disable TSF synchronization */ 2188 RAL_WRITE(sc, RT2560_CSR14, 0); 2189 2190 tmp = 16 * vap->iv_bss->ni_intval; 2191 RAL_WRITE(sc, RT2560_CSR12, tmp); 2192 2193 RAL_WRITE(sc, RT2560_CSR13, 0); 2194 2195 logcwmin = 5; 2196 preload = (vap->iv_opmode == IEEE80211_M_STA) ? 384 : 1024; 2197 tmp = logcwmin << 16 | preload; 2198 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2199 2200 /* finally, enable TSF synchronization */ 2201 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2202 if (ic->ic_opmode == IEEE80211_M_STA) 2203 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2204 else 2205 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2206 RT2560_ENABLE_BEACON_GENERATOR; 2207 RAL_WRITE(sc, RT2560_CSR14, tmp); 2208 2209 DPRINTF(sc, "%s", "enabling TSF synchronization\n"); 2210} 2211 2212static void 2213rt2560_enable_tsf(struct rt2560_softc *sc) 2214{ 2215 RAL_WRITE(sc, RT2560_CSR14, 0); 2216 RAL_WRITE(sc, RT2560_CSR14, 2217 RT2560_ENABLE_TSF_SYNC(2) | RT2560_ENABLE_TSF); 2218} 2219 2220static void 2221rt2560_update_plcp(struct rt2560_softc *sc) 2222{ 2223 struct ieee80211com *ic = &sc->sc_ic; 2224 2225 /* no short preamble for 1Mbps */ 2226 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2227 2228 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2229 /* values taken from the reference driver */ 2230 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2231 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2232 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2233 } else { 2234 /* same values as above or'ed 0x8 */ 2235 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2236 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2237 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2238 } 2239 2240 DPRINTF(sc, "updating PLCP for %s preamble\n", 2241 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"); 2242} 2243 2244/* 2245 * This function can be called by ieee80211_set_shortslottime(). Refer to 2246 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2247 */ 2248static void 2249rt2560_update_slot(struct ieee80211com *ic) 2250{ 2251 struct rt2560_softc *sc = ic->ic_softc; 2252 uint8_t slottime; 2253 uint16_t tx_sifs, tx_pifs, tx_difs, eifs; 2254 uint32_t tmp; 2255 2256#ifndef FORCE_SLOTTIME 2257 slottime = IEEE80211_GET_SLOTTIME(ic); 2258#else 2259 /* 2260 * Setting slot time according to "short slot time" capability 2261 * in beacon/probe_resp seems to cause problem to acknowledge 2262 * certain AP's data frames transimitted at CCK/DS rates: the 2263 * problematic AP keeps retransmitting data frames, probably 2264 * because MAC level acks are not received by hardware. 2265 * So we cheat a little bit here by claiming we are capable of 2266 * "short slot time" but setting hardware slot time to the normal 2267 * slot time. ral(4) does not seem to have trouble to receive 2268 * frames transmitted using short slot time even if hardware 2269 * slot time is set to normal slot time. If we didn't use this 2270 * trick, we would have to claim that short slot time is not 2271 * supported; this would give relative poor RX performance 2272 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short 2273 * slot time. 2274 */ 2275 slottime = IEEE80211_DUR_SLOT; 2276#endif 2277 2278 /* update the MAC slot boundaries */ 2279 tx_sifs = RAL_SIFS - RT2560_TXRX_TURNAROUND; 2280 tx_pifs = tx_sifs + slottime; 2281 tx_difs = IEEE80211_DUR_DIFS(tx_sifs, slottime); 2282 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2283 2284 tmp = RAL_READ(sc, RT2560_CSR11); 2285 tmp = (tmp & ~0x1f00) | slottime << 8; 2286 RAL_WRITE(sc, RT2560_CSR11, tmp); 2287 2288 tmp = tx_pifs << 16 | tx_sifs; 2289 RAL_WRITE(sc, RT2560_CSR18, tmp); 2290 2291 tmp = eifs << 16 | tx_difs; 2292 RAL_WRITE(sc, RT2560_CSR19, tmp); 2293 2294 DPRINTF(sc, "setting slottime to %uus\n", slottime); 2295} 2296 2297static void 2298rt2560_set_basicrates(struct rt2560_softc *sc, 2299 const struct ieee80211_rateset *rs) 2300{ 2301 struct ieee80211com *ic = &sc->sc_ic; 2302 uint32_t mask = 0; 2303 uint8_t rate; 2304 int i; 2305 2306 for (i = 0; i < rs->rs_nrates; i++) { 2307 rate = rs->rs_rates[i]; 2308 2309 if (!(rate & IEEE80211_RATE_BASIC)) 2310 continue; 2311 2312 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, 2313 IEEE80211_RV(rate)); 2314 } 2315 2316 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask); 2317 2318 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask); 2319} 2320 2321static void 2322rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2323{ 2324 uint32_t tmp; 2325 2326 /* set ON period to 70ms and OFF period to 30ms */ 2327 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2328 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2329} 2330 2331static void 2332rt2560_set_bssid(struct rt2560_softc *sc, const uint8_t *bssid) 2333{ 2334 uint32_t tmp; 2335 2336 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2337 RAL_WRITE(sc, RT2560_CSR5, tmp); 2338 2339 tmp = bssid[4] | bssid[5] << 8; 2340 RAL_WRITE(sc, RT2560_CSR6, tmp); 2341 2342 DPRINTF(sc, "setting BSSID to %6D\n", bssid, ":"); 2343} 2344 2345static void 2346rt2560_set_macaddr(struct rt2560_softc *sc, const uint8_t *addr) 2347{ 2348 uint32_t tmp; 2349 2350 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2351 RAL_WRITE(sc, RT2560_CSR3, tmp); 2352 2353 tmp = addr[4] | addr[5] << 8; 2354 RAL_WRITE(sc, RT2560_CSR4, tmp); 2355 2356 DPRINTF(sc, "setting MAC address to %6D\n", addr, ":"); 2357} 2358 2359static void 2360rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2361{ 2362 uint32_t tmp; 2363 2364 tmp = RAL_READ(sc, RT2560_CSR3); 2365 addr[0] = tmp & 0xff; 2366 addr[1] = (tmp >> 8) & 0xff; 2367 addr[2] = (tmp >> 16) & 0xff; 2368 addr[3] = (tmp >> 24); 2369 2370 tmp = RAL_READ(sc, RT2560_CSR4); 2371 addr[4] = tmp & 0xff; 2372 addr[5] = (tmp >> 8) & 0xff; 2373} 2374 2375static void 2376rt2560_update_promisc(struct ieee80211com *ic) 2377{ 2378 struct rt2560_softc *sc = ic->ic_softc; 2379 uint32_t tmp; 2380 2381 tmp = RAL_READ(sc, RT2560_RXCSR0); 2382 2383 tmp &= ~RT2560_DROP_NOT_TO_ME; 2384 if (ic->ic_promisc == 0) 2385 tmp |= RT2560_DROP_NOT_TO_ME; 2386 2387 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2388 2389 DPRINTF(sc, "%s promiscuous mode\n", 2390 (ic->ic_promisc > 0) ? "entering" : "leaving"); 2391} 2392 2393static const char * 2394rt2560_get_rf(int rev) 2395{ 2396 switch (rev) { 2397 case RT2560_RF_2522: return "RT2522"; 2398 case RT2560_RF_2523: return "RT2523"; 2399 case RT2560_RF_2524: return "RT2524"; 2400 case RT2560_RF_2525: return "RT2525"; 2401 case RT2560_RF_2525E: return "RT2525e"; 2402 case RT2560_RF_2526: return "RT2526"; 2403 case RT2560_RF_5222: return "RT5222"; 2404 default: return "unknown"; 2405 } 2406} 2407 2408static void 2409rt2560_read_config(struct rt2560_softc *sc) 2410{ 2411 uint16_t val; 2412 int i; 2413 2414 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2415 sc->rf_rev = (val >> 11) & 0x7; 2416 sc->hw_radio = (val >> 10) & 0x1; 2417 sc->led_mode = (val >> 6) & 0x7; 2418 sc->rx_ant = (val >> 4) & 0x3; 2419 sc->tx_ant = (val >> 2) & 0x3; 2420 sc->nb_ant = val & 0x3; 2421 2422 /* read default values for BBP registers */ 2423 for (i = 0; i < 16; i++) { 2424 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2425 if (val == 0 || val == 0xffff) 2426 continue; 2427 2428 sc->bbp_prom[i].reg = val >> 8; 2429 sc->bbp_prom[i].val = val & 0xff; 2430 } 2431 2432 /* read Tx power for all b/g channels */ 2433 for (i = 0; i < 14 / 2; i++) { 2434 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2435 sc->txpow[i * 2] = val & 0xff; 2436 sc->txpow[i * 2 + 1] = val >> 8; 2437 } 2438 for (i = 0; i < 14; ++i) { 2439 if (sc->txpow[i] > 31) 2440 sc->txpow[i] = 24; 2441 } 2442 2443 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE); 2444 if ((val & 0xff) == 0xff) 2445 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR; 2446 else 2447 sc->rssi_corr = val & 0xff; 2448 DPRINTF(sc, "rssi correction %d, calibrate 0x%02x\n", 2449 sc->rssi_corr, val); 2450} 2451 2452 2453static void 2454rt2560_scan_start(struct ieee80211com *ic) 2455{ 2456 struct rt2560_softc *sc = ic->ic_softc; 2457 2458 /* abort TSF synchronization */ 2459 RAL_WRITE(sc, RT2560_CSR14, 0); 2460 rt2560_set_bssid(sc, ieee80211broadcastaddr); 2461} 2462 2463static void 2464rt2560_scan_end(struct ieee80211com *ic) 2465{ 2466 struct rt2560_softc *sc = ic->ic_softc; 2467 struct ieee80211vap *vap = ic->ic_scan->ss_vap; 2468 2469 rt2560_enable_tsf_sync(sc); 2470 /* XXX keep local copy */ 2471 rt2560_set_bssid(sc, vap->iv_bss->ni_bssid); 2472} 2473 2474static int 2475rt2560_bbp_init(struct rt2560_softc *sc) 2476{ 2477 int i, ntries; 2478 2479 /* wait for BBP to be ready */ 2480 for (ntries = 0; ntries < 100; ntries++) { 2481 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2482 break; 2483 DELAY(1); 2484 } 2485 if (ntries == 100) { 2486 device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 2487 return EIO; 2488 } 2489 2490 /* initialize BBP registers to default values */ 2491 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2492 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2493 rt2560_def_bbp[i].val); 2494 } 2495 2496 /* initialize BBP registers to values stored in EEPROM */ 2497 for (i = 0; i < 16; i++) { 2498 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0) 2499 break; 2500 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2501 } 2502 rt2560_bbp_write(sc, 17, 0x48); /* XXX restore bbp17 */ 2503 2504 return 0; 2505} 2506 2507static void 2508rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2509{ 2510 uint32_t tmp; 2511 uint8_t tx; 2512 2513 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2514 if (antenna == 1) 2515 tx |= RT2560_BBP_ANTA; 2516 else if (antenna == 2) 2517 tx |= RT2560_BBP_ANTB; 2518 else 2519 tx |= RT2560_BBP_DIVERSITY; 2520 2521 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2522 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2523 sc->rf_rev == RT2560_RF_5222) 2524 tx |= RT2560_BBP_FLIPIQ; 2525 2526 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2527 2528 /* update values for CCK and OFDM in BBPCSR1 */ 2529 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2530 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2531 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2532} 2533 2534static void 2535rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2536{ 2537 uint8_t rx; 2538 2539 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2540 if (antenna == 1) 2541 rx |= RT2560_BBP_ANTA; 2542 else if (antenna == 2) 2543 rx |= RT2560_BBP_ANTB; 2544 else 2545 rx |= RT2560_BBP_DIVERSITY; 2546 2547 /* need to force no I/Q flip for RF 2525e and 2526 */ 2548 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2549 rx &= ~RT2560_BBP_FLIPIQ; 2550 2551 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2552} 2553 2554static void 2555rt2560_init_locked(struct rt2560_softc *sc) 2556{ 2557 struct ieee80211com *ic = &sc->sc_ic; 2558 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2559 uint32_t tmp; 2560 int i; 2561 2562 RAL_LOCK_ASSERT(sc); 2563 2564 rt2560_stop_locked(sc); 2565 2566 /* setup tx rings */ 2567 tmp = RT2560_PRIO_RING_COUNT << 24 | 2568 RT2560_ATIM_RING_COUNT << 16 | 2569 RT2560_TX_RING_COUNT << 8 | 2570 RT2560_TX_DESC_SIZE; 2571 2572 /* rings must be initialized in this exact order */ 2573 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2574 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2575 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2576 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2577 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2578 2579 /* setup rx ring */ 2580 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2581 2582 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2583 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2584 2585 /* initialize MAC registers to default values */ 2586 for (i = 0; i < nitems(rt2560_def_mac); i++) 2587 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2588 2589 rt2560_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr); 2590 2591 /* set basic rate set (will be updated later) */ 2592 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2593 2594 rt2560_update_slot(ic); 2595 rt2560_update_plcp(sc); 2596 rt2560_update_led(sc, 0, 0); 2597 2598 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2599 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2600 2601 if (rt2560_bbp_init(sc) != 0) { 2602 rt2560_stop_locked(sc); 2603 return; 2604 } 2605 2606 rt2560_set_txantenna(sc, sc->tx_ant); 2607 rt2560_set_rxantenna(sc, sc->rx_ant); 2608 2609 /* set default BSS channel */ 2610 rt2560_set_chan(sc, ic->ic_curchan); 2611 2612 /* kick Rx */ 2613 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2614 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2615 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2616 if (ic->ic_opmode != IEEE80211_M_HOSTAP && 2617 ic->ic_opmode != IEEE80211_M_MBSS) 2618 tmp |= RT2560_DROP_TODS; 2619 if (ic->ic_promisc == 0) 2620 tmp |= RT2560_DROP_NOT_TO_ME; 2621 } 2622 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2623 2624 /* clear old FCS and Rx FIFO errors */ 2625 RAL_READ(sc, RT2560_CNT0); 2626 RAL_READ(sc, RT2560_CNT4); 2627 2628 /* clear any pending interrupts */ 2629 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2630 2631 /* enable interrupts */ 2632 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2633 2634 sc->sc_flags |= RT2560_F_RUNNING; 2635 2636 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc); 2637} 2638 2639static void 2640rt2560_init(void *priv) 2641{ 2642 struct rt2560_softc *sc = priv; 2643 struct ieee80211com *ic = &sc->sc_ic; 2644 2645 RAL_LOCK(sc); 2646 rt2560_init_locked(sc); 2647 RAL_UNLOCK(sc); 2648 2649 if (sc->sc_flags & RT2560_F_RUNNING) 2650 ieee80211_start_all(ic); /* start all vap's */ 2651} 2652 2653static void 2654rt2560_stop_locked(struct rt2560_softc *sc) 2655{ 2656 volatile int *flags = &sc->sc_flags; 2657 2658 RAL_LOCK_ASSERT(sc); 2659 2660 while (*flags & RT2560_F_INPUT_RUNNING) 2661 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10); 2662 2663 callout_stop(&sc->watchdog_ch); 2664 sc->sc_tx_timer = 0; 2665 2666 if (sc->sc_flags & RT2560_F_RUNNING) { 2667 sc->sc_flags &= ~RT2560_F_RUNNING; 2668 2669 /* abort Tx */ 2670 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2671 2672 /* disable Rx */ 2673 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2674 2675 /* reset ASIC (imply reset BBP) */ 2676 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2677 RAL_WRITE(sc, RT2560_CSR1, 0); 2678 2679 /* disable interrupts */ 2680 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2681 2682 /* reset Tx and Rx rings */ 2683 rt2560_reset_tx_ring(sc, &sc->txq); 2684 rt2560_reset_tx_ring(sc, &sc->atimq); 2685 rt2560_reset_tx_ring(sc, &sc->prioq); 2686 rt2560_reset_tx_ring(sc, &sc->bcnq); 2687 rt2560_reset_rx_ring(sc, &sc->rxq); 2688 } 2689} 2690 2691void 2692rt2560_stop(void *arg) 2693{ 2694 struct rt2560_softc *sc = arg; 2695 2696 RAL_LOCK(sc); 2697 rt2560_stop_locked(sc); 2698 RAL_UNLOCK(sc); 2699} 2700 2701static int 2702rt2560_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2703 const struct ieee80211_bpf_params *params) 2704{ 2705 struct ieee80211com *ic = ni->ni_ic; 2706 struct rt2560_softc *sc = ic->ic_softc; 2707 2708 RAL_LOCK(sc); 2709 2710 /* prevent management frames from being sent if we're not ready */ 2711 if (!(sc->sc_flags & RT2560_F_RUNNING)) { 2712 RAL_UNLOCK(sc); 2713 m_freem(m); 2714 return ENETDOWN; 2715 } 2716 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2717 RAL_UNLOCK(sc); 2718 m_freem(m); 2719 return ENOBUFS; /* XXX */ 2720 } 2721 2722 if (params == NULL) { 2723 /* 2724 * Legacy path; interpret frame contents to decide 2725 * precisely how to send the frame. 2726 */ 2727 if (rt2560_tx_mgt(sc, m, ni) != 0) 2728 goto bad; 2729 } else { 2730 /* 2731 * Caller supplied explicit parameters to use in 2732 * sending the frame. 2733 */ 2734 if (rt2560_tx_raw(sc, m, ni, params)) 2735 goto bad; 2736 } 2737 sc->sc_tx_timer = 5; 2738 2739 RAL_UNLOCK(sc); 2740 2741 return 0; 2742bad: 2743 RAL_UNLOCK(sc); 2744 return EIO; /* XXX */ 2745}
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