| pcireg.h (291225) | pcireg.h (294430) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/dev/pci/pcireg.h 291225 2015-11-23 23:48:07Z jhb $ | 26 * $FreeBSD: head/sys/dev/pci/pcireg.h 294430 2016-01-20 14:05:21Z zbb $ |
| 27 * 28 */ 29 30/* 31 * PCIM_xxx: mask to locate subfield in register 32 * PCIR_xxx: config register offset 33 * PCIC_xxx: device class 34 * PCIS_xxx: device subclass --- 650 unchanged lines hidden (view full) --- 685#define PCIM_HTCMD_MSI_FIXED 0x0002 686#define PCIR_HTMSI_ADDRESS_LO 0x4 687#define PCIR_HTMSI_ADDRESS_HI 0x8 688 689/* PCI Vendor capability definitions */ 690#define PCIR_VENDOR_LENGTH 0x2 691#define PCIR_VENDOR_DATA 0x3 692 | 27 * 28 */ 29 30/* 31 * PCIM_xxx: mask to locate subfield in register 32 * PCIR_xxx: config register offset 33 * PCIC_xxx: device class 34 * PCIS_xxx: device subclass --- 650 unchanged lines hidden (view full) --- 685#define PCIM_HTCMD_MSI_FIXED 0x0002 686#define PCIR_HTMSI_ADDRESS_LO 0x4 687#define PCIR_HTMSI_ADDRESS_HI 0x8 688 689/* PCI Vendor capability definitions */ 690#define PCIR_VENDOR_LENGTH 0x2 691#define PCIR_VENDOR_DATA 0x3 692 |
| 693/* PCI Device capability definitions */ 694#define PCIR_DEVICE_LENGTH 0x2 695 |
|
| 693/* PCI EHCI Debug Port definitions */ 694#define PCIR_DEBUG_PORT 0x2 695#define PCIM_DEBUG_PORT_OFFSET 0x1FFF 696#define PCIM_DEBUG_PORT_BAR 0xe000 697 698/* PCI-PCI Bridge Subvendor definitions */ 699#define PCIR_SUBVENDCAP_ID 0x4 700 --- 269 unchanged lines hidden --- | 696/* PCI EHCI Debug Port definitions */ 697#define PCIR_DEBUG_PORT 0x2 698#define PCIM_DEBUG_PORT_OFFSET 0x1FFF 699#define PCIM_DEBUG_PORT_BAR 0xe000 700 701/* PCI-PCI Bridge Subvendor definitions */ 702#define PCIR_SUBVENDCAP_ID 0x4 703 --- 269 unchanged lines hidden --- |