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oce_sysctl.c (252869) oce_sysctl.c (257007)
1/*-
2 * Copyright (C) 2013 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,

--- 22 unchanged lines hidden (view full) ---

31 * Contact Information:
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
1/*-
2 * Copyright (C) 2013 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,

--- 22 unchanged lines hidden (view full) ---

31 * Contact Information:
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39/* $FreeBSD: head/sys/dev/oce/oce_sysctl.c 252869 2013-07-06 08:30:45Z delphij $ */
39/* $FreeBSD: head/sys/dev/oce/oce_sysctl.c 257007 2013-10-23 18:58:38Z delphij $ */
40
40
41
42#include "oce_if.h"
43
44static void copy_stats_to_sc_xe201(POCE_SOFTC sc);
45static void copy_stats_to_sc_be3(POCE_SOFTC sc);
46static void copy_stats_to_sc_be2(POCE_SOFTC sc);
47static int oce_sysctl_loopback(SYSCTL_HANDLER_ARGS);
48static int oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
41#include "oce_if.h"
42
43static void copy_stats_to_sc_xe201(POCE_SOFTC sc);
44static void copy_stats_to_sc_be3(POCE_SOFTC sc);
45static void copy_stats_to_sc_be2(POCE_SOFTC sc);
46static int oce_sysctl_loopback(SYSCTL_HANDLER_ARGS);
47static int oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
48static int oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
49static int oce_sys_fwupgrade(SYSCTL_HANDLER_ARGS);
49static int oce_sys_fwupgrade(SYSCTL_HANDLER_ARGS);
50static int oce_be3_flashdata(POCE_SOFTC sc, const struct firmware
51 *fw, int num_imgs);
52static int oce_lancer_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
53static int oce_sysctl_sfp_vpd_dump(SYSCTL_HANDLER_ARGS);
54static boolean_t oce_phy_flashing_required(POCE_SOFTC sc);
55static boolean_t oce_img_flashing_required(POCE_SOFTC sc, const char *p,
56 int img_optype, uint32_t img_offset,
57 uint32_t img_size, uint32_t hdrs_size);
58static void oce_add_stats_sysctls_be3(POCE_SOFTC sc,
59 struct sysctl_ctx_list *ctx,
60 struct sysctl_oid *stats_node);
61static void oce_add_stats_sysctls_xe201(POCE_SOFTC sc,
62 struct sysctl_ctx_list *ctx,
63 struct sysctl_oid *stats_node);
64
50static int oce_lancer_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
51static int oce_sysctl_sfp_vpd_dump(SYSCTL_HANDLER_ARGS);
52static boolean_t oce_phy_flashing_required(POCE_SOFTC sc);
53static boolean_t oce_img_flashing_required(POCE_SOFTC sc, const char *p,
54 int img_optype, uint32_t img_offset,
55 uint32_t img_size, uint32_t hdrs_size);
56static void oce_add_stats_sysctls_be3(POCE_SOFTC sc,
57 struct sysctl_ctx_list *ctx,
58 struct sysctl_oid *stats_node);
59static void oce_add_stats_sysctls_xe201(POCE_SOFTC sc,
60 struct sysctl_ctx_list *ctx,
61 struct sysctl_oid *stats_node);
62
63
65extern char component_revision[32];
66uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
67
64extern char component_revision[32];
65uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
66
67struct flash_img_attri {
68 int img_offset;
69 int img_size;
70 int img_type;
71 bool skip_image;
72 int optype;
73};
74
68void
69oce_add_sysctls(POCE_SOFTC sc)
70{
71
72 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
73 struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev);
74 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
75 struct sysctl_oid *stats_node;

--- 73 unchanged lines hidden (view full) ---

149}
150
151
152static uint32_t
153oce_loopback_test(struct oce_softc *sc, uint8_t loopback_type)
154{
155 uint32_t status = 0;
156
75void
76oce_add_sysctls(POCE_SOFTC sc)
77{
78
79 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
80 struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev);
81 struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
82 struct sysctl_oid *stats_node;

--- 73 unchanged lines hidden (view full) ---

156}
157
158
159static uint32_t
160oce_loopback_test(struct oce_softc *sc, uint8_t loopback_type)
161{
162 uint32_t status = 0;
163
157 oce_mbox_cmd_set_loopback(sc, sc->if_id, loopback_type, 1);
158 status = oce_mbox_cmd_test_loopback(sc, sc->if_id, loopback_type,
164 oce_mbox_cmd_set_loopback(sc, sc->port_id, loopback_type, 1);
165 status = oce_mbox_cmd_test_loopback(sc, sc->port_id, loopback_type,
159 1500, 2, 0xabc);
166 1500, 2, 0xabc);
160 oce_mbox_cmd_set_loopback(sc, sc->if_id, OCE_NO_LOOPBACK, 1);
167 oce_mbox_cmd_set_loopback(sc, sc->port_id, OCE_NO_LOOPBACK, 1);
161
162 return status;
163}
164
165static int
166oce_sysctl_loopback(SYSCTL_HANDLER_ARGS)
167{
168 int value = 0;

--- 49 unchanged lines hidden (view full) ---

218
219 fw = firmware_get(ufiname);
220 if (fw == NULL) {
221 device_printf(sc->dev, "Unable to get Firmware. "
222 "Make sure %s is copied to /boot/modules\n", ufiname);
223 return ENOENT;
224 }
225
168
169 return status;
170}
171
172static int
173oce_sysctl_loopback(SYSCTL_HANDLER_ARGS)
174{
175 int value = 0;

--- 49 unchanged lines hidden (view full) ---

225
226 fw = firmware_get(ufiname);
227 if (fw == NULL) {
228 device_printf(sc->dev, "Unable to get Firmware. "
229 "Make sure %s is copied to /boot/modules\n", ufiname);
230 return ENOENT;
231 }
232
226 if (IS_BE(sc) || IS_SH(sc)) {
233 if (IS_BE(sc)) {
227 if ((sc->flags & OCE_FLAGS_BE2)) {
228 device_printf(sc->dev,
229 "Flashing not supported for BE2 yet.\n");
230 status = 1;
231 goto done;
232 }
233 status = oce_be3_fwupgrade(sc, fw);
234 if ((sc->flags & OCE_FLAGS_BE2)) {
235 device_printf(sc->dev,
236 "Flashing not supported for BE2 yet.\n");
237 status = 1;
238 goto done;
239 }
240 status = oce_be3_fwupgrade(sc, fw);
241 } else if (IS_SH(sc)) {
242 status = oce_skyhawk_fwupgrade(sc,fw);
234 } else
235 status = oce_lancer_fwupgrade(sc, fw);
236done:
237 if (status) {
238 device_printf(sc->dev, "Firmware Upgrade failed\n");
239 } else {
240 device_printf(sc->dev, "Firmware Flashed successfully\n");
241 }
242
243 /* Release Firmware*/
244 firmware_put(fw, FIRMWARE_UNLOAD);
245
246 return status;
247}
248
243 } else
244 status = oce_lancer_fwupgrade(sc, fw);
245done:
246 if (status) {
247 device_printf(sc->dev, "Firmware Upgrade failed\n");
248 } else {
249 device_printf(sc->dev, "Firmware Flashed successfully\n");
250 }
251
252 /* Release Firmware*/
253 firmware_put(fw, FIRMWARE_UNLOAD);
254
255 return status;
256}
257
249
250static int
251oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
258static void oce_fill_flash_img_data(POCE_SOFTC sc, const struct flash_sec_info * fsec,
259 struct flash_img_attri *pimg, int i,
260 const struct firmware *fw, int bin_offset)
252{
261{
253 int rc = 0, num_imgs = 0, i = 0;
254 const struct flash_file_hdr *fhdr;
255 const struct image_hdr *img_ptr;
256
257 fhdr = (const struct flash_file_hdr *)fw->data;
258 if (fhdr->build[0] != '3') {
259 device_printf(sc->dev, "Invalid BE3 firmware image\n");
260 return EINVAL;
262 if (IS_SH(sc)) {
263 pimg->img_offset = HOST_32(fsec->fsec_entry[i].offset);
264 pimg->img_size = HOST_32(fsec->fsec_entry[i].pad_size);
261 }
265 }
262 /* Display flash version */
263 device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
264
266
265 num_imgs = fhdr->num_imgs;
266 for (i = 0; i < num_imgs; i++) {
267 img_ptr = (const struct image_hdr *)((const char *)fw->data +
268 sizeof(struct flash_file_hdr) +
269 (i * sizeof(struct image_hdr)));
270 if (img_ptr->imageid == 1) {
271 rc = oce_be3_flashdata(sc, fw, num_imgs);
267 pimg->img_type = HOST_32(fsec->fsec_entry[i].type);
268 pimg->skip_image = FALSE;
269 switch (pimg->img_type) {
270 case IMG_ISCSI:
271 pimg->optype = 0;
272 if (IS_BE3(sc)) {
273 pimg->img_offset = 2097152;
274 pimg->img_size = 2097152;
275 }
272 break;
276 break;
273 }
277 case IMG_REDBOOT:
278 pimg->optype = 1;
279 if (IS_BE3(sc)) {
280 pimg->img_offset = 262144;
281 pimg->img_size = 1048576;
282 }
283 if (!oce_img_flashing_required(sc, fw->data,
284 pimg->optype,
285 pimg->img_offset,
286 pimg->img_size,
287 bin_offset))
288 pimg->skip_image = TRUE;
289 break;
290 case IMG_BIOS:
291 pimg->optype = 2;
292 if (IS_BE3(sc)) {
293 pimg->img_offset = 12582912;
294 pimg->img_size = 524288;
295 }
296 break;
297 case IMG_PXEBIOS:
298 pimg->optype = 3;
299 if (IS_BE3(sc)) {
300 pimg->img_offset = 13107200;;
301 pimg->img_size = 524288;
302 }
303 break;
304 case IMG_FCOEBIOS:
305 pimg->optype = 8;
306 if (IS_BE3(sc)) {
307 pimg->img_offset = 13631488;
308 pimg->img_size = 524288;
309 }
310 break;
311 case IMG_ISCSI_BAK:
312 pimg->optype = 9;
313 if (IS_BE3(sc)) {
314 pimg->img_offset = 4194304;
315 pimg->img_size = 2097152;
316 }
317 break;
318 case IMG_FCOE:
319 pimg->optype = 10;
320 if (IS_BE3(sc)) {
321 pimg->img_offset = 6291456;
322 pimg->img_size = 2097152;
323 }
324 break;
325 case IMG_FCOE_BAK:
326 pimg->optype = 11;
327 if (IS_BE3(sc)) {
328 pimg->img_offset = 8388608;
329 pimg->img_size = 2097152;
330 }
331 break;
332 case IMG_NCSI:
333 pimg->optype = 13;
334 if (IS_BE3(sc)) {
335 pimg->img_offset = 15990784;
336 pimg->img_size = 262144;
337 }
338 break;
339 case IMG_PHY:
340 pimg->optype = 99;
341 if (IS_BE3(sc)) {
342 pimg->img_offset = 1310720;
343 pimg->img_size = 262144;
344 }
345 if (!oce_phy_flashing_required(sc))
346 pimg->skip_image = TRUE;
347 break;
348 default:
349 pimg->skip_image = TRUE;
350 break;
274 }
275
351 }
352
276 return rc;
277}
278
353}
354
279
280static int
355static int
281oce_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int num_imgs)
356oce_sh_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int32_t num_imgs)
282{
283 char cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
284 const char *p = (const char *)fw->data;
285 const struct flash_sec_info *fsec = NULL;
286 struct mbx_common_read_write_flashrom *req;
357{
358 char cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
359 const char *p = (const char *)fw->data;
360 const struct flash_sec_info *fsec = NULL;
361 struct mbx_common_read_write_flashrom *req;
287 int rc = 0, i, img_type, bin_offset = 0;
288 boolean_t skip_image;
289 uint32_t optype = 0, size = 0, start = 0, num_bytes = 0;
290 uint32_t opcode = 0;
362 int rc = 0, i, bin_offset = 0, opcode, num_bytes;
291 OCE_DMA_MEM dma_mem;
363 OCE_DMA_MEM dma_mem;
364 struct flash_img_attri imgatt;
292
293 /* Validate Cookie */
294 bin_offset = (sizeof(struct flash_file_hdr) +
365
366 /* Validate Cookie */
367 bin_offset = (sizeof(struct flash_file_hdr) +
295 (num_imgs * sizeof(struct image_hdr)));
368 (num_imgs * sizeof(struct image_hdr)));
296 p += bin_offset;
297 while (p < ((const char *)fw->data + fw->datasize)) {
298 fsec = (const struct flash_sec_info *)p;
299 if (!memcmp(cookie, fsec->cookie, sizeof(cookie)))
300 break;
301 fsec = NULL;
302 p += 32;
303 }
304
305 if (!fsec) {
306 device_printf(sc->dev,
369 p += bin_offset;
370 while (p < ((const char *)fw->data + fw->datasize)) {
371 fsec = (const struct flash_sec_info *)p;
372 if (!memcmp(cookie, fsec->cookie, sizeof(cookie)))
373 break;
374 fsec = NULL;
375 p += 32;
376 }
377
378 if (!fsec) {
379 device_printf(sc->dev,
307 "Invalid Cookie. Firmware image corrupted ?\n");
380 "Invalid Cookie. Firmware image corrupted ?\n");
308 return EINVAL;
309 }
310
311 rc = oce_dma_alloc(sc, sizeof(struct mbx_common_read_write_flashrom)
312 + 32*1024, &dma_mem, 0);
313 if (rc) {
314 device_printf(sc->dev,
381 return EINVAL;
382 }
383
384 rc = oce_dma_alloc(sc, sizeof(struct mbx_common_read_write_flashrom)
385 + 32*1024, &dma_mem, 0);
386 if (rc) {
387 device_printf(sc->dev,
315 "Memory allocation failure while flashing\n");
388 "Memory allocation failure while flashing\n");
316 return ENOMEM;
317 }
318 req = OCE_DMAPTR(&dma_mem, struct mbx_common_read_write_flashrom);
319
389 return ENOMEM;
390 }
391 req = OCE_DMAPTR(&dma_mem, struct mbx_common_read_write_flashrom);
392
320 for (i = 0; i < MAX_FLASH_COMP; i++) {
393 if (IS_SH(sc))
394 num_imgs = HOST_32(fsec->fsec_hdr.num_images);
395 else if (IS_BE3(sc))
396 num_imgs = MAX_FLASH_COMP;
321
397
322 img_type = fsec->fsec_entry[i].type;
323 skip_image = FALSE;
324 switch (img_type) {
325 case IMG_ISCSI:
326 optype = 0;
327 size = 2097152;
328 start = 2097152;
329 break;
330 case IMG_REDBOOT:
331 optype = 1;
332 size = 1048576;
333 start = 262144;
334 if (!oce_img_flashing_required(sc, fw->data,
335 optype, start, size, bin_offset))
336 skip_image = TRUE;
337 break;
338 case IMG_BIOS:
339 optype = 2;
340 size = 524288;
341 start = 12582912;
342 break;
343 case IMG_PXEBIOS:
344 optype = 3;
345 size = 524288;
346 start = 13107200;
347 break;
348 case IMG_FCOEBIOS:
349 optype = 8;
350 size = 524288;
351 start = 13631488;
352 break;
353 case IMG_ISCSI_BAK:
354 optype = 9;
355 size = 2097152;
356 start = 4194304;
357 break;
358 case IMG_FCOE:
359 optype = 10;
360 size = 2097152;
361 start = 6291456;
362 break;
363 case IMG_FCOE_BAK:
364 optype = 11;
365 size = 2097152;
366 start = 8388608;
367 break;
368 case IMG_NCSI:
369 optype = 13;
370 size = 262144;
371 start = 15990784;
372 break;
373 case IMG_PHY:
374 optype = 99;
375 size = 262144;
376 start = 1310720;
377 if (!oce_phy_flashing_required(sc))
378 skip_image = TRUE;
379 break;
380 default:
381 skip_image = TRUE;
382 break;
383 }
384 if (skip_image)
398 for (i = 0; i < num_imgs; i++) {
399
400 bzero(&imgatt, sizeof(struct flash_img_attri));
401
402 oce_fill_flash_img_data(sc, fsec, &imgatt, i, fw, bin_offset);
403
404 if (imgatt.skip_image)
385 continue;
386
387 p = fw->data;
405 continue;
406
407 p = fw->data;
388 p = p + bin_offset + start;
389 if ((p + size) > ((const char *)fw->data + fw->datasize)) {
408 p = p + bin_offset + imgatt.img_offset;
409
410 if ((p + imgatt.img_size) > ((const char *)fw->data + fw->datasize)) {
390 rc = 1;
391 goto ret;
392 }
393
411 rc = 1;
412 goto ret;
413 }
414
394 while (size) {
415 while (imgatt.img_size) {
395
416
396 if (size > 32*1024)
417 if (imgatt.img_size > 32*1024)
397 num_bytes = 32*1024;
398 else
418 num_bytes = 32*1024;
419 else
399 num_bytes = size;
400 size -= num_bytes;
420 num_bytes = imgatt.img_size;
421 imgatt.img_size -= num_bytes;
401
422
402 if (!size)
423 if (!imgatt.img_size)
403 opcode = FLASHROM_OPER_FLASH;
404 else
405 opcode = FLASHROM_OPER_SAVE;
406
407 memcpy(req->data_buffer, p, num_bytes);
408 p += num_bytes;
409
424 opcode = FLASHROM_OPER_FLASH;
425 else
426 opcode = FLASHROM_OPER_SAVE;
427
428 memcpy(req->data_buffer, p, num_bytes);
429 p += num_bytes;
430
410 rc = oce_mbox_write_flashrom(sc, optype, opcode,
411 &dma_mem, num_bytes);
431 rc = oce_mbox_write_flashrom(sc, imgatt.optype, opcode,
432 &dma_mem, num_bytes);
412 if (rc) {
413 device_printf(sc->dev,
433 if (rc) {
434 device_printf(sc->dev,
414 "cmd to write to flash rom failed.\n");
435 "cmd to write to flash rom failed.\n");
415 rc = EIO;
416 goto ret;
417 }
418 /* Leave the CPU for others for some time */
419 pause("yield", 10);
420
421 }
436 rc = EIO;
437 goto ret;
438 }
439 /* Leave the CPU for others for some time */
440 pause("yield", 10);
441
442 }
443
422 }
444 }
445
423ret:
424 oce_dma_free(sc, &dma_mem);
425 return rc;
446ret:
447 oce_dma_free(sc, &dma_mem);
448 return rc;
449}
426
450
451#define UFI_TYPE2 2
452#define UFI_TYPE3 3
453#define UFI_TYPE3R 10
454#define UFI_TYPE4 4
455#define UFI_TYPE4R 11
456static int oce_get_ufi_type(POCE_SOFTC sc,
457 const struct flash_file_hdr *fhdr)
458{
459 if (fhdr == NULL)
460 goto be_get_ufi_exit;
461
462 if (IS_SH(sc) && fhdr->build[0] == '4') {
463 if (fhdr->asic_type_rev >= 0x10)
464 return UFI_TYPE4R;
465 else
466 return UFI_TYPE4;
467 } else if (IS_BE3(sc) && fhdr->build[0] == '3') {
468 if (fhdr->asic_type_rev == 0x10)
469 return UFI_TYPE3R;
470 else
471 return UFI_TYPE3;
472 } else if (IS_BE2(sc) && fhdr->build[0] == '2')
473 return UFI_TYPE2;
474
475be_get_ufi_exit:
476 device_printf(sc->dev,
477 "UFI and Interface are not compatible for flashing\n");
478 return -1;
427}
428
429
479}
480
481
482static int
483oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
484{
485 int rc = 0, num_imgs = 0, i = 0, ufi_type;
486 const struct flash_file_hdr *fhdr;
487 const struct image_hdr *img_ptr;
488
489 fhdr = (const struct flash_file_hdr *)fw->data;
490
491 ufi_type = oce_get_ufi_type(sc, fhdr);
492
493 /* Display flash version */
494 device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
495
496 num_imgs = fhdr->num_imgs;
497 for (i = 0; i < num_imgs; i++) {
498 img_ptr = (const struct image_hdr *)((const char *)fw->data +
499 sizeof(struct flash_file_hdr) +
500 (i * sizeof(struct image_hdr)));
501
502 if (img_ptr->imageid != 1)
503 continue;
504
505 switch (ufi_type) {
506 case UFI_TYPE4R:
507 rc = oce_sh_be3_flashdata(sc, fw,
508 num_imgs);
509 break;
510 case UFI_TYPE4:
511 if (sc->asic_revision < 0x10)
512 rc = oce_sh_be3_flashdata(sc, fw,
513 num_imgs);
514 else {
515 rc = -1;
516 device_printf(sc->dev,
517 "Cant load SH A0 UFI on B0\n");
518 }
519 break;
520 default:
521 rc = -1;
522 break;
523
524 }
525 }
526
527 return rc;
528}
529
530static int
531oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
532{
533 int rc = 0, num_imgs = 0, i = 0;
534 const struct flash_file_hdr *fhdr;
535 const struct image_hdr *img_ptr;
536
537 fhdr = (const struct flash_file_hdr *)fw->data;
538 if (fhdr->build[0] != '3') {
539 device_printf(sc->dev, "Invalid BE3 firmware image\n");
540 return EINVAL;
541 }
542 /* Display flash version */
543 device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
544
545 num_imgs = fhdr->num_imgs;
546 for (i = 0; i < num_imgs; i++) {
547 img_ptr = (const struct image_hdr *)((const char *)fw->data +
548 sizeof(struct flash_file_hdr) +
549 (i * sizeof(struct image_hdr)));
550 if (img_ptr->imageid == 1) {
551 rc = oce_sh_be3_flashdata(sc, fw, num_imgs);
552
553 break;
554 }
555 }
556
557 return rc;
558}
559
560
430static boolean_t
431oce_phy_flashing_required(POCE_SOFTC sc)
432{
433 int status = 0;
434 struct oce_phy_info phy_info;
435
436 status = oce_mbox_get_phy_info(sc, &phy_info);
437 if (status)

--- 910 unchanged lines hidden --- 		561static boolean_t
562oce_phy_flashing_required(POCE_SOFTC sc)
563{
564 int status = 0;
565 struct oce_phy_info phy_info;
566
567 status = oce_mbox_get_phy_info(sc, &phy_info);
568 if (status)

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