39c39
< /* $FreeBSD: head/sys/dev/oce/oce_sysctl.c 252869 2013-07-06 08:30:45Z delphij $ */
---
> /* $FreeBSD: head/sys/dev/oce/oce_sysctl.c 257007 2013-10-23 18:58:38Z delphij $ */
41d40
<
48a48
> static int oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
50,51d49
< static int oce_be3_flashdata(POCE_SOFTC sc, const struct firmware
< *fw, int num_imgs);
64a63
>
67a67,74
> struct flash_img_attri {
> int img_offset;
> int img_size;
> int img_type;
> bool skip_image;
> int optype;
> };
>
157,158c164,165
< oce_mbox_cmd_set_loopback(sc, sc->if_id, loopback_type, 1);
< status = oce_mbox_cmd_test_loopback(sc, sc->if_id, loopback_type,
---
> oce_mbox_cmd_set_loopback(sc, sc->port_id, loopback_type, 1);
> status = oce_mbox_cmd_test_loopback(sc, sc->port_id, loopback_type,
160c167
< oce_mbox_cmd_set_loopback(sc, sc->if_id, OCE_NO_LOOPBACK, 1);
---
> oce_mbox_cmd_set_loopback(sc, sc->port_id, OCE_NO_LOOPBACK, 1);
226c233
< if (IS_BE(sc) || IS_SH(sc)) {
---
> if (IS_BE(sc)) {
233a241,242
> } else if (IS_SH(sc)) {
> status = oce_skyhawk_fwupgrade(sc,fw);
249,251c258,260
<
< static int
< oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
---
> static void oce_fill_flash_img_data(POCE_SOFTC sc, const struct flash_sec_info * fsec,
> struct flash_img_attri *pimg, int i,
> const struct firmware *fw, int bin_offset)
253,260c262,264
< int rc = 0, num_imgs = 0, i = 0;
< const struct flash_file_hdr *fhdr;
< const struct image_hdr *img_ptr;
<
< fhdr = (const struct flash_file_hdr *)fw->data;
< if (fhdr->build[0] != '3') {
< device_printf(sc->dev, "Invalid BE3 firmware image\n");
< return EINVAL;
---
> if (IS_SH(sc)) {
> pimg->img_offset = HOST_32(fsec->fsec_entry[i].offset);
> pimg->img_size = HOST_32(fsec->fsec_entry[i].pad_size);
262,263d265
< /* Display flash version */
< device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
265,271c267,275
< num_imgs = fhdr->num_imgs;
< for (i = 0; i < num_imgs; i++) {
< img_ptr = (const struct image_hdr *)((const char *)fw->data +
< sizeof(struct flash_file_hdr) +
< (i * sizeof(struct image_hdr)));
< if (img_ptr->imageid == 1) {
< rc = oce_be3_flashdata(sc, fw, num_imgs);
---
> pimg->img_type = HOST_32(fsec->fsec_entry[i].type);
> pimg->skip_image = FALSE;
> switch (pimg->img_type) {
> case IMG_ISCSI:
> pimg->optype = 0;
> if (IS_BE3(sc)) {
> pimg->img_offset = 2097152;
> pimg->img_size = 2097152;
> }
273c277,350
< }
---
> case IMG_REDBOOT:
> pimg->optype = 1;
> if (IS_BE3(sc)) {
> pimg->img_offset = 262144;
> pimg->img_size = 1048576;
> }
> if (!oce_img_flashing_required(sc, fw->data,
> pimg->optype,
> pimg->img_offset,
> pimg->img_size,
> bin_offset))
> pimg->skip_image = TRUE;
> break;
> case IMG_BIOS:
> pimg->optype = 2;
> if (IS_BE3(sc)) {
> pimg->img_offset = 12582912;
> pimg->img_size = 524288;
> }
> break;
> case IMG_PXEBIOS:
> pimg->optype = 3;
> if (IS_BE3(sc)) {
> pimg->img_offset = 13107200;;
> pimg->img_size = 524288;
> }
> break;
> case IMG_FCOEBIOS:
> pimg->optype = 8;
> if (IS_BE3(sc)) {
> pimg->img_offset = 13631488;
> pimg->img_size = 524288;
> }
> break;
> case IMG_ISCSI_BAK:
> pimg->optype = 9;
> if (IS_BE3(sc)) {
> pimg->img_offset = 4194304;
> pimg->img_size = 2097152;
> }
> break;
> case IMG_FCOE:
> pimg->optype = 10;
> if (IS_BE3(sc)) {
> pimg->img_offset = 6291456;
> pimg->img_size = 2097152;
> }
> break;
> case IMG_FCOE_BAK:
> pimg->optype = 11;
> if (IS_BE3(sc)) {
> pimg->img_offset = 8388608;
> pimg->img_size = 2097152;
> }
> break;
> case IMG_NCSI:
> pimg->optype = 13;
> if (IS_BE3(sc)) {
> pimg->img_offset = 15990784;
> pimg->img_size = 262144;
> }
> break;
> case IMG_PHY:
> pimg->optype = 99;
> if (IS_BE3(sc)) {
> pimg->img_offset = 1310720;
> pimg->img_size = 262144;
> }
> if (!oce_phy_flashing_required(sc))
> pimg->skip_image = TRUE;
> break;
> default:
> pimg->skip_image = TRUE;
> break;
276d352
< return rc;
279d354
<
281c356
< oce_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int num_imgs)
---
> oce_sh_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int32_t num_imgs)
287,290c362
< int rc = 0, i, img_type, bin_offset = 0;
< boolean_t skip_image;
< uint32_t optype = 0, size = 0, start = 0, num_bytes = 0;
< uint32_t opcode = 0;
---
> int rc = 0, i, bin_offset = 0, opcode, num_bytes;
291a364
> struct flash_img_attri imgatt;
295c368
< (num_imgs * sizeof(struct image_hdr)));
---
> (num_imgs * sizeof(struct image_hdr)));
307c380
< "Invalid Cookie. Firmware image corrupted ?\n");
---
> "Invalid Cookie. Firmware image corrupted ?\n");
315c388
< "Memory allocation failure while flashing\n");
---
> "Memory allocation failure while flashing\n");
320c393,396
< for (i = 0; i < MAX_FLASH_COMP; i++) {
---
> if (IS_SH(sc))
> num_imgs = HOST_32(fsec->fsec_hdr.num_images);
> else if (IS_BE3(sc))
> num_imgs = MAX_FLASH_COMP;
322,384c398,404
< img_type = fsec->fsec_entry[i].type;
< skip_image = FALSE;
< switch (img_type) {
< case IMG_ISCSI:
< optype = 0;
< size = 2097152;
< start = 2097152;
< break;
< case IMG_REDBOOT:
< optype = 1;
< size = 1048576;
< start = 262144;
< if (!oce_img_flashing_required(sc, fw->data,
< optype, start, size, bin_offset))
< skip_image = TRUE;
< break;
< case IMG_BIOS:
< optype = 2;
< size = 524288;
< start = 12582912;
< break;
< case IMG_PXEBIOS:
< optype = 3;
< size = 524288;
< start = 13107200;
< break;
< case IMG_FCOEBIOS:
< optype = 8;
< size = 524288;
< start = 13631488;
< break;
< case IMG_ISCSI_BAK:
< optype = 9;
< size = 2097152;
< start = 4194304;
< break;
< case IMG_FCOE:
< optype = 10;
< size = 2097152;
< start = 6291456;
< break;
< case IMG_FCOE_BAK:
< optype = 11;
< size = 2097152;
< start = 8388608;
< break;
< case IMG_NCSI:
< optype = 13;
< size = 262144;
< start = 15990784;
< break;
< case IMG_PHY:
< optype = 99;
< size = 262144;
< start = 1310720;
< if (!oce_phy_flashing_required(sc))
< skip_image = TRUE;
< break;
< default:
< skip_image = TRUE;
< break;
< }
< if (skip_image)
---
> for (i = 0; i < num_imgs; i++) {
>
> bzero(&imgatt, sizeof(struct flash_img_attri));
>
> oce_fill_flash_img_data(sc, fsec, &imgatt, i, fw, bin_offset);
>
> if (imgatt.skip_image)
388,389c408,410
< p = p + bin_offset + start;
< if ((p + size) > ((const char *)fw->data + fw->datasize)) {
---
> p = p + bin_offset + imgatt.img_offset;
>
> if ((p + imgatt.img_size) > ((const char *)fw->data + fw->datasize)) {
394c415
< while (size) {
---
> while (imgatt.img_size) {
396c417
< if (size > 32*1024)
---
> if (imgatt.img_size > 32*1024)
399,400c420,421
< num_bytes = size;
< size -= num_bytes;
---
> num_bytes = imgatt.img_size;
> imgatt.img_size -= num_bytes;
402c423
< if (!size)
---
> if (!imgatt.img_size)
410,411c431,432
< rc = oce_mbox_write_flashrom(sc, optype, opcode,
< &dma_mem, num_bytes);
---
> rc = oce_mbox_write_flashrom(sc, imgatt.optype, opcode,
> &dma_mem, num_bytes);
414c435
< "cmd to write to flash rom failed.\n");
---
> "cmd to write to flash rom failed.\n");
421a443
>
422a445
>
425a449
> }
426a451,478
> #define UFI_TYPE2 2
> #define UFI_TYPE3 3
> #define UFI_TYPE3R 10
> #define UFI_TYPE4 4
> #define UFI_TYPE4R 11
> static int oce_get_ufi_type(POCE_SOFTC sc,
> const struct flash_file_hdr *fhdr)
> {
> if (fhdr == NULL)
> goto be_get_ufi_exit;
>
> if (IS_SH(sc) && fhdr->build[0] == '4') {
> if (fhdr->asic_type_rev >= 0x10)
> return UFI_TYPE4R;
> else
> return UFI_TYPE4;
> } else if (IS_BE3(sc) && fhdr->build[0] == '3') {
> if (fhdr->asic_type_rev == 0x10)
> return UFI_TYPE3R;
> else
> return UFI_TYPE3;
> } else if (IS_BE2(sc) && fhdr->build[0] == '2')
> return UFI_TYPE2;
>
> be_get_ufi_exit:
> device_printf(sc->dev,
> "UFI and Interface are not compatible for flashing\n");
> return -1;
429a482,560
> static int
> oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
> {
> int rc = 0, num_imgs = 0, i = 0, ufi_type;
> const struct flash_file_hdr *fhdr;
> const struct image_hdr *img_ptr;
>
> fhdr = (const struct flash_file_hdr *)fw->data;
>
> ufi_type = oce_get_ufi_type(sc, fhdr);
>
> /* Display flash version */
> device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
>
> num_imgs = fhdr->num_imgs;
> for (i = 0; i < num_imgs; i++) {
> img_ptr = (const struct image_hdr *)((const char *)fw->data +
> sizeof(struct flash_file_hdr) +
> (i * sizeof(struct image_hdr)));
>
> if (img_ptr->imageid != 1)
> continue;
>
> switch (ufi_type) {
> case UFI_TYPE4R:
> rc = oce_sh_be3_flashdata(sc, fw,
> num_imgs);
> break;
> case UFI_TYPE4:
> if (sc->asic_revision < 0x10)
> rc = oce_sh_be3_flashdata(sc, fw,
> num_imgs);
> else {
> rc = -1;
> device_printf(sc->dev,
> "Cant load SH A0 UFI on B0\n");
> }
> break;
> default:
> rc = -1;
> break;
>
> }
> }
>
> return rc;
> }
>
> static int
> oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
> {
> int rc = 0, num_imgs = 0, i = 0;
> const struct flash_file_hdr *fhdr;
> const struct image_hdr *img_ptr;
>
> fhdr = (const struct flash_file_hdr *)fw->data;
> if (fhdr->build[0] != '3') {
> device_printf(sc->dev, "Invalid BE3 firmware image\n");
> return EINVAL;
> }
> /* Display flash version */
> device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
>
> num_imgs = fhdr->num_imgs;
> for (i = 0; i < num_imgs; i++) {
> img_ptr = (const struct image_hdr *)((const char *)fw->data +
> sizeof(struct flash_file_hdr) +
> (i * sizeof(struct image_hdr)));
> if (img_ptr->imageid == 1) {
> rc = oce_sh_be3_flashdata(sc, fw, num_imgs);
>
> break;
> }
> }
>
> return rc;
> }
>
>