oce_if.h (231437) | oce_if.h (231879) |
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1/*- 2 * Copyright (C) 2012 Emulex 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, --- 22 unchanged lines hidden (view full) --- 31 * Contact Information: 32 * freebsd-drivers@emulex.com 33 * 34 * Emulex 35 * 3333 Susan Street 36 * Costa Mesa, CA 92626 37 */ 38 | 1/*- 2 * Copyright (C) 2012 Emulex 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, --- 22 unchanged lines hidden (view full) --- 31 * Contact Information: 32 * freebsd-drivers@emulex.com 33 * 34 * Emulex 35 * 3333 Susan Street 36 * Costa Mesa, CA 92626 37 */ 38 |
39/* $FreeBSD: head/sys/dev/oce/oce_if.h 231879 2012-02-17 13:55:17Z luigi $ */ |
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39 | 40 |
40/* $FreeBSD: head/sys/dev/oce/oce_if.h 231437 2012-02-10 21:03:04Z luigi $ */ 41 | |
42#include <sys/param.h> 43#include <sys/endian.h> 44#include <sys/module.h> 45#include <sys/kernel.h> 46#include <sys/bus.h> 47#include <sys/mbuf.h> 48#include <sys/rman.h> 49#include <sys/socket.h> --- 33 unchanged lines hidden (view full) --- 83#include <netinet/tcp.h> 84#include <netinet/sctp.h> 85#include <netinet/tcp_lro.h> 86 87#include <machine/bus.h> 88 89#include "oce_hw.h" 90 | 41#include <sys/param.h> 42#include <sys/endian.h> 43#include <sys/module.h> 44#include <sys/kernel.h> 45#include <sys/bus.h> 46#include <sys/mbuf.h> 47#include <sys/rman.h> 48#include <sys/socket.h> --- 33 unchanged lines hidden (view full) --- 82#include <netinet/tcp.h> 83#include <netinet/sctp.h> 84#include <netinet/tcp_lro.h> 85 86#include <machine/bus.h> 87 88#include "oce_hw.h" 89 |
91#define COMPONENT_REVISION "4.2.116.0" | 90/* OCE device driver module component revision informaiton */ 91#define COMPONENT_REVISION "4.2.127.0" |
92 | 92 |
93 |
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93/* OCE devices supported by this driver */ 94#define PCI_VENDOR_EMULEX 0x10df /* Emulex */ 95#define PCI_VENDOR_SERVERENGINES 0x19a2 /* ServerEngines (BE) */ 96#define PCI_PRODUCT_BE2 0x0700 /* BE2 network adapter */ 97#define PCI_PRODUCT_BE3 0x0710 /* BE3 network adapter */ 98#define PCI_PRODUCT_XE201 0xe220 /* XE201 network adapter */ 99#define PCI_PRODUCT_XE201_VF 0xe228 /* XE201 with VF in Lancer */ 100 --- 5 unchanged lines hidden (view full) --- 106 107/* proportion Service Level Interface queues */ 108#define OCE_MAX_UNITS 2 109#define OCE_MAX_PPORT OCE_MAX_UNITS 110#define OCE_MAX_VPORT OCE_MAX_UNITS 111 112extern int mp_ncpus; /* system's total active cpu cores */ 113#define OCE_NCPUS mp_ncpus | 94/* OCE devices supported by this driver */ 95#define PCI_VENDOR_EMULEX 0x10df /* Emulex */ 96#define PCI_VENDOR_SERVERENGINES 0x19a2 /* ServerEngines (BE) */ 97#define PCI_PRODUCT_BE2 0x0700 /* BE2 network adapter */ 98#define PCI_PRODUCT_BE3 0x0710 /* BE3 network adapter */ 99#define PCI_PRODUCT_XE201 0xe220 /* XE201 network adapter */ 100#define PCI_PRODUCT_XE201_VF 0xe228 /* XE201 with VF in Lancer */ 101 --- 5 unchanged lines hidden (view full) --- 107 108/* proportion Service Level Interface queues */ 109#define OCE_MAX_UNITS 2 110#define OCE_MAX_PPORT OCE_MAX_UNITS 111#define OCE_MAX_VPORT OCE_MAX_UNITS 112 113extern int mp_ncpus; /* system's total active cpu cores */ 114#define OCE_NCPUS mp_ncpus |
114#define OCE_MAX_RSS 8 /* This should be powers of 2. Like 2,4,8 & 16 */ | 115 116/* This should be powers of 2. Like 2,4,8 & 16 */ 117#define OCE_MAX_RSS 4 /* TODO: 8*/ |
115#define OCE_LEGACY_MODE_RSS 4 /* For BE3 Legacy mode*/ 116 117#define OCE_MIN_RQ 1 118#define OCE_MIN_WQ 1 119 120#define OCE_MAX_RQ OCE_MAX_RSS + 1 /* one default queue */ 121#define OCE_MAX_WQ 8 122 --- 43 unchanged lines hidden (view full) --- 166/* Interface capabilities to enable by default (others set dynamically) */ 167#define OCE_CAPAB_ENABLE (MBX_RX_IFACE_FLAGS_BROADCAST | \ 168 MBX_RX_IFACE_FLAGS_UNTAGGED | \ 169 MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR) 170 171#define OCE_IF_HWASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP) 172#define OCE_IF_CAPABILITIES (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \ 173 IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | \ | 118#define OCE_LEGACY_MODE_RSS 4 /* For BE3 Legacy mode*/ 119 120#define OCE_MIN_RQ 1 121#define OCE_MIN_WQ 1 122 123#define OCE_MAX_RQ OCE_MAX_RSS + 1 /* one default queue */ 124#define OCE_MAX_WQ 8 125 --- 43 unchanged lines hidden (view full) --- 169/* Interface capabilities to enable by default (others set dynamically) */ 170#define OCE_CAPAB_ENABLE (MBX_RX_IFACE_FLAGS_BROADCAST | \ 171 MBX_RX_IFACE_FLAGS_UNTAGGED | \ 172 MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR) 173 174#define OCE_IF_HWASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP) 175#define OCE_IF_CAPABILITIES (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \ 176 IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | \ |
174 IFCAP_VLAN_HWTSO | IFCAP_JUMBO_MTU | \ 175 IFCAP_VLAN_MTU) | 177 IFCAP_JUMBO_MTU | IFCAP_VLAN_MTU) |
176#define OCE_IF_HWASSIST_NONE 0 177#define OCE_IF_CAPABILITIES_NONE 0 178 179 180#define ETH_ADDR_LEN 6 181#define MAX_VLANFILTER_SIZE 64 182#define MAX_VLANS 4096 183 --- 646 unchanged lines hidden (view full) --- 830 eventhandler_tag vlan_detach; 831 uint16_t vlans_added; 832 uint8_t vlan_tag[MAX_VLANS]; 833 /*stats */ 834 OCE_DMA_MEM stats_mem; 835 struct oce_drv_stats oce_stats_info; 836 struct callout timer; 837 int8_t be3_native; | 178#define OCE_IF_HWASSIST_NONE 0 179#define OCE_IF_CAPABILITIES_NONE 0 180 181 182#define ETH_ADDR_LEN 6 183#define MAX_VLANFILTER_SIZE 64 184#define MAX_VLANS 4096 185 --- 646 unchanged lines hidden (view full) --- 832 eventhandler_tag vlan_detach; 833 uint16_t vlans_added; 834 uint8_t vlan_tag[MAX_VLANS]; 835 /*stats */ 836 OCE_DMA_MEM stats_mem; 837 struct oce_drv_stats oce_stats_info; 838 struct callout timer; 839 int8_t be3_native; |
840 uint32_t pvid; |
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838 839} OCE_SOFTC, *POCE_SOFTC; 840 841 842 843/************************************************** 844 * BUS memory read/write macros 845 * BE3: accesses three BAR spaces (CFG, CSR, DB) --- 75 unchanged lines hidden (view full) --- 921void oce_drain_rq_cq(struct oce_rq *rq); 922void oce_drain_wq_cq(struct oce_wq *wq); 923 924uint32_t oce_page_list(oce_ring_buffer_t *ring, struct phys_addr *pa_list); 925 926/*********************************************************** 927 * cleanup functions 928 ***********************************************************/ | 841 842} OCE_SOFTC, *POCE_SOFTC; 843 844 845 846/************************************************** 847 * BUS memory read/write macros 848 * BE3: accesses three BAR spaces (CFG, CSR, DB) --- 75 unchanged lines hidden (view full) --- 924void oce_drain_rq_cq(struct oce_rq *rq); 925void oce_drain_wq_cq(struct oce_wq *wq); 926 927uint32_t oce_page_list(oce_ring_buffer_t *ring, struct phys_addr *pa_list); 928 929/*********************************************************** 930 * cleanup functions 931 ***********************************************************/ |
929void oce_free_lro(POCE_SOFTC sc); | |
930void oce_stop_rx(POCE_SOFTC sc); 931void oce_intr_free(POCE_SOFTC sc); 932void oce_free_posted_rxbuf(struct oce_rq *rq); | 932void oce_stop_rx(POCE_SOFTC sc); 933void oce_intr_free(POCE_SOFTC sc); 934void oce_free_posted_rxbuf(struct oce_rq *rq); |
935#if defined(INET6) || defined(INET) 936void oce_free_lro(POCE_SOFTC sc); 937#endif |
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933 934 935/************************************************************ 936 * Mailbox functions 937 ************************************************************/ 938int oce_fw_clean(POCE_SOFTC sc); 939int oce_reset_fun(POCE_SOFTC sc); 940int oce_mbox_init(POCE_SOFTC sc); 941int oce_mbox_dispatch(POCE_SOFTC sc, uint32_t tmo_sec); 942int oce_get_fw_version(POCE_SOFTC sc); | 938 939 940/************************************************************ 941 * Mailbox functions 942 ************************************************************/ 943int oce_fw_clean(POCE_SOFTC sc); 944int oce_reset_fun(POCE_SOFTC sc); 945int oce_mbox_init(POCE_SOFTC sc); 946int oce_mbox_dispatch(POCE_SOFTC sc, uint32_t tmo_sec); 947int oce_get_fw_version(POCE_SOFTC sc); |
948int oce_first_mcc_cmd(POCE_SOFTC sc); 949 |
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943int oce_read_mac_addr(POCE_SOFTC sc, uint32_t if_id, uint8_t perm, 944 uint8_t type, struct mac_address_format *mac); 945int oce_get_fw_config(POCE_SOFTC sc); 946int oce_if_create(POCE_SOFTC sc, uint32_t cap_flags, uint32_t en_flags, 947 uint16_t vlan_tag, uint8_t *mac_addr, uint32_t *if_id); 948int oce_if_del(POCE_SOFTC sc, uint32_t if_id); 949int oce_config_vlan(POCE_SOFTC sc, uint32_t if_id, 950 struct normal_vlan *vtag_arr, uint8_t vtag_cnt, --- 121 unchanged lines hidden --- | 950int oce_read_mac_addr(POCE_SOFTC sc, uint32_t if_id, uint8_t perm, 951 uint8_t type, struct mac_address_format *mac); 952int oce_get_fw_config(POCE_SOFTC sc); 953int oce_if_create(POCE_SOFTC sc, uint32_t cap_flags, uint32_t en_flags, 954 uint16_t vlan_tag, uint8_t *mac_addr, uint32_t *if_id); 955int oce_if_del(POCE_SOFTC sc, uint32_t if_id); 956int oce_config_vlan(POCE_SOFTC sc, uint32_t if_id, 957 struct normal_vlan *vtag_arr, uint8_t vtag_cnt, --- 121 unchanged lines hidden --- |