39c39
< /* $FreeBSD: head/sys/dev/oce/oce_hw.h 231437 2012-02-10 21:03:04Z luigi $ */
---
> /* $FreeBSD: head/sys/dev/oce/oce_hw.h 231879 2012-02-17 13:55:17Z luigi $ */
156a157,159
> #define ASYNC_EVENT_GRP5 0x5
> #define ASYNC_EVENT_PVID_STATE 0x3
> #define VLAN_VID_MASK 0x0FFF
613c616,619
< uint32_t rsvd0:27;
---
> uint32_t rsvd0:3;
> uint32_t async_type:8;
> uint32_t event_type:8;
> uint32_t rsvd1:8;
621c627,630
< uint32_t rsvd0:27;
---
> uint32_t rsvd1:8;
> uint32_t event_type:8;
> uint32_t async_type:8;
> uint32_t rsvd0:3;
689a699,755
>
> /* PVID aync event */
> struct oce_async_event_grp5_pvid_state {
> uint8_t enabled;
> uint8_t rsvd0;
> uint16_t tag;
> uint32_t event_tag;
> uint32_t rsvd1;
> uint32_t code;
> };
>
> typedef union oce_mq_ext_ctx_u {
> uint32_t dw[6];
> struct {
> #ifdef _BIG_ENDIAN
> /* dw0 */
> uint32_t dw4rsvd1:16;
> uint32_t num_pages:16;
> /* dw1 */
> uint32_t async_evt_bitmap;
> /* dw2 */
> uint32_t cq_id:10;
> uint32_t dw5rsvd2:2;
> uint32_t ring_size:4;
> uint32_t dw5rsvd1:16;
> /* dw3 */
> uint32_t valid:1;
> uint32_t dw6rsvd1:31;
> /* dw4 */
> uint32_t dw7rsvd1:21;
> uint32_t async_cq_id:10;
> uint32_t async_cq_valid:1;
> #else
> /* dw0 */
> uint32_t num_pages:16;
> uint32_t dw4rsvd1:16;
> /* dw1 */
> uint32_t async_evt_bitmap;
> /* dw2 */
> uint32_t dw5rsvd1:16;
> uint32_t ring_size:4;
> uint32_t dw5rsvd2:2;
> uint32_t cq_id:10;
> /* dw3 */
> uint32_t dw6rsvd1:31;
> uint32_t valid:1;
> /* dw4 */
> uint32_t async_cq_valid:1;
> uint32_t async_cq_id:10;
> uint32_t dw7rsvd1:21;
> #endif
> /* dw5 */
> uint32_t dw8rsvd1;
> } v0;
> } oce_mq_ext_ctx_t;
>
>
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> struct mbx_create_common_mq_ex {
> struct mbx_hdr hdr;
> union {
> struct {
> oce_mq_ext_ctx_t context;
> struct phys_addr pages[8];
> } req;
>
> struct {
> uint32_t mq_id:16;
> uint32_t rsvd0:16;
> } rsp;
> } params;
> };
>
>
>
1587c1670
< FNM_UMC_MODE = 0x80000, /* Set when UMC mode is set */
---
> FNM_UMC_MODE = 0x1000000, /* Set when UMC mode is set */