1/*-
2 * Copyright (C) 2012 Emulex
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,

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31 * Contact Information:
32 * freebsd-drivers@emulex.com
33 *
34 * Emulex
35 * 3333 Susan Street
36 * Costa Mesa, CA 92626
37 */
38
39/* $FreeBSD: head/sys/dev/oce/oce_hw.h 231437 2012-02-10 21:03:04Z luigi $ */
40
41#include <sys/types.h>
42
43#undef _BIG_ENDIAN /* TODO */
44#pragma pack(1)
45
46#define OC_CNA_GEN2 0x2
47#define OC_CNA_GEN3 0x3

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149#define MQ_RING_CONTEXT_SIZE_64 0x7 /* (64 entries) */
150#define MQ_RING_CONTEXT_SIZE_128 0x8 /* (128 entries) */
151
152#define MBX_DB_READY_BIT 0x1
153#define MBX_DB_HI_BIT 0x2
154#define ASYNC_EVENT_CODE_LINK_STATE 0x1
155#define ASYNC_EVENT_LINK_UP 0x1
156#define ASYNC_EVENT_LINK_DOWN 0x0
157
158/* port link_status */
159#define ASYNC_EVENT_LOGICAL 0x02
160
161/* Logical Link Status */
162#define NTWK_LOGICAL_LINK_DOWN 0
163#define NTWK_LOGICAL_LINK_UP 1
164

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605 /* dw1 dw2 */
606 uint32_t mq_tag[2];
607 /* dw3 */
608 uint32_t valid:1;
609 uint32_t async_event:1;
610 uint32_t hpi_buffer_cmpl:1;
611 uint32_t completed:1;
612 uint32_t consumed:1;
613 uint32_t rsvd0:27;
614#else
615 /* dw0 */
616 uint32_t completion_status:16;
617 uint32_t extended_status:16;
618 /* dw1 dw2 */
619 uint32_t mq_tag[2];
620 /* dw3 */
621 uint32_t rsvd0:27;
622 uint32_t consumed:1;
623 uint32_t completed:1;
624 uint32_t hpi_buffer_cmpl:1;
625 uint32_t async_event:1;
626 uint32_t valid:1;
627#endif
628 } s;
629 uint32_t dw[4];

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682 uint32_t async_event:1;
683 uint32_t valid:1;
684#endif
685 } s;
686 uint32_t dw[4];
687 } u0;
688};
689
690/* MQ mailbox structure */
691struct oce_bmbx {
692 struct oce_mbx mbx;
693 struct oce_mq_cqe cqe;
694};
695
696/* ---[ MBXs start here ]---------------------------------------------- */
697/* MBXs sub system codes */

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1337
1338 struct {
1339 uint32_t mq_id:16;
1340 uint32_t rsvd0:16;
1341 } rsp;
1342 } params;
1343};
1344
1345/* [53] OPCODE_COMMON_DESTROY_MQ */
1346struct mbx_destroy_common_mq {
1347 struct mbx_hdr hdr;
1348 union {
1349 struct {
1350#ifdef _BIG_ENDIAN
1351 uint16_t rsvd0;
1352 uint16_t id;

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1579 FNM_FLEX10_MODE = 0x400, /* QinQ, FLEX-10 or VNIC */
1580 FNM_NCSI_MODE = 0x800, /* NCSI supported */
1581 FNM_IPV6_MODE = 0x1000, /* IPV6 stack enabled */
1582 FNM_BE2_COMPAT_MODE = 0x2000, /* BE2 compatibility (BE3 disable)*/
1583 FNM_INVALID_MODE = 0x8000, /* Invalid */
1584 FNM_BE3_COMPAT_MODE = 0x10000, /* BE3 features */
1585 FNM_VNIC_MODE = 0x20000, /* Set when IBM vNIC mode is set */
1586 FNM_VNTAG_MODE = 0x40000, /* Set when VNTAG mode is set */
1587 FNM_UMC_MODE = 0x80000, /* Set when UMC mode is set */
1588 FNM_UMC_DEF_EN = 0x100000, /* Set when UMC Default is set */
1589 FNM_ONE_GB_EN = 0x200000, /* Set when 1GB Default is set */
1590 FNM_VNIC_DEF_VALID = 0x400000, /* Set when VNIC_DEF_EN is valid */
1591 FNM_VNIC_DEF_EN = 0x800000 /* Set when VNIC Default enabled */
1592};
1593
1594
1595struct mbx_common_config_vlan {

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