mrsas.c (299669) | mrsas.c (299670) |
---|---|
1/* 2 * Copyright (c) 2015, AVAGO Tech. All rights reserved. Author: Marian Choy 3 * Copyright (c) 2014, LSI Corp. All rights reserved. Author: Marian Choy 4 * Support: freebsdraid@avagotech.com 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: --- 24 unchanged lines hidden (view full) --- 33 * official policies,either expressed or implied, of the FreeBSD Project. 34 * 35 * Send feedback to: <megaraidfbsd@avagotech.com> Mail to: AVAGO TECHNOLOGIES 1621 36 * Barber Lane, Milpitas, CA 95035 ATTN: MegaRaid FreeBSD 37 * 38 */ 39 40#include <sys/cdefs.h> | 1/* 2 * Copyright (c) 2015, AVAGO Tech. All rights reserved. Author: Marian Choy 3 * Copyright (c) 2014, LSI Corp. All rights reserved. Author: Marian Choy 4 * Support: freebsdraid@avagotech.com 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: --- 24 unchanged lines hidden (view full) --- 33 * official policies,either expressed or implied, of the FreeBSD Project. 34 * 35 * Send feedback to: <megaraidfbsd@avagotech.com> Mail to: AVAGO TECHNOLOGIES 1621 36 * Barber Lane, Milpitas, CA 95035 ATTN: MegaRaid FreeBSD 37 * 38 */ 39 40#include <sys/cdefs.h> |
41__FBSDID("$FreeBSD: head/sys/dev/mrsas/mrsas.c 299669 2016-05-13 12:15:20Z kadesai $"); | 41__FBSDID("$FreeBSD: head/sys/dev/mrsas/mrsas.c 299670 2016-05-13 12:18:12Z kadesai $"); |
42 43#include <dev/mrsas/mrsas.h> 44#include <dev/mrsas/mrsas_ioctl.h> 45 46#include <cam/cam.h> 47#include <cam/cam_ccb.h> 48 49#include <sys/sysctl.h> --- 131 unchanged lines hidden (view full) --- 181 uint16_t subdevice; 182 const char *desc; 183} MRSAS_CTLR_ID; 184 185MRSAS_CTLR_ID device_table[] = { 186 {0x1000, MRSAS_TBOLT, 0xffff, 0xffff, "AVAGO Thunderbolt SAS Controller"}, 187 {0x1000, MRSAS_INVADER, 0xffff, 0xffff, "AVAGO Invader SAS Controller"}, 188 {0x1000, MRSAS_FURY, 0xffff, 0xffff, "AVAGO Fury SAS Controller"}, | 42 43#include <dev/mrsas/mrsas.h> 44#include <dev/mrsas/mrsas_ioctl.h> 45 46#include <cam/cam.h> 47#include <cam/cam_ccb.h> 48 49#include <sys/sysctl.h> --- 131 unchanged lines hidden (view full) --- 181 uint16_t subdevice; 182 const char *desc; 183} MRSAS_CTLR_ID; 184 185MRSAS_CTLR_ID device_table[] = { 186 {0x1000, MRSAS_TBOLT, 0xffff, 0xffff, "AVAGO Thunderbolt SAS Controller"}, 187 {0x1000, MRSAS_INVADER, 0xffff, 0xffff, "AVAGO Invader SAS Controller"}, 188 {0x1000, MRSAS_FURY, 0xffff, 0xffff, "AVAGO Fury SAS Controller"}, |
189 {0x1000, MRSAS_INTRUDER, 0xffff, 0xffff, "AVAGO Intruder SAS Controller"}, 190 {0x1000, MRSAS_INTRUDER_24, 0xffff, 0xffff, "AVAGO Intruder_24 SAS Controller"}, |
|
189 {0, 0, 0, 0, NULL} 190}; 191 192/* 193 * Character device entry points 194 * 195 */ 196static struct cdevsw mrsas_cdevsw = { --- 1426 unchanged lines hidden (view full) --- 1623 /* 1624 * Write to reply post index after completing threshold reply 1625 * count and still there are more replies in reply queue 1626 * pending to be completed. 1627 */ 1628 if (threshold_reply_count >= THRESHOLD_REPLY_COUNT) { 1629 if (sc->msix_enable) { 1630 if ((sc->device_id == MRSAS_INVADER) || | 191 {0, 0, 0, 0, NULL} 192}; 193 194/* 195 * Character device entry points 196 * 197 */ 198static struct cdevsw mrsas_cdevsw = { --- 1426 unchanged lines hidden (view full) --- 1625 /* 1626 * Write to reply post index after completing threshold reply 1627 * count and still there are more replies in reply queue 1628 * pending to be completed. 1629 */ 1630 if (threshold_reply_count >= THRESHOLD_REPLY_COUNT) { 1631 if (sc->msix_enable) { 1632 if ((sc->device_id == MRSAS_INVADER) || |
1631 (sc->device_id == MRSAS_FURY)) | 1633 (sc->device_id == MRSAS_FURY) || 1634 (sc->device_id == MRSAS_INTRUDER) || 1635 (sc->device_id == MRSAS_INTRUDER_24)) |
1632 mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1633 ((MSIxIndex & 0x7) << 24) | 1634 sc->last_reply_idx[MSIxIndex]); 1635 else 1636 mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1637 sc->last_reply_idx[MSIxIndex]); 1638 } else 1639 mrsas_write_reg(sc, offsetof(mrsas_reg_set, --- 5 unchanged lines hidden (view full) --- 1645 1646 /* No match, just return */ 1647 if (num_completed == 0) 1648 return (DONE); 1649 1650 /* Clear response interrupt */ 1651 if (sc->msix_enable) { 1652 if ((sc->device_id == MRSAS_INVADER) || | 1636 mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1637 ((MSIxIndex & 0x7) << 24) | 1638 sc->last_reply_idx[MSIxIndex]); 1639 else 1640 mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1641 sc->last_reply_idx[MSIxIndex]); 1642 } else 1643 mrsas_write_reg(sc, offsetof(mrsas_reg_set, --- 5 unchanged lines hidden (view full) --- 1649 1650 /* No match, just return */ 1651 if (num_completed == 0) 1652 return (DONE); 1653 1654 /* Clear response interrupt */ 1655 if (sc->msix_enable) { 1656 if ((sc->device_id == MRSAS_INVADER) || |
1653 (sc->device_id == MRSAS_FURY)) { | 1657 (sc->device_id == MRSAS_FURY) || 1658 (sc->device_id == MRSAS_INTRUDER) || 1659 (sc->device_id == MRSAS_INTRUDER_24)) { |
1654 mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1655 ((MSIxIndex & 0x7) << 24) | 1656 sc->last_reply_idx[MSIxIndex]); 1657 } else 1658 mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1659 sc->last_reply_idx[MSIxIndex]); 1660 } else 1661 mrsas_write_reg(sc, offsetof(mrsas_reg_set, --- 782 unchanged lines hidden (view full) --- 2444 2445 init_frame = (struct mrsas_init_frame *)sc->ioc_init_mem; 2446 init_frame->cmd = MFI_CMD_INIT; 2447 init_frame->cmd_status = 0xFF; 2448 init_frame->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 2449 2450 /* driver support Extended MSIX */ 2451 if ((sc->device_id == MRSAS_INVADER) || | 1660 mrsas_write_reg(sc, sc->msix_reg_offset[MSIxIndex / 8], 1661 ((MSIxIndex & 0x7) << 24) | 1662 sc->last_reply_idx[MSIxIndex]); 1663 } else 1664 mrsas_write_reg(sc, sc->msix_reg_offset[0], (MSIxIndex << 24) | 1665 sc->last_reply_idx[MSIxIndex]); 1666 } else 1667 mrsas_write_reg(sc, offsetof(mrsas_reg_set, --- 782 unchanged lines hidden (view full) --- 2450 2451 init_frame = (struct mrsas_init_frame *)sc->ioc_init_mem; 2452 init_frame->cmd = MFI_CMD_INIT; 2453 init_frame->cmd_status = 0xFF; 2454 init_frame->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 2455 2456 /* driver support Extended MSIX */ 2457 if ((sc->device_id == MRSAS_INVADER) || |
2452 (sc->device_id == MRSAS_FURY)) { | 2458 (sc->device_id == MRSAS_FURY) || 2459 (sc->device_id == MRSAS_INTRUDER) || 2460 (sc->device_id == MRSAS_INTRUDER_24)) { |
2453 init_frame->driver_operations. 2454 mfi_capabilities.support_additional_msix = 1; 2455 } 2456 if (sc->verbuf_mem) { 2457 snprintf((char *)sc->verbuf_mem, strlen(MRSAS_VERSION) + 2, "%s\n", 2458 MRSAS_VERSION); 2459 init_frame->driver_ver_lo = (bus_addr_t)sc->verbuf_phys_addr; 2460 init_frame->driver_ver_hi = 0; --- 1017 unchanged lines hidden (view full) --- 3478 * mrsas_complete_cmd. 3479 */ 3480 3481 if (frame_hdr->flags & MFI_FRAME_DONT_POST_IN_REPLY_QUEUE) 3482 mpt_cmd->flags = MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 3483 3484 io_req = mpt_cmd->io_request; 3485 | 2461 init_frame->driver_operations. 2462 mfi_capabilities.support_additional_msix = 1; 2463 } 2464 if (sc->verbuf_mem) { 2465 snprintf((char *)sc->verbuf_mem, strlen(MRSAS_VERSION) + 2, "%s\n", 2466 MRSAS_VERSION); 2467 init_frame->driver_ver_lo = (bus_addr_t)sc->verbuf_phys_addr; 2468 init_frame->driver_ver_hi = 0; --- 1017 unchanged lines hidden (view full) --- 3486 * mrsas_complete_cmd. 3487 */ 3488 3489 if (frame_hdr->flags & MFI_FRAME_DONT_POST_IN_REPLY_QUEUE) 3490 mpt_cmd->flags = MFI_FRAME_DONT_POST_IN_REPLY_QUEUE; 3491 3492 io_req = mpt_cmd->io_request; 3493 |
3486 if ((sc->device_id == MRSAS_INVADER) || (sc->device_id == MRSAS_FURY)) { | 3494 if ((sc->device_id == MRSAS_INVADER) || 3495 (sc->device_id == MRSAS_FURY) || 3496 (sc->device_id == MRSAS_INTRUDER) || 3497 (sc->device_id == MRSAS_INTRUDER_24)) { |
3487 pMpi25IeeeSgeChain64_t sgl_ptr_end = (pMpi25IeeeSgeChain64_t)&io_req->SGL; 3488 3489 sgl_ptr_end += sc->max_sge_in_main_msg - 1; 3490 sgl_ptr_end->Flags = 0; 3491 } 3492 mpi25_ieee_chain = (MPI25_IEEE_SGE_CHAIN64 *) & io_req->SGL.IeeeChain; 3493 3494 io_req->Function = MRSAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST; --- 991 unchanged lines hidden --- | 3498 pMpi25IeeeSgeChain64_t sgl_ptr_end = (pMpi25IeeeSgeChain64_t)&io_req->SGL; 3499 3500 sgl_ptr_end += sc->max_sge_in_main_msg - 1; 3501 sgl_ptr_end->Flags = 0; 3502 } 3503 mpi25_ieee_chain = (MPI25_IEEE_SGE_CHAIN64 *) & io_req->SGL.IeeeChain; 3504 3505 io_req->Function = MRSAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST; --- 991 unchanged lines hidden --- |