1/*- 2 * Copyright (c) 1999 Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 *
| 1/*- 2 * Copyright (c) 1999 Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 *
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26 * $FreeBSD: head/sys/dev/mlx/mlxvar.h 119665 2003-09-02 08:30:31Z scottl $
| 26 * $FreeBSD: head/sys/dev/mlx/mlxvar.h 125975 2004-02-18 21:36:53Z phk $
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27 */ 28 29/* 30 * Debugging levels: 31 * 0 - quiet, only emit warnings 32 * 1 - noisy, emit major function points and things done 33 * 2 - extremely noisy, emit trace items in loops, etc. 34 */ 35#ifdef MLX_DEBUG 36#define debug(level, fmt, args...) do { if (level <= MLX_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0) 37#define debug_called(level) do { if (level <= MLX_DEBUG) printf(__func__ ": called\n"); } while(0) 38#else 39#define debug(level, fmt, args...) 40#define debug_called(level) 41#endif 42 43/* 44 * Regardless of the actual capacity of the controller, we will allocate space 45 * for 64 s/g entries. Typically controllers support 17 or 33 entries (64k or 46 * 128k maximum transfer assuming 4k page size and non-optimal alignment), but 47 * making that fit cleanly without crossing page boundaries requires rounding up 48 * to the next power of two. 49 */ 50#define MLX_NSEG 64 51 52#define MLX_NSLOTS 256 /* max number of command slots */ 53 54#define MLX_MAXDRIVES 32 /* max number of system drives */ 55 56/* 57 * Structure describing a System Drive as attached to the controller. 58 */ 59struct mlx_sysdrive 60{ 61 /* from MLX_CMD_ENQSYSDRIVE */ 62 u_int32_t ms_size; 63 int ms_state; 64 int ms_raidlevel; 65 66 /* synthetic geometry */ 67 int ms_cylinders; 68 int ms_heads; 69 int ms_sectors; 70 71 /* handle for attached driver */ 72 device_t ms_disk; 73}; 74 75/* 76 * Per-command control structure. 77 */ 78struct mlx_command 79{ 80 TAILQ_ENTRY(mlx_command) mc_link; /* list linkage */ 81 82 struct mlx_softc *mc_sc; /* controller that owns us */ 83 u_int8_t mc_slot; /* command slot we occupy */ 84 u_int16_t mc_status; /* command completion status */ 85 time_t mc_timeout; /* when this command expires */ 86 u_int8_t mc_mailbox[16]; /* command mailbox */ 87 u_int32_t mc_sgphys; /* physical address of s/g array in controller space */ 88 int mc_nsgent; /* number of entries in s/g map */ 89 int mc_flags; 90#define MLX_CMD_DATAIN (1<<0) 91#define MLX_CMD_DATAOUT (1<<1) 92#define MLX_CMD_PRIORITY (1<<2) /* high-priority command */ 93 94 void *mc_data; /* data buffer */ 95 size_t mc_length; 96 bus_dmamap_t mc_dmamap; /* DMA map for data */ 97 u_int32_t mc_dataphys; /* data buffer base address controller space */ 98 99 void (* mc_complete)(struct mlx_command *mc); /* completion handler */ 100 void *mc_private; /* submitter-private data or wait channel */ 101 int mc_command; 102}; 103 104/* 105 * Per-controller structure. 106 */ 107struct mlx_softc 108{ 109 /* bus connections */ 110 device_t mlx_dev; 111 dev_t mlx_dev_t; 112 struct resource *mlx_mem; /* mailbox interface window */ 113 int mlx_mem_rid; 114 int mlx_mem_type; 115 bus_space_handle_t mlx_bhandle; /* bus space handle */ 116 bus_space_tag_t mlx_btag; /* bus space tag */ 117 bus_dma_tag_t mlx_parent_dmat;/* parent DMA tag */ 118 bus_dma_tag_t mlx_buffer_dmat;/* data buffer DMA tag */ 119 struct resource *mlx_irq; /* interrupt */ 120 void *mlx_intr; /* interrupt handle */ 121 122 /* scatter/gather lists and their controller-visible mappings */ 123 struct mlx_sgentry *mlx_sgtable; /* s/g lists */ 124 u_int32_t mlx_sgbusaddr; /* s/g table base address in bus space */ 125 bus_dma_tag_t mlx_sg_dmat; /* s/g buffer DMA tag */ 126 bus_dmamap_t mlx_sg_dmamap; /* map for s/g buffers */ 127 128 /* controller limits and features */ 129 struct mlx_enquiry2 *mlx_enq2; 130 int mlx_feature; /* controller features/quirks */ 131#define MLX_FEAT_PAUSEWORKS (1<<0) /* channel pause works as expected */ 132 133 /* controller queues and arrays */ 134 TAILQ_HEAD(, mlx_command) mlx_freecmds; /* command structures available for reuse */ 135 TAILQ_HEAD(, mlx_command) mlx_work; /* active commands */ 136 struct mlx_command *mlx_busycmd[MLX_NSLOTS]; /* busy commands */ 137 int mlx_busycmds; /* count of busy commands */ 138 struct mlx_sysdrive mlx_sysdrive[MLX_MAXDRIVES]; /* system drives */ 139 mlx_bioq mlx_bioq; /* outstanding I/O operations */ 140 int mlx_waitbufs; /* number of bufs awaiting commands */ 141 142 /* controller status */ 143 int mlx_geom; 144#define MLX_GEOM_128_32 0 /* geoemetry translation modes */ 145#define MLX_GEOM_256_63 1 146 int mlx_state; 147#define MLX_STATE_INTEN (1<<0) /* interrupts have been enabled */ 148#define MLX_STATE_SHUTDOWN (1<<1) /* controller is shut down */ 149#define MLX_STATE_OPEN (1<<2) /* control device is open */ 150#define MLX_STATE_SUSPEND (1<<3) /* controller is suspended */ 151 struct callout_handle mlx_timeout; /* periodic status monitor */ 152 time_t mlx_lastpoll; /* last time_second we polled for status */ 153 u_int16_t mlx_lastevent; /* sequence number of the last event we recorded */ 154 int mlx_currevent; /* sequence number last time we looked */ 155 int mlx_background; /* if != 0 rebuild or check is in progress */ 156#define MLX_BACKGROUND_CHECK 1 /* we started a check */ 157#define MLX_BACKGROUND_REBUILD 2 /* we started a rebuild */ 158#define MLX_BACKGROUND_SPONTANEOUS 3 /* it just happened somehow */ 159 struct mlx_rebuild_status mlx_rebuildstat; /* last rebuild status */ 160 struct mlx_pause mlx_pause; /* pending pause operation details */ 161 162 int mlx_locks; /* reentrancy avoidance */ 163 int mlx_flags; 164#define MLX_SPINUP_REPORTED (1<<0) /* "spinning up drives" message displayed */ 165#define MLX_EVENTLOG_BUSY (1<<1) /* currently reading event log */ 166 167 /* interface-specific accessor functions */ 168 int mlx_iftype; /* interface protocol */ 169#define MLX_IFTYPE_2 2 170#define MLX_IFTYPE_3 3 171#define MLX_IFTYPE_4 4 172#define MLX_IFTYPE_5 5 173 int (* mlx_tryqueue)(struct mlx_softc *sc, struct mlx_command *mc); 174 int (* mlx_findcomplete)(struct mlx_softc *sc, u_int8_t *slot, u_int16_t *status); 175 void (* mlx_intaction)(struct mlx_softc *sc, int action); 176 int (* mlx_fw_handshake)(struct mlx_softc *sc, int *error, int *param1, int *param2); 177#define MLX_INTACTION_DISABLE 0 178#define MLX_INTACTION_ENABLE 1 179}; 180 181/* 182 * Simple (stupid) locks. 183 * 184 * Note that these are designed to avoid reentrancy, not concurrency, and will 185 * need to be replaced with something better. 186 */ 187#define MLX_LOCK_COMPLETING (1<<0) 188#define MLX_LOCK_STARTING (1<<1) 189 190static __inline int 191mlx_lock_tas(struct mlx_softc *sc, int lock) 192{ 193 if ((sc)->mlx_locks & (lock)) 194 return(1); 195 atomic_set_int(&sc->mlx_locks, lock); 196 return(0); 197} 198 199static __inline void 200mlx_lock_clr(struct mlx_softc *sc, int lock) 201{ 202 atomic_clear_int(&sc->mlx_locks, lock); 203} 204 205/* 206 * Interface between bus connections and driver core. 207 */ 208extern void mlx_free(struct mlx_softc *sc); 209extern int mlx_attach(struct mlx_softc *sc); 210extern void mlx_startup(struct mlx_softc *sc); 211extern void mlx_intr(void *data); 212extern int mlx_detach(device_t dev); 213extern int mlx_shutdown(device_t dev); 214extern int mlx_suspend(device_t dev); 215extern int mlx_resume(device_t dev); 216extern d_open_t mlx_open; 217extern d_close_t mlx_close; 218extern d_ioctl_t mlx_ioctl; 219 220extern devclass_t mlx_devclass; 221extern devclass_t mlxd_devclass; 222 223/* 224 * Mylex System Disk driver 225 */ 226struct mlxd_softc 227{ 228 device_t mlxd_dev; 229 struct mlx_softc *mlxd_controller; 230 struct mlx_sysdrive *mlxd_drive;
| 27 */ 28 29/* 30 * Debugging levels: 31 * 0 - quiet, only emit warnings 32 * 1 - noisy, emit major function points and things done 33 * 2 - extremely noisy, emit trace items in loops, etc. 34 */ 35#ifdef MLX_DEBUG 36#define debug(level, fmt, args...) do { if (level <= MLX_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0) 37#define debug_called(level) do { if (level <= MLX_DEBUG) printf(__func__ ": called\n"); } while(0) 38#else 39#define debug(level, fmt, args...) 40#define debug_called(level) 41#endif 42 43/* 44 * Regardless of the actual capacity of the controller, we will allocate space 45 * for 64 s/g entries. Typically controllers support 17 or 33 entries (64k or 46 * 128k maximum transfer assuming 4k page size and non-optimal alignment), but 47 * making that fit cleanly without crossing page boundaries requires rounding up 48 * to the next power of two. 49 */ 50#define MLX_NSEG 64 51 52#define MLX_NSLOTS 256 /* max number of command slots */ 53 54#define MLX_MAXDRIVES 32 /* max number of system drives */ 55 56/* 57 * Structure describing a System Drive as attached to the controller. 58 */ 59struct mlx_sysdrive 60{ 61 /* from MLX_CMD_ENQSYSDRIVE */ 62 u_int32_t ms_size; 63 int ms_state; 64 int ms_raidlevel; 65 66 /* synthetic geometry */ 67 int ms_cylinders; 68 int ms_heads; 69 int ms_sectors; 70 71 /* handle for attached driver */ 72 device_t ms_disk; 73}; 74 75/* 76 * Per-command control structure. 77 */ 78struct mlx_command 79{ 80 TAILQ_ENTRY(mlx_command) mc_link; /* list linkage */ 81 82 struct mlx_softc *mc_sc; /* controller that owns us */ 83 u_int8_t mc_slot; /* command slot we occupy */ 84 u_int16_t mc_status; /* command completion status */ 85 time_t mc_timeout; /* when this command expires */ 86 u_int8_t mc_mailbox[16]; /* command mailbox */ 87 u_int32_t mc_sgphys; /* physical address of s/g array in controller space */ 88 int mc_nsgent; /* number of entries in s/g map */ 89 int mc_flags; 90#define MLX_CMD_DATAIN (1<<0) 91#define MLX_CMD_DATAOUT (1<<1) 92#define MLX_CMD_PRIORITY (1<<2) /* high-priority command */ 93 94 void *mc_data; /* data buffer */ 95 size_t mc_length; 96 bus_dmamap_t mc_dmamap; /* DMA map for data */ 97 u_int32_t mc_dataphys; /* data buffer base address controller space */ 98 99 void (* mc_complete)(struct mlx_command *mc); /* completion handler */ 100 void *mc_private; /* submitter-private data or wait channel */ 101 int mc_command; 102}; 103 104/* 105 * Per-controller structure. 106 */ 107struct mlx_softc 108{ 109 /* bus connections */ 110 device_t mlx_dev; 111 dev_t mlx_dev_t; 112 struct resource *mlx_mem; /* mailbox interface window */ 113 int mlx_mem_rid; 114 int mlx_mem_type; 115 bus_space_handle_t mlx_bhandle; /* bus space handle */ 116 bus_space_tag_t mlx_btag; /* bus space tag */ 117 bus_dma_tag_t mlx_parent_dmat;/* parent DMA tag */ 118 bus_dma_tag_t mlx_buffer_dmat;/* data buffer DMA tag */ 119 struct resource *mlx_irq; /* interrupt */ 120 void *mlx_intr; /* interrupt handle */ 121 122 /* scatter/gather lists and their controller-visible mappings */ 123 struct mlx_sgentry *mlx_sgtable; /* s/g lists */ 124 u_int32_t mlx_sgbusaddr; /* s/g table base address in bus space */ 125 bus_dma_tag_t mlx_sg_dmat; /* s/g buffer DMA tag */ 126 bus_dmamap_t mlx_sg_dmamap; /* map for s/g buffers */ 127 128 /* controller limits and features */ 129 struct mlx_enquiry2 *mlx_enq2; 130 int mlx_feature; /* controller features/quirks */ 131#define MLX_FEAT_PAUSEWORKS (1<<0) /* channel pause works as expected */ 132 133 /* controller queues and arrays */ 134 TAILQ_HEAD(, mlx_command) mlx_freecmds; /* command structures available for reuse */ 135 TAILQ_HEAD(, mlx_command) mlx_work; /* active commands */ 136 struct mlx_command *mlx_busycmd[MLX_NSLOTS]; /* busy commands */ 137 int mlx_busycmds; /* count of busy commands */ 138 struct mlx_sysdrive mlx_sysdrive[MLX_MAXDRIVES]; /* system drives */ 139 mlx_bioq mlx_bioq; /* outstanding I/O operations */ 140 int mlx_waitbufs; /* number of bufs awaiting commands */ 141 142 /* controller status */ 143 int mlx_geom; 144#define MLX_GEOM_128_32 0 /* geoemetry translation modes */ 145#define MLX_GEOM_256_63 1 146 int mlx_state; 147#define MLX_STATE_INTEN (1<<0) /* interrupts have been enabled */ 148#define MLX_STATE_SHUTDOWN (1<<1) /* controller is shut down */ 149#define MLX_STATE_OPEN (1<<2) /* control device is open */ 150#define MLX_STATE_SUSPEND (1<<3) /* controller is suspended */ 151 struct callout_handle mlx_timeout; /* periodic status monitor */ 152 time_t mlx_lastpoll; /* last time_second we polled for status */ 153 u_int16_t mlx_lastevent; /* sequence number of the last event we recorded */ 154 int mlx_currevent; /* sequence number last time we looked */ 155 int mlx_background; /* if != 0 rebuild or check is in progress */ 156#define MLX_BACKGROUND_CHECK 1 /* we started a check */ 157#define MLX_BACKGROUND_REBUILD 2 /* we started a rebuild */ 158#define MLX_BACKGROUND_SPONTANEOUS 3 /* it just happened somehow */ 159 struct mlx_rebuild_status mlx_rebuildstat; /* last rebuild status */ 160 struct mlx_pause mlx_pause; /* pending pause operation details */ 161 162 int mlx_locks; /* reentrancy avoidance */ 163 int mlx_flags; 164#define MLX_SPINUP_REPORTED (1<<0) /* "spinning up drives" message displayed */ 165#define MLX_EVENTLOG_BUSY (1<<1) /* currently reading event log */ 166 167 /* interface-specific accessor functions */ 168 int mlx_iftype; /* interface protocol */ 169#define MLX_IFTYPE_2 2 170#define MLX_IFTYPE_3 3 171#define MLX_IFTYPE_4 4 172#define MLX_IFTYPE_5 5 173 int (* mlx_tryqueue)(struct mlx_softc *sc, struct mlx_command *mc); 174 int (* mlx_findcomplete)(struct mlx_softc *sc, u_int8_t *slot, u_int16_t *status); 175 void (* mlx_intaction)(struct mlx_softc *sc, int action); 176 int (* mlx_fw_handshake)(struct mlx_softc *sc, int *error, int *param1, int *param2); 177#define MLX_INTACTION_DISABLE 0 178#define MLX_INTACTION_ENABLE 1 179}; 180 181/* 182 * Simple (stupid) locks. 183 * 184 * Note that these are designed to avoid reentrancy, not concurrency, and will 185 * need to be replaced with something better. 186 */ 187#define MLX_LOCK_COMPLETING (1<<0) 188#define MLX_LOCK_STARTING (1<<1) 189 190static __inline int 191mlx_lock_tas(struct mlx_softc *sc, int lock) 192{ 193 if ((sc)->mlx_locks & (lock)) 194 return(1); 195 atomic_set_int(&sc->mlx_locks, lock); 196 return(0); 197} 198 199static __inline void 200mlx_lock_clr(struct mlx_softc *sc, int lock) 201{ 202 atomic_clear_int(&sc->mlx_locks, lock); 203} 204 205/* 206 * Interface between bus connections and driver core. 207 */ 208extern void mlx_free(struct mlx_softc *sc); 209extern int mlx_attach(struct mlx_softc *sc); 210extern void mlx_startup(struct mlx_softc *sc); 211extern void mlx_intr(void *data); 212extern int mlx_detach(device_t dev); 213extern int mlx_shutdown(device_t dev); 214extern int mlx_suspend(device_t dev); 215extern int mlx_resume(device_t dev); 216extern d_open_t mlx_open; 217extern d_close_t mlx_close; 218extern d_ioctl_t mlx_ioctl; 219 220extern devclass_t mlx_devclass; 221extern devclass_t mlxd_devclass; 222 223/* 224 * Mylex System Disk driver 225 */ 226struct mlxd_softc 227{ 228 device_t mlxd_dev; 229 struct mlx_softc *mlxd_controller; 230 struct mlx_sysdrive *mlxd_drive;
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231 struct disk mlxd_disk;
| 231 struct disk *mlxd_disk;
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232 int mlxd_unit; 233 int mlxd_flags; 234#define MLXD_OPEN (1<<0) /* drive is open (can't shut down) */ 235}; 236 237/* 238 * Interface between driver core and disk driver (should be using a bus?) 239 */ 240extern int mlx_submit_buf(struct mlx_softc *sc, mlx_bio *bp); 241extern int mlx_submit_ioctl(struct mlx_softc *sc, 242 struct mlx_sysdrive *drive, u_long cmd, 243 caddr_t addr, int32_t flag, struct thread *td); 244extern void mlxd_intr(void *data); 245 246
| 232 int mlxd_unit; 233 int mlxd_flags; 234#define MLXD_OPEN (1<<0) /* drive is open (can't shut down) */ 235}; 236 237/* 238 * Interface between driver core and disk driver (should be using a bus?) 239 */ 240extern int mlx_submit_buf(struct mlx_softc *sc, mlx_bio *bp); 241extern int mlx_submit_ioctl(struct mlx_softc *sc, 242 struct mlx_sysdrive *drive, u_long cmd, 243 caddr_t addr, int32_t flag, struct thread *td); 244extern void mlxd_intr(void *data); 245 246
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