| jmphyreg.h (179335) | jmphyreg.h (216551) |
|---|---|
| 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/mii/jmphyreg.h 179335 2008-05-27 01:16:40Z yongari $ | 27 * $FreeBSD: head/sys/dev/mii/jmphyreg.h 216551 2010-12-18 23:52:50Z yongari $ |
| 28 */ 29 30#ifndef _DEV_MII_JMPHYREG_H_ 31#define _DEV_MII_JMPHYREG_H_ 32 33/* 34 * Registers for the JMicron JMC250 Gigabit PHY. 35 */ --- 64 unchanged lines hidden (view full) --- 100#define JMPHY_LED2_MODE_MASK 0x0F00 101#define JMPHY_LED1_MODE_MASK 0x00F0 102#define JMPHY_LED0_MODE_MASK 0x000F 103 104/* PHY specific test mode control register. */ 105#define JMPHY_TMCTL 0x1A 106#define JMPHY_TMCTL_SLEEP_ENB 0x1000 107 | 28 */ 29 30#ifndef _DEV_MII_JMPHYREG_H_ 31#define _DEV_MII_JMPHYREG_H_ 32 33/* 34 * Registers for the JMicron JMC250 Gigabit PHY. 35 */ --- 64 unchanged lines hidden (view full) --- 100#define JMPHY_LED2_MODE_MASK 0x0F00 101#define JMPHY_LED1_MODE_MASK 0x00F0 102#define JMPHY_LED0_MODE_MASK 0x000F 103 104/* PHY specific test mode control register. */ 105#define JMPHY_TMCTL 0x1A 106#define JMPHY_TMCTL_SLEEP_ENB 0x1000 107 |
| 108/* PHY specific configuration register. */ 109#define JMPHY_SPEC_ADDR 0x1E 110#define JMPHY_SPEC_ADDR_READ 0x4000 111#define JMPHY_SPEC_ADDR_WRITE 0x8000 112 113#define JMPHY_SPEC_DATA 0x1F 114 115#define JMPHY_EXT_COMM_2 0x32 116 |
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| 108#endif /* _DEV_MII_JMPHYREG_H_ */ | 117#endif /* _DEV_MII_JMPHYREG_H_ */ |