1/*- 2 * Principal Author: Parag Patel 3 * Copyright (c) 2001 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 16 unchanged lines hidden (view full) --- 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * Additional Copyright (c) 2001 by Traakan Software under same licence. 29 * Secondary Author: Matthew Jacob 30 */ 31 32#include <sys/cdefs.h> |
33__FBSDID("$FreeBSD: head/sys/dev/mii/e1000phy.c 221407 2011-05-03 19:51:29Z marius $"); |
34 35/* 36 * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. 37 */ 38 39/* 40 * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and 41 * 1000baseSX PHY. --- 18 unchanged lines hidden (view full) --- 60 61#include <dev/mii/e1000phyreg.h> 62 63#include "miibus_if.h" 64 65static int e1000phy_probe(device_t); 66static int e1000phy_attach(device_t); 67 |
68static device_method_t e1000phy_methods[] = { 69 /* device interface */ 70 DEVMETHOD(device_probe, e1000phy_probe), 71 DEVMETHOD(device_attach, e1000phy_attach), 72 DEVMETHOD(device_detach, mii_phy_detach), 73 DEVMETHOD(device_shutdown, bus_generic_shutdown), 74 { 0, 0 } 75}; 76 77static devclass_t e1000phy_devclass; 78static driver_t e1000phy_driver = { 79 "e1000phy", 80 e1000phy_methods, |
81 sizeof(struct mii_softc) |
82}; 83 84DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); 85 86static int e1000phy_service(struct mii_softc *, struct mii_data *, int); 87static void e1000phy_status(struct mii_softc *); 88static void e1000phy_reset(struct mii_softc *); |
89static int e1000phy_mii_phy_auto(struct mii_softc *, int); |
90 91static const struct mii_phydesc e1000phys[] = { 92 MII_PHY_DESC(MARVELL, E1000), 93 MII_PHY_DESC(MARVELL, E1011), 94 MII_PHY_DESC(MARVELL, E1000_3), |
95 MII_PHY_DESC(MARVELL, E1000_5), |
96 MII_PHY_DESC(MARVELL, E1111), |
97 MII_PHY_DESC(xxMARVELL, E1000), 98 MII_PHY_DESC(xxMARVELL, E1011), 99 MII_PHY_DESC(xxMARVELL, E1000_3), |
100 MII_PHY_DESC(xxMARVELL, E1000S), |
101 MII_PHY_DESC(xxMARVELL, E1000_5), |
102 MII_PHY_DESC(xxMARVELL, E1101), 103 MII_PHY_DESC(xxMARVELL, E3082), 104 MII_PHY_DESC(xxMARVELL, E1112), 105 MII_PHY_DESC(xxMARVELL, E1149), |
106 MII_PHY_DESC(xxMARVELL, E1111), |
107 MII_PHY_DESC(xxMARVELL, E1116), 108 MII_PHY_DESC(xxMARVELL, E1116R), 109 MII_PHY_DESC(xxMARVELL, E1118), 110 MII_PHY_DESC(xxMARVELL, E3016), 111 MII_PHY_DESC(xxMARVELL, PHYG65G), |
112 MII_PHY_END 113}; 114 |
115static const struct mii_phy_funcs e1000phy_funcs = { 116 e1000phy_service, 117 e1000phy_status, 118 e1000phy_reset 119}; 120 |
121static int 122e1000phy_probe(device_t dev) 123{ 124 125 return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); 126} 127 128static int 129e1000phy_attach(device_t dev) 130{ |
131 struct mii_softc *sc; |
132 struct ifnet *ifp; 133 |
134 sc = device_get_softc(dev); |
135 |
136 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); |
137 |
138 ifp = sc->mii_pdata->mii_ifp; 139 if (strcmp(ifp->if_dname, "msk") == 0 && 140 (sc->mii_flags & MIIF_MACPRIV0) != 0) 141 sc->mii_flags |= MIIF_PHYPRIV0; 142 |
143 switch (sc->mii_mpd_model) { 144 case MII_MODEL_xxMARVELL_E1011: 145 case MII_MODEL_xxMARVELL_E1112: |
146 if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) 147 sc->mii_flags |= MIIF_HAVEFIBER; 148 break; |
149 case MII_MODEL_xxMARVELL_E1149: |
150 /* 151 * Some 88E1149 PHY's page select is initialized to 152 * point to other bank instead of copper/fiber bank 153 * which in turn resulted in wrong registers were 154 * accessed during PHY operation. It is believed that 155 * page 0 should be used for copper PHY so reinitialize 156 * E1000_EADR to select default copper PHY. If parent 157 * device know the type of PHY(either copper or fiber), 158 * that information should be used to select default 159 * type of PHY. 160 */ 161 PHY_WRITE(sc, E1000_EADR, 0); 162 break; 163 } 164 |
165 PHY_RESET(sc); |
166 |
167 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; |
168 if (sc->mii_capabilities & BMSR_EXTSTAT) 169 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); 170 device_printf(dev, " "); 171 mii_phy_add_media(sc); 172 printf("\n"); 173 174 MIIBUS_MEDIAINIT(sc->mii_dev); 175 return (0); 176} 177 178static void 179e1000phy_reset(struct mii_softc *sc) 180{ |
181 uint16_t reg, page; 182 |
183 reg = PHY_READ(sc, E1000_SCR); 184 if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { 185 reg &= ~E1000_SCR_AUTO_X_MODE; 186 PHY_WRITE(sc, E1000_SCR, reg); |
187 if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { |
188 /* Select 1000BASE-X only mode. */ 189 page = PHY_READ(sc, E1000_EADR); 190 PHY_WRITE(sc, E1000_EADR, 2); 191 reg = PHY_READ(sc, E1000_SCR); 192 reg &= ~E1000_SCR_MODE_MASK; 193 reg |= E1000_SCR_MODE_1000BX; 194 PHY_WRITE(sc, E1000_SCR, reg); 195 if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { 196 /* Set SIGDET polarity low for SFP module. */ 197 PHY_WRITE(sc, E1000_EADR, 1); 198 reg = PHY_READ(sc, E1000_SCR); 199 reg |= E1000_SCR_FIB_SIGDET_POLARITY; 200 PHY_WRITE(sc, E1000_SCR, reg); 201 } 202 PHY_WRITE(sc, E1000_EADR, page); 203 } 204 } else { |
205 switch (sc->mii_mpd_model) { 206 case MII_MODEL_xxMARVELL_E1111: 207 case MII_MODEL_xxMARVELL_E1112: 208 case MII_MODEL_xxMARVELL_E1116: 209 case MII_MODEL_xxMARVELL_E1118: 210 case MII_MODEL_xxMARVELL_E1149: 211 case MII_MODEL_xxMARVELL_PHYG65G: |
212 /* Disable energy detect mode. */ 213 reg &= ~E1000_SCR_EN_DETECT_MASK; 214 reg |= E1000_SCR_AUTO_X_MODE; |
215 if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116) |
216 reg &= ~E1000_SCR_POWER_DOWN; 217 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 218 break; |
219 case MII_MODEL_xxMARVELL_E3082: |
220 reg |= (E1000_SCR_AUTO_X_MODE >> 1); 221 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 222 break; |
223 case MII_MODEL_xxMARVELL_E3016: |
224 reg |= E1000_SCR_AUTO_MDIX; 225 reg &= ~(E1000_SCR_EN_DETECT | 226 E1000_SCR_SCRAMBLER_DISABLE); 227 reg |= E1000_SCR_LPNP; 228 /* XXX Enable class A driver for Yukon FE+ A0. */ 229 PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); 230 break; 231 default: 232 reg &= ~E1000_SCR_AUTO_X_MODE; 233 reg |= E1000_SCR_ASSERT_CRS_ON_TX; 234 break; 235 } |
236 if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { |
237 /* Auto correction for reversed cable polarity. */ 238 reg &= ~E1000_SCR_POLARITY_REVERSAL; 239 } 240 PHY_WRITE(sc, E1000_SCR, reg); 241 |
242 if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || 243 sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149) { |
244 PHY_WRITE(sc, E1000_EADR, 2); 245 reg = PHY_READ(sc, E1000_SCR); 246 reg |= E1000_SCR_RGMII_POWER_UP; 247 PHY_WRITE(sc, E1000_SCR, reg); 248 PHY_WRITE(sc, E1000_EADR, 0); 249 } 250 } 251 |
252 switch (sc->mii_mpd_model) { 253 case MII_MODEL_xxMARVELL_E3082: 254 case MII_MODEL_xxMARVELL_E1112: 255 case MII_MODEL_xxMARVELL_E1118: |
256 break; |
257 case MII_MODEL_xxMARVELL_E1116: |
258 page = PHY_READ(sc, E1000_EADR); 259 /* Select page 3, LED control register. */ 260 PHY_WRITE(sc, E1000_EADR, 3); 261 PHY_WRITE(sc, E1000_SCR, 262 E1000_SCR_LED_LOS(1) | /* Link/Act */ 263 E1000_SCR_LED_INIT(8) | /* 10Mbps */ 264 E1000_SCR_LED_STAT1(7) | /* 100Mbps */ 265 E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ 266 /* Set blink rate. */ 267 PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | 268 E1000_BLINK_RATE(E1000_BLINK_84MS)); 269 PHY_WRITE(sc, E1000_EADR, page); 270 break; |
271 case MII_MODEL_xxMARVELL_E3016: |
272 /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ 273 PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); 274 /* Integrated register calibration workaround. */ 275 PHY_WRITE(sc, 0x1D, 17); 276 PHY_WRITE(sc, 0x1E, 0x3F60); 277 break; 278 default: 279 /* Force TX_CLK to 25MHz clock. */ --- 8 unchanged lines hidden (view full) --- 288 reg |= E1000_CR_RESET; 289 PHY_WRITE(sc, E1000_CR, reg); 290} 291 292static int 293e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 294{ 295 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; |
296 uint16_t speed, gig; 297 int reg; 298 299 switch (cmd) { 300 case MII_POLLSTAT: 301 break; 302 303 case MII_MEDIACHG: 304 /* 305 * If the interface is not up, don't do anything. 306 */ 307 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 308 break; 309 310 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { |
311 e1000phy_mii_phy_auto(sc, ife->ifm_media); |
312 break; 313 } 314 315 speed = 0; 316 switch (IFM_SUBTYPE(ife->ifm_media)) { 317 case IFM_1000_T: 318 if ((sc->mii_extcapabilities & 319 (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) --- 70 unchanged lines hidden (view full) --- 390 391 /* Announce link loss right after it happens. */ 392 if (sc->mii_ticks++ == 0) 393 break; 394 if (sc->mii_ticks <= sc->mii_anegticks) 395 break; 396 397 sc->mii_ticks = 0; |
398 PHY_RESET(sc); 399 e1000phy_mii_phy_auto(sc, ife->ifm_media); |
400 break; 401 } 402 403 /* Update the media status. */ |
404 PHY_STATUS(sc); |
405 406 /* Callback if something changed. */ 407 mii_phy_update(sc, cmd); 408 return (0); 409} 410 411static void 412e1000phy_status(struct mii_softc *sc) --- 54 unchanged lines hidden (view full) --- 467 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { 468 if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & 469 E1000_1GSR_MS_CONFIG_RES) != 0) 470 mii->mii_media_active |= IFM_ETH_MASTER; 471 } 472} 473 474static int |
475e1000phy_mii_phy_auto(struct mii_softc *sc, int media) |
476{ |
477 uint16_t reg; 478 |
479 if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { 480 reg = PHY_READ(sc, E1000_AR); 481 reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); 482 reg |= E1000_AR_10T | E1000_AR_10T_FD | 483 E1000_AR_100TX | E1000_AR_100TX_FD; 484 if ((media & IFM_FLOW) != 0 || 485 (sc->mii_flags & MIIF_FORCEPAUSE) != 0) 486 reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; 487 PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); 488 } else 489 PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); 490 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) 491 PHY_WRITE(sc, E1000_1GCR, 492 E1000_1GCR_1000T_FD | E1000_1GCR_1000T); 493 PHY_WRITE(sc, E1000_CR, 494 E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); 495 496 return (EJUSTRETURN); 497} |