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ciphy.c (217413) ciphy.c (221407)
1/*-
2 * Copyright (c) 2004
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2004
3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 217413 2011-01-14 19:29:53Z marius $");
34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 221407 2011-05-03 19:51:29Z marius $");
35
36/*
37 * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>

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81DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
82
83static int ciphy_service(struct mii_softc *, struct mii_data *, int);
84static void ciphy_status(struct mii_softc *);
85static void ciphy_reset(struct mii_softc *);
86static void ciphy_fixup(struct mii_softc *);
87
88static const struct mii_phydesc ciphys[] = {
35
36/*
37 * Driver for the Cicada/Vitesse CS/VSC8xxx 10/100/1000 copper PHY.
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>

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81DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
82
83static int ciphy_service(struct mii_softc *, struct mii_data *, int);
84static void ciphy_status(struct mii_softc *);
85static void ciphy_reset(struct mii_softc *);
86static void ciphy_fixup(struct mii_softc *);
87
88static const struct mii_phydesc ciphys[] = {
89 MII_PHY_DESC(CICADA, CS8201),
90 MII_PHY_DESC(CICADA, CS8201A),
91 MII_PHY_DESC(CICADA, CS8201B),
92 MII_PHY_DESC(CICADA, CS8204),
93 MII_PHY_DESC(CICADA, VSC8211),
94 MII_PHY_DESC(CICADA, CS8244),
95 MII_PHY_DESC(VITESSE, VSC8601),
89 MII_PHY_DESC(xxCICADA, CS8201),
90 MII_PHY_DESC(xxCICADA, CS8201A),
91 MII_PHY_DESC(xxCICADA, CS8201B),
92 MII_PHY_DESC(xxCICADA, CS8204),
93 MII_PHY_DESC(xxCICADA, VSC8211),
94 MII_PHY_DESC(xxCICADA, CS8244),
95 MII_PHY_DESC(xxVITESSE, VSC8601),
96 MII_PHY_END
97};
98
96 MII_PHY_END
97};
98
99static const struct mii_phy_funcs ciphy_funcs = {
100 ciphy_service,
101 ciphy_status,
102 ciphy_reset
103};
104
99static int
100ciphy_probe(device_t dev)
101{
102
103 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
104}
105
106static int
107ciphy_attach(device_t dev)
108{
105static int
106ciphy_probe(device_t dev)
107{
108
109 return (mii_phy_dev_probe(dev, ciphys, BUS_PROBE_DEFAULT));
110}
111
112static int
113ciphy_attach(device_t dev)
114{
109 struct mii_softc *sc;
110 struct mii_attach_args *ma;
111 struct mii_data *mii;
112
115
113 sc = device_get_softc(dev);
114 ma = device_get_ivars(dev);
115 sc->mii_dev = device_get_parent(dev);
116 mii = ma->mii_data;
117 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
118
119 sc->mii_flags = miibus_get_flags(dev);
120 sc->mii_inst = mii->mii_instance++;
121 sc->mii_phy = ma->mii_phyno;
122 sc->mii_service = ciphy_service;
123 sc->mii_pdata = mii;
124
125 sc->mii_flags |= MIIF_NOISOLATE;
126
127 ciphy_reset(sc);
128
129 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
130 if (sc->mii_capabilities & BMSR_EXTSTAT)
131 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
132 device_printf(dev, " ");
133 mii_phy_add_media(sc);
134 printf("\n");
135
136 MIIBUS_MEDIAINIT(sc->mii_dev);
116 mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
117 &ciphy_funcs, 1);
137 return (0);
138}
139
140static int
141ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
142{
143 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
144 int reg, speed, gig;

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234 break;
235
236 sc->mii_ticks = 0;
237 mii_phy_auto(sc);
238 break;
239 }
240
241 /* Update the media status. */
118 return (0);
119}
120
121static int
122ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
123{
124 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
125 int reg, speed, gig;

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215 break;
216
217 sc->mii_ticks = 0;
218 mii_phy_auto(sc);
219 break;
220 }
221
222 /* Update the media status. */
242 ciphy_status(sc);
223 PHY_STATUS(sc);
243
244 /*
245 * Callback if something changed. Note that we need to poke
246 * apply fixups for certain PHY revs.
247 */
248 if (sc->mii_media_active != mii->mii_media_active ||
249 sc->mii_media_status != mii->mii_media_status ||
250 cmd == MII_MEDIACHG) {

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294 break;
295 default:
296 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
297 bmsr & CIPHY_AUXCSR_SPEED);
298 break;
299 }
300
301 if (bmsr & CIPHY_AUXCSR_FDX)
224
225 /*
226 * Callback if something changed. Note that we need to poke
227 * apply fixups for certain PHY revs.
228 */
229 if (sc->mii_media_active != mii->mii_media_active ||
230 sc->mii_media_status != mii->mii_media_status ||
231 cmd == MII_MEDIACHG) {

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275 break;
276 default:
277 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
278 bmsr & CIPHY_AUXCSR_SPEED);
279 break;
280 }
281
282 if (bmsr & CIPHY_AUXCSR_FDX)
302 mii->mii_media_active |= IFM_FDX;
283 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
303 else
304 mii->mii_media_active |= IFM_HDX;
305
306 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
307 (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
308 mii->mii_media_active |= IFM_ETH_MASTER;
309}
310

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344 val |= CIPHY_AUXCSR_MDPPS;
345 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
346 val = PHY_READ(sc, CIPHY_MII_10BTCSR);
347 val |= CIPHY_10BTCSR_ECHO;
348 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
349 }
350
351 switch (model) {
284 else
285 mii->mii_media_active |= IFM_HDX;
286
287 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
288 (PHY_READ(sc, CIPHY_MII_1000STS) & CIPHY_1000STS_MSR) != 0)
289 mii->mii_media_active |= IFM_ETH_MASTER;
290}
291

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325 val |= CIPHY_AUXCSR_MDPPS;
326 PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
327 val = PHY_READ(sc, CIPHY_MII_10BTCSR);
328 val |= CIPHY_10BTCSR_ECHO;
329 PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
330 }
331
332 switch (model) {
352 case MII_MODEL_CICADA_CS8204:
353 case MII_MODEL_CICADA_CS8201:
333 case MII_MODEL_xxCICADA_CS8204:
334 case MII_MODEL_xxCICADA_CS8201:
354
355 /* Turn off "aux mode" (whatever that means) */
356 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
357
358 /*
359 * Work around speed polling bug in VT3119/VT3216
360 * when using MII in full duplex mode.
361 */

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366 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
367 }
368
369 /* Enable link/activity LED blink. */
370 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
371
372 break;
373
335
336 /* Turn off "aux mode" (whatever that means) */
337 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
338
339 /*
340 * Work around speed polling bug in VT3119/VT3216
341 * when using MII in full duplex mode.
342 */

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347 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
348 }
349
350 /* Enable link/activity LED blink. */
351 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
352
353 break;
354
374 case MII_MODEL_CICADA_CS8201A:
375 case MII_MODEL_CICADA_CS8201B:
355 case MII_MODEL_xxCICADA_CS8201A:
356 case MII_MODEL_xxCICADA_CS8201B:
376
377 /*
378 * Work around speed polling bug in VT3119/VT3216
379 * when using MII in full duplex mode.
380 */
381 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
382 (status & CIPHY_AUXCSR_FDX)) {
383 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
384 } else {
385 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
386 }
387
388 break;
357
358 /*
359 * Work around speed polling bug in VT3119/VT3216
360 * when using MII in full duplex mode.
361 */
362 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
363 (status & CIPHY_AUXCSR_FDX)) {
364 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
365 } else {
366 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
367 }
368
369 break;
389 case MII_MODEL_CICADA_VSC8211:
390 case MII_MODEL_CICADA_CS8244:
391 case MII_MODEL_VITESSE_VSC8601:
370 case MII_MODEL_xxCICADA_VSC8211:
371 case MII_MODEL_xxCICADA_CS8244:
372 case MII_MODEL_xxVITESSE_VSC8601:
392 break;
393 default:
394 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
395 model);
396 break;
397 }
398}
373 break;
374 default:
375 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
376 model);
377 break;
378 }
379}