Deleted Added
sdiff udiff text old ( 157041 ) new ( 157642 )
full compact
brgphy.c (157041) brgphy.c (157642)
1/*-
2 * Copyright (c) 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/mii/brgphy.c 157041 2006-03-23 09:53:39Z oleg $");
34__FBSDID("$FreeBSD: head/sys/dev/mii/brgphy.c 157642 2006-04-10 19:55:23Z ps $");
35
36/*
37 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
38 * 1000mbps; all we need to negotiate here is full or half duplex.
39 */
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/module.h>
45#include <sys/socket.h>
46#include <sys/bus.h>
47
48#include <machine/clock.h>
49
50#include <net/if.h>
35
36/*
37 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
38 * 1000mbps; all we need to negotiate here is full or half duplex.
39 */
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/module.h>
45#include <sys/socket.h>
46#include <sys/bus.h>
47
48#include <machine/clock.h>
49
50#include <net/if.h>
51#include <net/ethernet.h>
51#include <net/if_media.h>
52
53#include <dev/mii/mii.h>
54#include <dev/mii/miivar.h>
55#include "miidevs.h"
56
57#include <dev/mii/brgphyreg.h>
58#include <net/if_arp.h>
59#include <machine/bus.h>
60#include <dev/bge/if_bgereg.h>
52#include <net/if_media.h>
53
54#include <dev/mii/mii.h>
55#include <dev/mii/miivar.h>
56#include "miidevs.h"
57
58#include <dev/mii/brgphyreg.h>
59#include <net/if_arp.h>
60#include <machine/bus.h>
61#include <dev/bge/if_bgereg.h>
62#include <dev/bce/if_bcereg.h>
61
62#include <dev/pci/pcireg.h>
63#include <dev/pci/pcivar.h>
64
65#include "miibus_if.h"
66
67static int brgphy_probe(device_t);
68static int brgphy_attach(device_t);

--- 87 unchanged lines hidden (view full) ---

156 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5714) {
157 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5714);
158 return(0);
159 }
160
161 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
162 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5780) {
163 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5780);
63
64#include <dev/pci/pcireg.h>
65#include <dev/pci/pcivar.h>
66
67#include "miibus_if.h"
68
69static int brgphy_probe(device_t);
70static int brgphy_attach(device_t);

--- 87 unchanged lines hidden (view full) ---

158 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5714) {
159 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5714);
160 return(0);
161 }
162
163 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
164 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5780) {
165 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5780);
166 }
167
168 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
169 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5706C) {
170 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5706C);
164 return(0);
165 }
166
171 return(0);
172 }
173
174 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
175 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5708C) {
176 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5708C);
177 return(0);
178 }
179
167 return(ENXIO);
168}
169
170static int
171brgphy_attach(device_t dev)
172{
173 struct mii_softc *sc;
174 struct mii_attach_args *ma;
175 struct mii_data *mii;
176 const char *sep = "";
180 return(ENXIO);
181}
182
183static int
184brgphy_attach(device_t dev)
185{
186 struct mii_softc *sc;
187 struct mii_attach_args *ma;
188 struct mii_data *mii;
189 const char *sep = "";
177 struct bge_softc *bge_sc;
190 struct bge_softc *bge_sc = NULL;
191 struct bce_softc *bce_sc = NULL;
178 int fast_ether_only = FALSE;
179
180 sc = device_get_softc(dev);
181 ma = device_get_ivars(dev);
182 sc->mii_dev = device_get_parent(dev);
183 mii = device_get_softc(sc->mii_dev);
184 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
185

--- 19 unchanged lines hidden (view full) ---

205 brgphy_reset(sc);
206
207
208 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
209 sc->mii_capabilities &= ~BMSR_ANEG;
210 device_printf(dev, " ");
211 mii_add_media(sc);
212
192 int fast_ether_only = FALSE;
193
194 sc = device_get_softc(dev);
195 ma = device_get_ivars(dev);
196 sc->mii_dev = device_get_parent(dev);
197 mii = device_get_softc(sc->mii_dev);
198 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
199

--- 19 unchanged lines hidden (view full) ---

219 brgphy_reset(sc);
220
221
222 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
223 sc->mii_capabilities &= ~BMSR_ANEG;
224 device_printf(dev, " ");
225 mii_add_media(sc);
226
213 /* The 590x chips are 10/100 only. */
227 /* Find the driver associated with this PHY. */
228 if (strcmp(mii->mii_ifp->if_dname, "bge") == 0) {
229 bge_sc = mii->mii_ifp->if_softc;
230 } else if (strcmp(mii->mii_ifp->if_dname, "bce") == 0) {
231 bce_sc = mii->mii_ifp->if_softc;
232 }
214
233
215 bge_sc = mii->mii_ifp->if_softc;
216
234 /* The 590x chips are 10/100 only. */
217 if (strcmp(mii->mii_ifp->if_dname, "bge") == 0 &&
218 pci_get_vendor(bge_sc->bge_dev) == BCOM_VENDORID &&
219 (pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901 ||
220 pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901A2))
221 fast_ether_only = TRUE;
222
223 if (fast_ether_only == FALSE) {
224 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,

--- 389 unchanged lines hidden (view full) ---

614 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
615}
616
617static void
618brgphy_reset(struct mii_softc *sc)
619{
620 u_int32_t val;
621 struct ifnet *ifp;
235 if (strcmp(mii->mii_ifp->if_dname, "bge") == 0 &&
236 pci_get_vendor(bge_sc->bge_dev) == BCOM_VENDORID &&
237 (pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901 ||
238 pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901A2))
239 fast_ether_only = TRUE;
240
241 if (fast_ether_only == FALSE) {
242 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,

--- 389 unchanged lines hidden (view full) ---

632 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
633}
634
635static void
636brgphy_reset(struct mii_softc *sc)
637{
638 u_int32_t val;
639 struct ifnet *ifp;
622 struct bge_softc *bge_sc;
640 struct bge_softc *bge_sc = NULL;
641 struct bce_softc *bce_sc = NULL;
623
624 mii_phy_reset(sc);
625
626 switch (brgphy_mii_model) {
627 case MII_MODEL_xxBROADCOM_BCM5400:
628 case MII_MODEL_xxBROADCOM_BCM5401:
629 bcm5401_load_dspcode(sc);
630 break;

--- 4 unchanged lines hidden (view full) ---

635 bcm5703_load_dspcode(sc);
636 break;
637 case MII_MODEL_xxBROADCOM_BCM5704:
638 bcm5704_load_dspcode(sc);
639 break;
640 case MII_MODEL_xxBROADCOM_BCM5750:
641 case MII_MODEL_xxBROADCOM_BCM5714:
642 case MII_MODEL_xxBROADCOM_BCM5780:
642
643 mii_phy_reset(sc);
644
645 switch (brgphy_mii_model) {
646 case MII_MODEL_xxBROADCOM_BCM5400:
647 case MII_MODEL_xxBROADCOM_BCM5401:
648 bcm5401_load_dspcode(sc);
649 break;

--- 4 unchanged lines hidden (view full) ---

654 bcm5703_load_dspcode(sc);
655 break;
656 case MII_MODEL_xxBROADCOM_BCM5704:
657 bcm5704_load_dspcode(sc);
658 break;
659 case MII_MODEL_xxBROADCOM_BCM5750:
660 case MII_MODEL_xxBROADCOM_BCM5714:
661 case MII_MODEL_xxBROADCOM_BCM5780:
662 case MII_MODEL_xxBROADCOM_BCM5706C:
663 case MII_MODEL_xxBROADCOM_BCM5708C:
643 bcm5750_load_dspcode(sc);
644 break;
645 }
646
647 ifp = sc->mii_pdata->mii_ifp;
664 bcm5750_load_dspcode(sc);
665 break;
666 }
667
668 ifp = sc->mii_pdata->mii_ifp;
648 bge_sc = ifp->if_softc;
649
669
650 /*
651 * Don't enable Ethernet@WireSpeed for the 5700 or the
652 * 5705 A1 and A2 chips. Make sure we only do this test
653 * on "bge" NICs, since other drivers may use this same
654 * PHY subdriver.
655 */
656 if (strcmp(ifp->if_dname, "bge") == 0 &&
657 (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
658 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 ||
659 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2))
660 return;
670 /* Find the driver associated with this PHY. */
671 if (strcmp(ifp->if_dname, "bge") == 0) {
672 bge_sc = ifp->if_softc;
673 } else if (strcmp(ifp->if_dname, "bce") == 0) {
674 bce_sc = ifp->if_softc;
675 }
661
676
662 /* Enable Ethernet@WireSpeed. */
663 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
664 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
665 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
677 /* Handle any NetXtreme/bge workarounds. */
678 if (bge_sc) {
679 /*
680 * Don't enable Ethernet@WireSpeed for the 5700 or the
681 * 5705 A1 and A2 chips. Make sure we only do this test
682 * on "bge" NICs, since other drivers may use this same
683 * PHY subdriver.
684 */
685 if (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
686 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 ||
687 bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2)
688 return;
666
689
667 /* Enable Link LED on Dell boxes */
668 if (bge_sc->bge_no_3_led) {
669 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
670 PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
671 & ~BRGPHY_PHY_EXTCTL_3_LED);
690 /* Enable Ethernet@WireSpeed. */
691 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
692 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
693 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
694
695 /* Enable Link LED on Dell boxes */
696 if (bge_sc->bge_no_3_led) {
697 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
698 PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
699 & ~BRGPHY_PHY_EXTCTL_3_LED);
700 }
701 } else if (bce_sc) {
702
703 /* Set or clear jumbo frame settings in the PHY. */
704 if (ifp->if_mtu > ETHER_MAX_LEN) {
705 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
706 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
707 PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
708 val | BRGPHY_AUXCTL_LONG_PKT);
709
710 val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
711 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
712 val | BRGPHY_PHY_EXTCTL_HIGH_LA);
713 } else {
714 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
715 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
716 PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
717 val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));
718
719 val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
720 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
721 val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);
722 }
723
724 /* Enable Ethernet@Wirespeed */
725 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
726 val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
727 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, (val | (1 << 15) | (1 << 4)));
672 }
673}
728 }
729}