1/* 2 * Copyright (c) 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* 34 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always 35 * 1000mbps; all we need to negotiate here is full or half duplex. 36 */ 37 38#include <sys/cdefs.h>
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40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/kernel.h> 44#include <sys/socket.h> 45#include <sys/bus.h> 46 47#include <machine/clock.h> 48 49#include <net/if.h> 50#include <net/if_media.h> 51 52#include <dev/mii/mii.h> 53#include <dev/mii/miivar.h> 54#include "miidevs.h" 55 56#include <dev/mii/brgphyreg.h> 57 58#include "miibus_if.h" 59 60static int brgphy_probe(device_t); 61static int brgphy_attach(device_t); 62 63static device_method_t brgphy_methods[] = { 64 /* device interface */ 65 DEVMETHOD(device_probe, brgphy_probe), 66 DEVMETHOD(device_attach, brgphy_attach), 67 DEVMETHOD(device_detach, mii_phy_detach), 68 DEVMETHOD(device_shutdown, bus_generic_shutdown), 69 { 0, 0 } 70}; 71 72static devclass_t brgphy_devclass; 73 74static driver_t brgphy_driver = { 75 "brgphy", 76 brgphy_methods, 77 sizeof(struct mii_softc) 78}; 79 80DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0); 81 82static int brgphy_service(struct mii_softc *, struct mii_data *, int); 83static void brgphy_status(struct mii_softc *); 84static int brgphy_mii_phy_auto(struct mii_softc *); 85 86static int 87brgphy_probe(dev) 88 device_t dev; 89{ 90 struct mii_attach_args *ma; 91 92 ma = device_get_ivars(dev); 93 94 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 95 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) { 96 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400); 97 return(0); 98 } 99 100 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 101 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) { 102 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401); 103 return(0); 104 } 105 106 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 107 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) { 108 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411); 109 return(0); 110 } 111 112 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 113 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) { 114 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701); 115 return(0); 116 } 117 118 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM && 119 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) { 120 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703); 121 return(0); 122 } 123
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130 return(ENXIO); 131} 132 133static int 134brgphy_attach(dev) 135 device_t dev; 136{ 137 struct mii_softc *sc; 138 struct mii_attach_args *ma; 139 struct mii_data *mii; 140 const char *sep = ""; 141 142 sc = device_get_softc(dev); 143 ma = device_get_ivars(dev); 144 sc->mii_dev = device_get_parent(dev); 145 mii = device_get_softc(sc->mii_dev); 146 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 147 148 sc->mii_inst = mii->mii_instance; 149 sc->mii_phy = ma->mii_phyno; 150 sc->mii_service = brgphy_service; 151 sc->mii_pdata = mii; 152 153 sc->mii_flags |= MIIF_NOISOLATE; 154 mii->mii_instance++; 155 156#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 157#define PRINT(s) printf("%s%s", sep, s); sep = ", " 158 159 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 160 BMCR_ISO); 161#if 0 162 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 163 BMCR_LOOP|BMCR_S100); 164#endif 165 166 mii_phy_reset(sc); 167 168 169 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 170 sc->mii_capabilities &= ~BMSR_ANEG; 171 device_printf(dev, " "); 172 mii_add_media(sc); 173 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst), 174 BRGPHY_BMCR_FDX); 175 PRINT(", 1000baseTX"); 176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 0); 177 PRINT("1000baseTX-FDX"); 178 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 179 PRINT("auto"); 180 181 printf("\n"); 182#undef ADD 183#undef PRINT 184 185 MIIBUS_MEDIAINIT(sc->mii_dev); 186 return(0); 187} 188 189static int 190brgphy_service(sc, mii, cmd) 191 struct mii_softc *sc; 192 struct mii_data *mii; 193 int cmd; 194{ 195 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 196 int reg, speed; 197 198 switch (cmd) { 199 case MII_POLLSTAT: 200 /* 201 * If we're not polling our PHY instance, just return. 202 */ 203 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 204 return (0); 205 break; 206 207 case MII_MEDIACHG: 208 /* 209 * If the media indicates a different PHY instance, 210 * isolate ourselves. 211 */ 212 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 213 reg = PHY_READ(sc, MII_BMCR); 214 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO); 215 return (0); 216 } 217 218 /* 219 * If the interface is not up, don't do anything. 220 */ 221 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 222 break; 223 224 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 225 BRGPHY_PHY_EXTCTL_HIGH_LA|BRGPHY_PHY_EXTCTL_EN_LTR); 226 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 227 BRGPHY_AUXCTL_LONG_PKT|BRGPHY_AUXCTL_TX_TST); 228 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00); 229 230 switch (IFM_SUBTYPE(ife->ifm_media)) { 231 case IFM_AUTO: 232#ifdef foo 233 /* 234 * If we're already in auto mode, just return. 235 */ 236 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN) 237 return (0); 238#endif 239 (void) brgphy_mii_phy_auto(sc); 240 break; 241 case IFM_1000_T: 242 speed = BRGPHY_S1000; 243 goto setit; 244 case IFM_100_TX: 245 speed = BRGPHY_S100; 246 goto setit; 247 case IFM_10_T: 248 speed = BRGPHY_S10; 249setit: 250 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { 251 PHY_WRITE(sc, BRGPHY_MII_BMCR, 252 BRGPHY_BMCR_FDX|speed); 253 } else { 254 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed); 255 } 256 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE); 257 258 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T) 259 break; 260 261 /* 262 * When settning the link manually, one side must 263 * be the master and the other the slave. However 264 * ifmedia doesn't give us a good way to specify 265 * this, so we fake it by using one of the LINK 266 * flags. If LINK0 is set, we program the PHY to 267 * be a master, otherwise it's a slave. 268 */ 269 if ((mii->mii_ifp->if_flags & IFF_LINK0)) { 270 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 271 BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC); 272 } else { 273 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 274 BRGPHY_1000CTL_MSE); 275 } 276 break; 277#ifdef foo 278 case IFM_NONE: 279 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN); 280 break; 281#endif 282 case IFM_100_T4: 283 default: 284 return (EINVAL); 285 } 286 break; 287 288 case MII_TICK: 289 /* 290 * If we're not currently selected, just return. 291 */ 292 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 293 return (0); 294 295 /* 296 * Is the interface even up? 297 */ 298 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 299 return (0); 300 301 /* 302 * Only used for autonegotiation. 303 */ 304 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) 305 break; 306 307 /* 308 * Check to see if we have link. If we do, we don't 309 * need to restart the autonegotiation process. Read 310 * the BMSR twice in case it's latched. 311 */ 312 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS); 313 if (reg & BRGPHY_AUXSTS_LINK) 314 break; 315 316 /* 317 * Only retry autonegotiation every 5 seconds. 318 */ 319 if (++sc->mii_ticks != 5) 320 return (0); 321 322 sc->mii_ticks = 0; 323 mii_phy_reset(sc); 324 brgphy_mii_phy_auto(sc); 325 return (0); 326 } 327 328 /* Update the media status. */ 329 brgphy_status(sc); 330 331 /* Callback if something changed. */ 332 mii_phy_update(sc, cmd); 333 return (0); 334} 335 336static void 337brgphy_status(sc) 338 struct mii_softc *sc; 339{ 340 struct mii_data *mii = sc->mii_pdata; 341 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 342 int bmsr, bmcr; 343 344 mii->mii_media_status = IFM_AVALID; 345 mii->mii_media_active = IFM_ETHER; 346 347 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 348 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK) 349 mii->mii_media_status |= IFM_ACTIVE; 350 351 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR); 352 353 if (bmcr & BRGPHY_BMCR_LOOP) 354 mii->mii_media_active |= IFM_LOOP; 355 356 if (bmcr & BRGPHY_BMCR_AUTOEN) { 357 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) { 358 /* Erg, still trying, I guess... */ 359 mii->mii_media_active |= IFM_NONE; 360 return; 361 } 362 363 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) & 364 BRGPHY_AUXSTS_AN_RES) { 365 case BRGPHY_RES_1000FD: 366 mii->mii_media_active |= IFM_1000_T | IFM_FDX; 367 break; 368 case BRGPHY_RES_1000HD: 369 mii->mii_media_active |= IFM_1000_T | IFM_HDX; 370 break; 371 case BRGPHY_RES_100FD: 372 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 373 break; 374 case BRGPHY_RES_100T4: 375 mii->mii_media_active |= IFM_100_T4; 376 break; 377 case BRGPHY_RES_100HD: 378 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 379 break; 380 case BRGPHY_RES_10FD: 381 mii->mii_media_active |= IFM_10_T | IFM_FDX; 382 break; 383 case BRGPHY_RES_10HD: 384 mii->mii_media_active |= IFM_10_T | IFM_HDX; 385 break; 386 default: 387 mii->mii_media_active |= IFM_NONE; 388 break; 389 } 390 return; 391 } 392 393 mii->mii_media_active = ife->ifm_media; 394 395 return; 396} 397 398 399static int 400brgphy_mii_phy_auto(mii) 401 struct mii_softc *mii; 402{ 403 int ktcr = 0; 404 405 mii_phy_reset(mii); 406 PHY_WRITE(mii, BRGPHY_MII_BMCR, 0); 407 DELAY(1000); 408 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL); 409 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr | 410 BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD); 411 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL); 412 DELAY(1000); 413 PHY_WRITE(mii, BRGPHY_MII_ANAR, 414 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA); 415 DELAY(1000); 416 PHY_WRITE(mii, BRGPHY_MII_BMCR, 417 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); 418 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00); 419 return (EJUSTRETURN); 420}
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