1/*
2 * Copyright (c) 2000
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
35 * 1000mbps; all we need to negotiate here is full or half duplex.
36 */
37
38#include <sys/cdefs.h>
39__FBSDID("$FreeBSD: head/sys/dev/mii/brgphy.c 113038 2003-04-03 21:36:33Z obrien $");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/kernel.h>
44#include <sys/socket.h>
45#include <sys/bus.h>
46
47#include <machine/clock.h>
48
49#include <net/if.h>
50#include <net/if_media.h>
51
52#include <dev/mii/mii.h>
53#include <dev/mii/miivar.h>
54#include "miidevs.h"
55
56#include <dev/mii/brgphyreg.h>
57
58#include "miibus_if.h"
59
60static int brgphy_probe(device_t);
61static int brgphy_attach(device_t);
62
63static device_method_t brgphy_methods[] = {
64 /* device interface */
65 DEVMETHOD(device_probe, brgphy_probe),
66 DEVMETHOD(device_attach, brgphy_attach),
67 DEVMETHOD(device_detach, mii_phy_detach),
68 DEVMETHOD(device_shutdown, bus_generic_shutdown),
69 { 0, 0 }
70};
71
72static devclass_t brgphy_devclass;
73
74static driver_t brgphy_driver = {
75 "brgphy",
76 brgphy_methods,
77 sizeof(struct mii_softc)
78};
79
80DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0);
81
82static int brgphy_service(struct mii_softc *, struct mii_data *, int);
83static void brgphy_status(struct mii_softc *);
84static int brgphy_mii_phy_auto(struct mii_softc *);
85
86static int
87brgphy_probe(dev)
88 device_t dev;
89{
90 struct mii_attach_args *ma;
91
92 ma = device_get_ivars(dev);
93
94 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
95 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) {
96 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400);
97 return(0);
98 }
99
100 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
101 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) {
102 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401);
103 return(0);
104 }
105
106 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
107 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) {
108 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411);
109 return(0);
110 }
111
112 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
113 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) {
114 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701);
115 return(0);
116 }
117
118 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
119 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) {
120 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703);
121 return(0);
122 }
123
124 return(ENXIO);
125}
126
127static int
128brgphy_attach(dev)
129 device_t dev;
130{
131 struct mii_softc *sc;
132 struct mii_attach_args *ma;
133 struct mii_data *mii;
134 const char *sep = "";
135
136 sc = device_get_softc(dev);
137 ma = device_get_ivars(dev);
138 sc->mii_dev = device_get_parent(dev);
139 mii = device_get_softc(sc->mii_dev);
140 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
141
142 sc->mii_inst = mii->mii_instance;
143 sc->mii_phy = ma->mii_phyno;
144 sc->mii_service = brgphy_service;
145 sc->mii_pdata = mii;
146
147 sc->mii_flags |= MIIF_NOISOLATE;
148 mii->mii_instance++;
149
150#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
151#define PRINT(s) printf("%s%s", sep, s); sep = ", "
152
153 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
154 BMCR_ISO);
155#if 0
156 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
157 BMCR_LOOP|BMCR_S100);
158#endif
159
160 mii_phy_reset(sc);
161
162
163 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
164 sc->mii_capabilities &= ~BMSR_ANEG;
165 device_printf(dev, " ");
166 mii_add_media(sc);
167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst),
168 BRGPHY_BMCR_FDX);
169 PRINT(", 1000baseTX");
170 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 0);
171 PRINT("1000baseTX-FDX");
172 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
173 PRINT("auto");
174
175 printf("\n");
176#undef ADD
177#undef PRINT
178
179 MIIBUS_MEDIAINIT(sc->mii_dev);
180 return(0);
181}
182
183static int
184brgphy_service(sc, mii, cmd)
185 struct mii_softc *sc;
186 struct mii_data *mii;
187 int cmd;
188{
189 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
190 int reg, speed;
191
192 switch (cmd) {
193 case MII_POLLSTAT:
194 /*
195 * If we're not polling our PHY instance, just return.
196 */
197 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
198 return (0);
199 break;
200
201 case MII_MEDIACHG:
202 /*
203 * If the media indicates a different PHY instance,
204 * isolate ourselves.
205 */
206 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
207 reg = PHY_READ(sc, MII_BMCR);
208 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
209 return (0);
210 }
211
212 /*
213 * If the interface is not up, don't do anything.
214 */
215 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
216 break;
217
218 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
219 BRGPHY_PHY_EXTCTL_HIGH_LA|BRGPHY_PHY_EXTCTL_EN_LTR);
220 PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
221 BRGPHY_AUXCTL_LONG_PKT|BRGPHY_AUXCTL_TX_TST);
222 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
223
224 switch (IFM_SUBTYPE(ife->ifm_media)) {
225 case IFM_AUTO:
226#ifdef foo
227 /*
228 * If we're already in auto mode, just return.
229 */
230 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN)
231 return (0);
232#endif
233 (void) brgphy_mii_phy_auto(sc);
234 break;
235 case IFM_1000_T:
236 speed = BRGPHY_S1000;
237 goto setit;
238 case IFM_100_TX:
239 speed = BRGPHY_S100;
240 goto setit;
241 case IFM_10_T:
242 speed = BRGPHY_S10;
243setit:
244 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
245 PHY_WRITE(sc, BRGPHY_MII_BMCR,
246 BRGPHY_BMCR_FDX|speed);
247 } else {
248 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed);
249 }
250 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE);
251
252 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
253 break;
254
255 /*
256 * When settning the link manually, one side must
257 * be the master and the other the slave. However
258 * ifmedia doesn't give us a good way to specify
259 * this, so we fake it by using one of the LINK
260 * flags. If LINK0 is set, we program the PHY to
261 * be a master, otherwise it's a slave.
262 */
263 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
264 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
265 BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC);
266 } else {
267 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
268 BRGPHY_1000CTL_MSE);
269 }
270 break;
271#ifdef foo
272 case IFM_NONE:
273 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
274 break;
275#endif
276 case IFM_100_T4:
277 default:
278 return (EINVAL);
279 }
280 break;
281
282 case MII_TICK:
283 /*
284 * If we're not currently selected, just return.
285 */
286 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
287 return (0);
288
289 /*
290 * Is the interface even up?
291 */
292 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
293 return (0);
294
295 /*
296 * Only used for autonegotiation.
297 */
298 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
299 break;
300
301 /*
302 * Check to see if we have link. If we do, we don't
303 * need to restart the autonegotiation process. Read
304 * the BMSR twice in case it's latched.
305 */
306 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS);
307 if (reg & BRGPHY_AUXSTS_LINK)
308 break;
309
310 /*
311 * Only retry autonegotiation every 5 seconds.
312 */
313 if (++sc->mii_ticks != 5)
314 return (0);
315
316 sc->mii_ticks = 0;
317 mii_phy_reset(sc);
318 brgphy_mii_phy_auto(sc);
319 return (0);
320 }
321
322 /* Update the media status. */
323 brgphy_status(sc);
324
325 /* Callback if something changed. */
326 mii_phy_update(sc, cmd);
327 return (0);
328}
329
330static void
331brgphy_status(sc)
332 struct mii_softc *sc;
333{
334 struct mii_data *mii = sc->mii_pdata;
335 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
336 int bmsr, bmcr;
337
338 mii->mii_media_status = IFM_AVALID;
339 mii->mii_media_active = IFM_ETHER;
340
341 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
342 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK)
343 mii->mii_media_status |= IFM_ACTIVE;
344
345 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR);
346
347 if (bmcr & BRGPHY_BMCR_LOOP)
348 mii->mii_media_active |= IFM_LOOP;
349
350 if (bmcr & BRGPHY_BMCR_AUTOEN) {
351 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) {
352 /* Erg, still trying, I guess... */
353 mii->mii_media_active |= IFM_NONE;
354 return;
355 }
356
357 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) &
358 BRGPHY_AUXSTS_AN_RES) {
359 case BRGPHY_RES_1000FD:
360 mii->mii_media_active |= IFM_1000_T | IFM_FDX;
361 break;
362 case BRGPHY_RES_1000HD:
363 mii->mii_media_active |= IFM_1000_T | IFM_HDX;
364 break;
365 case BRGPHY_RES_100FD:
366 mii->mii_media_active |= IFM_100_TX | IFM_FDX;
367 break;
368 case BRGPHY_RES_100T4:
369 mii->mii_media_active |= IFM_100_T4;
370 break;
371 case BRGPHY_RES_100HD:
372 mii->mii_media_active |= IFM_100_TX | IFM_HDX;
373 break;
374 case BRGPHY_RES_10FD:
375 mii->mii_media_active |= IFM_10_T | IFM_FDX;
376 break;
377 case BRGPHY_RES_10HD:
378 mii->mii_media_active |= IFM_10_T | IFM_HDX;
379 break;
380 default:
381 mii->mii_media_active |= IFM_NONE;
382 break;
383 }
384 return;
385 }
386
387 mii->mii_media_active = ife->ifm_media;
388
389 return;
390}
391
392
393static int
394brgphy_mii_phy_auto(mii)
395 struct mii_softc *mii;
396{
397 int ktcr = 0;
398
399 mii_phy_reset(mii);
400 PHY_WRITE(mii, BRGPHY_MII_BMCR, 0);
401 DELAY(1000);
402 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
403 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr |
404 BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD);
405 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
406 DELAY(1000);
407 PHY_WRITE(mii, BRGPHY_MII_ANAR,
408 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
409 DELAY(1000);
410 PHY_WRITE(mii, BRGPHY_MII_BMCR,
411 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG);
412 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00);
413 return (EJUSTRETURN);
414}