1/******************************************************************************
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.h 179055 2008-05-16 18:46:30Z jfv $*/
34
35#ifndef _IXGBE_OS_H_
36#define _IXGBE_OS_H_
37
38#include <sys/types.h>
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/protosw.h>
43#include <sys/socket.h>
44#include <sys/malloc.h>
45#include <sys/kernel.h>
46#include <sys/bus.h>
47#include <machine/bus.h>
48#include <sys/rman.h>
49#include <machine/resource.h>
50#include <vm/vm.h>
51#include <vm/pmap.h>
52#include <machine/clock.h>
53#include <dev/pci/pcivar.h>
54#include <dev/pci/pcireg.h>
55
56#define ASSERT(x) if(!(x)) panic("IXGBE: x")
57
58/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
59#define usec_delay(x) DELAY(x)
60#define msec_delay(x) DELAY(1000*(x))
61
62#define DBG 0
63#define MSGOUT(S, A, B) printf(S "\n", A, B)
64#define DEBUGFUNC(F) DEBUGOUT(F);
65#if DBG
66 #define DEBUGOUT(S) printf(S "\n")
67 #define DEBUGOUT1(S,A) printf(S "\n",A)
68 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
69 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
70 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
71#else
72 #define DEBUGOUT(S)
73 #define DEBUGOUT1(S,A)
74 #define DEBUGOUT2(S,A,B)
75 #define DEBUGOUT3(S,A,B,C)
76 #define DEBUGOUT6(S,A,B,C,D,E,F)
77 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
78#endif
79
80#define FALSE 0
81#define TRUE 1
82#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
83#define PCI_COMMAND_REGISTER PCIR_COMMAND
84
85typedef uint8_t u8;
86typedef uint16_t u16;
87typedef uint32_t u32;
88typedef int32_t s32;
89typedef uint64_t u64;
90typedef boolean_t bool;
91
92#define le16_to_cpu
93
94#if defined(__i386__) || defined(__amd64__)
95#define mb() __asm volatile("mfence" ::: "memory")
96#define wmb() __asm volatile("sfence" ::: "memory")
97#define rmb() __asm volatile("lfence" ::: "memory")
98#else
99#define mb()
100#define rmb()
101#define wmb()
102#endif
103
104struct ixgbe_osdep
105{
106 bus_space_tag_t mem_bus_space_tag;
107 bus_space_handle_t mem_bus_space_handle;
108 struct device *dev;
109};
110
111/* This is needed by the shared code */
112struct ixgbe_hw;
113extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
114#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
115
116#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
117
118#define IXGBE_READ_REG(a, reg) (\
119 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
120 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
121 reg))
122
123#define IXGBE_WRITE_REG(a, reg, value) (\
124 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
125 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
126 reg, value))
127
128
129#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
130 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
131 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
132 (reg + ((offset) << 2))))
133
134#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
135 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
136 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
137 (reg + ((offset) << 2)), value))
138
139
140#endif /* _IXGBE_OS_H_ */
2
3 Copyright (c) 2001-2008, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.h 179055 2008-05-16 18:46:30Z jfv $*/
34
35#ifndef _IXGBE_OS_H_
36#define _IXGBE_OS_H_
37
38#include <sys/types.h>
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/protosw.h>
43#include <sys/socket.h>
44#include <sys/malloc.h>
45#include <sys/kernel.h>
46#include <sys/bus.h>
47#include <machine/bus.h>
48#include <sys/rman.h>
49#include <machine/resource.h>
50#include <vm/vm.h>
51#include <vm/pmap.h>
52#include <machine/clock.h>
53#include <dev/pci/pcivar.h>
54#include <dev/pci/pcireg.h>
55
56#define ASSERT(x) if(!(x)) panic("IXGBE: x")
57
58/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
59#define usec_delay(x) DELAY(x)
60#define msec_delay(x) DELAY(1000*(x))
61
62#define DBG 0
63#define MSGOUT(S, A, B) printf(S "\n", A, B)
64#define DEBUGFUNC(F) DEBUGOUT(F);
65#if DBG
66 #define DEBUGOUT(S) printf(S "\n")
67 #define DEBUGOUT1(S,A) printf(S "\n",A)
68 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
69 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
70 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
71#else
72 #define DEBUGOUT(S)
73 #define DEBUGOUT1(S,A)
74 #define DEBUGOUT2(S,A,B)
75 #define DEBUGOUT3(S,A,B,C)
76 #define DEBUGOUT6(S,A,B,C,D,E,F)
77 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
78#endif
79
80#define FALSE 0
81#define TRUE 1
82#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
83#define PCI_COMMAND_REGISTER PCIR_COMMAND
84
85typedef uint8_t u8;
86typedef uint16_t u16;
87typedef uint32_t u32;
88typedef int32_t s32;
89typedef uint64_t u64;
90typedef boolean_t bool;
91
92#define le16_to_cpu
93
94#if defined(__i386__) || defined(__amd64__)
95#define mb() __asm volatile("mfence" ::: "memory")
96#define wmb() __asm volatile("sfence" ::: "memory")
97#define rmb() __asm volatile("lfence" ::: "memory")
98#else
99#define mb()
100#define rmb()
101#define wmb()
102#endif
103
104struct ixgbe_osdep
105{
106 bus_space_tag_t mem_bus_space_tag;
107 bus_space_handle_t mem_bus_space_handle;
108 struct device *dev;
109};
110
111/* This is needed by the shared code */
112struct ixgbe_hw;
113extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
114#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
115
116#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
117
118#define IXGBE_READ_REG(a, reg) (\
119 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
120 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
121 reg))
122
123#define IXGBE_WRITE_REG(a, reg, value) (\
124 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
125 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
126 reg, value))
127
128
129#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
130 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
131 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
132 (reg + ((offset) << 2))))
133
134#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
135 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
136 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
137 (reg + ((offset) << 2)), value))
138
139
140#endif /* _IXGBE_OS_H_ */