1/****************************************************************************** 2 3 Copyright (c) 2001-2008, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/
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34 35#ifndef _IXGBE_API_H_ 36#define _IXGBE_API_H_ 37 38#include "ixgbe_type.h" 39 40s32 ixgbe_init_shared_code(struct ixgbe_hw *hw); 41 42s32 ixgbe_set_mac_type(struct ixgbe_hw *hw); 43s32 ixgbe_init_hw(struct ixgbe_hw *hw); 44s32 ixgbe_reset_hw(struct ixgbe_hw *hw); 45s32 ixgbe_start_hw(struct ixgbe_hw *hw); 46s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw); 47enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw); 48s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr); 49s32 ixgbe_get_bus_info(struct ixgbe_hw *hw); 50u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw); 51u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw); 52s32 ixgbe_stop_adapter(struct ixgbe_hw *hw); 53s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num); 54 55s32 ixgbe_identify_phy(struct ixgbe_hw *hw); 56s32 ixgbe_reset_phy(struct ixgbe_hw *hw); 57s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 58 u16 *phy_data); 59s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 60 u16 phy_data); 61 62s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); 63s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, 64 ixgbe_link_speed *speed, 65 bool *link_up); 66s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, 67 ixgbe_link_speed speed, 68 bool autoneg, 69 bool autoneg_wait_to_complete); 70s32 ixgbe_setup_link(struct ixgbe_hw *hw); 71s32 ixgbe_setup_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 72 bool autoneg, bool autoneg_wait_to_complete); 73s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 74 bool *link_up, bool link_up_wait_to_complete); 75s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 76 bool *autoneg); 77s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index); 78s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index); 79s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index); 80s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index); 81 82s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw); 83s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data); 84s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data); 85s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); 86s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw); 87 88s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 89 u32 enable_addr); 90s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index); 91s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 92s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 93s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw); 94u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw); 95s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 96 u32 addr_count, ixgbe_mc_addr_itr func); 97s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 98 u32 mc_addr_count, ixgbe_mc_addr_itr func); 99s32 ixgbe_enable_mc(struct ixgbe_hw *hw); 100s32 ixgbe_disable_mc(struct ixgbe_hw *hw); 101s32 ixgbe_clear_vfta(struct ixgbe_hw *hw); 102s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, 103 u32 vind, bool vlan_on); 104 105s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num); 106 107void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr); 108s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, 109 u16 *firmware_version); 110s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val); 111s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val); 112s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
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