2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
6 * NASA/Ames Research Center
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 */
34
35#ifndef _ISPVAR_H
36#define _ISPVAR_H
37
38#if defined(__NetBSD__) || defined(__OpenBSD__)
39#include <dev/ic/ispmbox.h>
40#ifdef ISP_TARGET_MODE
41#include <dev/ic/isp_target.h>
42#endif
43#endif
44#ifdef __FreeBSD__
45#include <dev/isp/ispmbox.h>
46#ifdef ISP_TARGET_MODE
47#include <dev/isp/isp_target.h>
48#endif
49#endif
50#ifdef __linux__
51#include "ispmbox.h"
52#ifdef ISP_TARGET_MODE
53#include "isp_target.h"
54#endif
55#endif
56
57#define ISP_CORE_VERSION_MAJOR 1
| 2/*
3 * Soft Definitions for for Qlogic ISP SCSI adapters.
4 *
5 * Copyright (c) 1997, 1998, 1999 by Matthew Jacob
6 * NASA/Ames Research Center
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 */
34
35#ifndef _ISPVAR_H
36#define _ISPVAR_H
37
38#if defined(__NetBSD__) || defined(__OpenBSD__)
39#include <dev/ic/ispmbox.h>
40#ifdef ISP_TARGET_MODE
41#include <dev/ic/isp_target.h>
42#endif
43#endif
44#ifdef __FreeBSD__
45#include <dev/isp/ispmbox.h>
46#ifdef ISP_TARGET_MODE
47#include <dev/isp/isp_target.h>
48#endif
49#endif
50#ifdef __linux__
51#include "ispmbox.h"
52#ifdef ISP_TARGET_MODE
53#include "isp_target.h"
54#endif
55#endif
56
57#define ISP_CORE_VERSION_MAJOR 1
|
59
60/*
61 * Vector for bus specific code to provide specific services.
62 */
63struct ispsoftc;
64struct ispmdvec {
65 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int));
66 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t));
67 int (*dv_mbxdma) __P((struct ispsoftc *));
68 int (*dv_dmaset) __P((struct ispsoftc *,
69 ISP_SCSI_XFER_T *, ispreq_t *, u_int16_t *, u_int16_t));
70 void (*dv_dmaclr)
71 __P((struct ispsoftc *, ISP_SCSI_XFER_T *, u_int32_t));
72 void (*dv_reset0) __P((struct ispsoftc *));
73 void (*dv_reset1) __P((struct ispsoftc *));
74 void (*dv_dregs) __P((struct ispsoftc *));
75 const u_int16_t *dv_ispfw; /* ptr to f/w */
76 u_int16_t dv_fwlen; /* length of f/w */
77 u_int16_t dv_codeorg; /* code ORG for f/w */
78 u_int32_t dv_fwrev; /* f/w revision */
79 /*
80 * Initial values for conf1 register
81 */
82 u_int16_t dv_conf1;
83 u_int16_t dv_clock; /* clock frequency */
84};
85
86#define MAX_TARGETS 16
87#ifdef ISP2100_FABRIC
88#define MAX_FC_TARG 256
89#else
90#define MAX_FC_TARG 126
91#endif
92
93#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
94#ifdef ISP2100_SCCLUN
95#define _ISP_FC_LUN(isp) 65536
96#else
97#define _ISP_FC_LUN(isp) 16
98#endif
99#define _ISP_SCSI_LUN(isp) \
100 ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(7, 55, 0))? 32 : 8)
101#define ISP_MAX_LUNS(isp) \
102 (IS_FC(isp)? _ISP_FC_LUN(isp) : _ISP_SCSI_LUN(isp))
103
104
105/*
106 * Macros to read, write ISP registers through bus specific code.
107 */
108
109#define ISP_READ(isp, reg) \
110 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
111
112#define ISP_WRITE(isp, reg, val) \
113 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
114
115#define ISP_MBOXDMASETUP(isp) \
116 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
117
118#define ISP_DMASETUP(isp, xs, req, iptrp, optr) \
119 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr))
120
121#define ISP_DMAFREE(isp, xs, hndl) \
122 if ((isp)->isp_mdvec->dv_dmaclr) \
123 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
124
125#define ISP_RESET0(isp) \
126 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
127#define ISP_RESET1(isp) \
128 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
129#define ISP_DUMPREGS(isp) \
130 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp))
131
132#define ISP_SETBITS(isp, reg, val) \
133 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
134
135#define ISP_CLRBITS(isp, reg, val) \
136 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
137
138/* this is the size of a queue entry (request and response) */
139#define QENTRY_LEN 64
140/* both request and result queue length must be a power of two */
141#define RQUEST_QUEUE_LEN MAXISPREQUEST
142/* I've seen wierdnesses with the result queue < 64 */
143#if MAXISPREQUEST > 64
144#define RESULT_QUEUE_LEN (MAXISPREQUEST/2)
145#else
146#define RESULT_QUEUE_LEN MAXISPREQUEST
147#endif
148#define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN))
149#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
150#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
151#define ISP_QAVAIL(in, out, qlen) \
152 ((in == out)? (qlen - 1) : ((in > out)? \
153 ((qlen - 1) - (in - out)) : (out - in - 1)))
154
155#define ISP_ADD_REQUEST(isp, iptr) \
156 ISP_WRITE(isp, INMAILBOX4, iptr), isp->isp_reqidx = iptr
157
158/*
159 * SCSI Specific Host Adapter Parameters- per bus, per target
160 */
161
162typedef struct {
163 u_int isp_gotdparms : 1,
164 isp_req_ack_active_neg : 1,
165 isp_data_line_active_neg: 1,
166 isp_cmd_dma_burst_enable: 1,
167 isp_data_dma_burst_enabl: 1,
168 isp_fifo_threshold : 3,
169 isp_ultramode : 1,
170 isp_diffmode : 1,
171 isp_lvdmode : 1,
172 : 1,
173 isp_initiator_id : 4,
174 isp_async_data_setup : 4;
175 u_int16_t isp_selection_timeout;
176 u_int16_t isp_max_queue_depth;
177 u_int8_t isp_tag_aging;
178 u_int8_t isp_bus_reset_delay;
179 u_int8_t isp_retry_count;
180 u_int8_t isp_retry_delay;
181 struct {
182 u_int dev_enable : 1, /* ignored */
183 : 1,
184 dev_update : 1,
185 dev_refresh : 1,
186 exc_throttle : 8,
187 cur_offset : 4,
188 sync_offset : 4;
189 u_int8_t cur_period; /* current sync period */
190 u_int8_t sync_period; /* goal sync period */
191 u_int16_t dev_flags; /* goal device flags */
192 u_int16_t cur_dflags; /* current device flags */
193 } isp_devparam[MAX_TARGETS];
194} sdparam;
195
196/*
197 * Device Flags
198 */
199#define DPARM_DISC 0x8000
200#define DPARM_PARITY 0x4000
201#define DPARM_WIDE 0x2000
202#define DPARM_SYNC 0x1000
203#define DPARM_TQING 0x0800
204#define DPARM_ARQ 0x0400
205#define DPARM_QFRZ 0x0200
206#define DPARM_RENEG 0x0100
207#define DPARM_NARROW 0x0080 /* Possibly only available with >= 7.55 fw */
208#define DPARM_ASYNC 0x0040 /* Possibly only available with >= 7.55 fw */
209#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
210#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
211
212
213/* technically, not really correct, as they need to be rated based upon clock */
214#define ISP_40M_SYNCPARMS 0x080a
215#define ISP_20M_SYNCPARMS 0x080c
216#define ISP_10M_SYNCPARMS 0x0c19
217#define ISP_08M_SYNCPARMS 0x0c25
218#define ISP_05M_SYNCPARMS 0x0c32
219#define ISP_04M_SYNCPARMS 0x0c41
220
221/*
222 * Fibre Channel Specifics
223 */
224#define FL_PORT_ID 0x7e /* FL_Port Special ID */
225#define FC_PORT_ID 0x7f /* Fabric Controller Special ID */
226#define FC_SNS_ID 0x80 /* SNS Server Special ID */
227
228typedef struct {
229 u_int32_t isp_fwoptions : 16,
230 : 7,
231 loop_seen_once : 1,
232 isp_loopstate : 3, /* Current Loop State */
233 isp_fwstate : 3, /* ISP F/W state */
234 isp_gotdparms : 1,
235 isp_onfabric : 1;
236 u_int8_t isp_loopid; /* hard loop id */
237 u_int8_t isp_alpa; /* ALPA */
238 volatile u_int16_t isp_lipseq; /* LIP sequence # */
239 u_int32_t isp_portid;
240 u_int8_t isp_execthrottle;
241 u_int8_t isp_retry_delay;
242 u_int8_t isp_retry_count;
243 u_int8_t isp_reserved;
244 u_int16_t isp_maxalloc;
245 u_int16_t isp_maxfrmlen;
246 u_int64_t isp_nodewwn;
247 u_int64_t isp_portwwn;
248 /*
249 * Port Data Base. This is indexed by 'target', which is invariate.
250 * However, elements within can move around due to loop changes,
251 * so the actual loop ID passed to the F/W is in this structure.
252 * The first time the loop is seen up, loopid will match the index
253 * (except for fabric nodes which are above mapped above FC_SNS_ID
254 * and are completely virtual), but subsequent LIPs can cause things
255 * to move around.
256 */
257 struct lportdb {
258 u_int
259 loopid : 8,
260 : 4,
261 fabdev : 1,
262 roles : 2,
263 valid : 1;
264 u_int32_t portid;
265 u_int64_t node_wwn;
266 u_int64_t port_wwn;
267 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
268
269 /*
270 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
271 */
272 caddr_t isp_scratch;
273 u_int32_t isp_scdma;
274} fcparam;
275
276#define FW_CONFIG_WAIT 0
277#define FW_WAIT_AL_PA 1
278#define FW_WAIT_LOGIN 2
279#define FW_READY 3
280#define FW_LOSS_OF_SYNC 4
281#define FW_ERROR 5
282#define FW_REINIT 6
283#define FW_NON_PART 7
284
285#define LOOP_NIL 0
286#define LOOP_LIP_RCVD 1
287#define LOOP_PDB_RCVD 2
288#define LOOP_READY 7
289
290/*
291 * Soft Structure per host adapter
292 */
293struct ispsoftc {
294 /*
295 * Platform (OS) specific data
296 */
297 struct isposinfo isp_osinfo;
298
299 /*
300 * Pointer to bus specific functions and data
301 */
302 struct ispmdvec * isp_mdvec;
303
304 /*
305 * (Mostly) nonvolatile state. Board specific parameters
306 * may contain some volatile state (e.g., current loop state).
307 */
308
309 void * isp_param; /* type specific */
310 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
311 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
312 u_int16_t isp_maxcmds; /* max possible I/O cmds */
313 u_int8_t isp_type; /* HBA Chip Type */
314 u_int8_t isp_revision; /* HBA Chip H/W Revision */
315
316 u_int32_t : 4,
317 isp_touched : 1, /* board ever seen? */
318 isp_fast_mttr : 1, /* fast sram */
319 isp_bustype : 1, /* SBus or PCI */
320 isp_dogactive : 1, /* watchdog running */
321 isp_dblev : 8, /* debug level */
322 isp_clock : 8, /* input clock */
323 isp_confopts : 8; /* config options */
324
325 /*
326 * Volatile state
327 */
328
329 volatile u_int32_t : 9,
330 isp_state : 3,
331 isp_sendmarker : 2, /* send a marker entry */
332 isp_update : 2, /* update parameters */
333 isp_nactive : 16; /* how many commands active */
334
335 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
336 volatile u_int16_t isp_reqidx; /* index of next request */
337 volatile u_int16_t isp_residx; /* index of next result */
338 volatile u_int16_t isp_lasthdls; /* last handle seed */
339
340 /*
341 * Active commands are stored here, indexed by handle functions.
342 */
343 ISP_SCSI_XFER_T **isp_xflist;
344
345 /*
346 * request/result queue pointers and dma handles for them.
347 */
348 caddr_t isp_rquest;
349 caddr_t isp_result;
350 u_int32_t isp_rquest_dma;
351 u_int32_t isp_result_dma;
352};
353
354#define SDPARAM(isp) ((sdparam *) (isp)->isp_param)
355#define FCPARAM(isp) ((fcparam *) (isp)->isp_param)
356
357/*
358 * ISP States
359 */
360#define ISP_NILSTATE 0
361#define ISP_RESETSTATE 1
362#define ISP_INITSTATE 2
363#define ISP_RUNSTATE 3
364
365/*
366 * ISP Configuration Options
367 */
368#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
369#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
370#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
371#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
372
373#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
374#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
375
376/*
377 * Bus (implementation) types
378 */
379#define ISP_BT_PCI 0 /* PCI Implementations */
380#define ISP_BT_SBUS 1 /* SBus Implementations */
381
382/*
383 * Chip Types
384 */
385#define ISP_HA_SCSI 0xf
386#define ISP_HA_SCSI_UNKNOWN 0x1
387#define ISP_HA_SCSI_1020 0x2
388#define ISP_HA_SCSI_1020A 0x3
389#define ISP_HA_SCSI_1040 0x4
390#define ISP_HA_SCSI_1040A 0x5
391#define ISP_HA_SCSI_1040B 0x6
392#define ISP_HA_SCSI_1040C 0x7
393#define ISP_HA_SCSI_1240 0x8
394#define ISP_HA_SCSI_1080 0x9
395#define ISP_HA_SCSI_1280 0xa
396#define ISP_HA_FC 0xf0
397#define ISP_HA_FC_2100 0x10
398#define ISP_HA_FC_2200 0x20
399
400#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
401#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
402#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
403#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
404#define IS_12X0(isp) \
405 (isp->isp_type == ISP_HA_SCSI_1240 || isp->isp_type == ISP_HA_SCSI_1280)
406#define IS_DUALBUS(isp) IS_12X0(isp)
407#define IS_ULTRA2(isp) \
408 (isp->isp_type == ISP_HA_SCSI_1080 || isp->isp_type == ISP_HA_SCSI_1280)
409#define IS_FC(isp) (isp->isp_type & ISP_HA_FC)
410
411/*
412 * Function Prototypes
413 */
414
415/*
416 * Reset Hardware. Totally. Assumes that you'll follow this with
417 * a call to isp_init.
418 */
419void isp_reset __P((struct ispsoftc *));
420
421/*
422 * Initialize Hardware to known state
423 */
424void isp_init __P((struct ispsoftc *));
425
426/*
427 * Reset the ISP and call completion for any orphaned commands.
428 */
429void isp_restart __P((struct ispsoftc *));
430
431/*
432 * Interrupt Service Routine
433 */
434int isp_intr __P((void *));
435
436/*
437 * Command Entry Point
438 */
439int32_t ispscsicmd __P((ISP_SCSI_XFER_T *));
440
441/*
442 * Platform Dependent to External to Internal Control Function
443 *
444 * Assumes all locks are held and that no reentrancy issues need be dealt with.
445 *
446 */
447typedef enum {
448 ISPCTL_RESET_BUS, /* Reset Bus */
449 ISPCTL_RESET_DEV, /* Reset Device */
450 ISPCTL_ABORT_CMD, /* Abort Command */
451 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */
| 59
60/*
61 * Vector for bus specific code to provide specific services.
62 */
63struct ispsoftc;
64struct ispmdvec {
65 u_int16_t (*dv_rd_reg) __P((struct ispsoftc *, int));
66 void (*dv_wr_reg) __P((struct ispsoftc *, int, u_int16_t));
67 int (*dv_mbxdma) __P((struct ispsoftc *));
68 int (*dv_dmaset) __P((struct ispsoftc *,
69 ISP_SCSI_XFER_T *, ispreq_t *, u_int16_t *, u_int16_t));
70 void (*dv_dmaclr)
71 __P((struct ispsoftc *, ISP_SCSI_XFER_T *, u_int32_t));
72 void (*dv_reset0) __P((struct ispsoftc *));
73 void (*dv_reset1) __P((struct ispsoftc *));
74 void (*dv_dregs) __P((struct ispsoftc *));
75 const u_int16_t *dv_ispfw; /* ptr to f/w */
76 u_int16_t dv_fwlen; /* length of f/w */
77 u_int16_t dv_codeorg; /* code ORG for f/w */
78 u_int32_t dv_fwrev; /* f/w revision */
79 /*
80 * Initial values for conf1 register
81 */
82 u_int16_t dv_conf1;
83 u_int16_t dv_clock; /* clock frequency */
84};
85
86#define MAX_TARGETS 16
87#ifdef ISP2100_FABRIC
88#define MAX_FC_TARG 256
89#else
90#define MAX_FC_TARG 126
91#endif
92
93#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
94#ifdef ISP2100_SCCLUN
95#define _ISP_FC_LUN(isp) 65536
96#else
97#define _ISP_FC_LUN(isp) 16
98#endif
99#define _ISP_SCSI_LUN(isp) \
100 ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(7, 55, 0))? 32 : 8)
101#define ISP_MAX_LUNS(isp) \
102 (IS_FC(isp)? _ISP_FC_LUN(isp) : _ISP_SCSI_LUN(isp))
103
104
105/*
106 * Macros to read, write ISP registers through bus specific code.
107 */
108
109#define ISP_READ(isp, reg) \
110 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
111
112#define ISP_WRITE(isp, reg, val) \
113 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
114
115#define ISP_MBOXDMASETUP(isp) \
116 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
117
118#define ISP_DMASETUP(isp, xs, req, iptrp, optr) \
119 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req), (iptrp), (optr))
120
121#define ISP_DMAFREE(isp, xs, hndl) \
122 if ((isp)->isp_mdvec->dv_dmaclr) \
123 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
124
125#define ISP_RESET0(isp) \
126 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
127#define ISP_RESET1(isp) \
128 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
129#define ISP_DUMPREGS(isp) \
130 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp))
131
132#define ISP_SETBITS(isp, reg, val) \
133 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
134
135#define ISP_CLRBITS(isp, reg, val) \
136 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
137
138/* this is the size of a queue entry (request and response) */
139#define QENTRY_LEN 64
140/* both request and result queue length must be a power of two */
141#define RQUEST_QUEUE_LEN MAXISPREQUEST
142/* I've seen wierdnesses with the result queue < 64 */
143#if MAXISPREQUEST > 64
144#define RESULT_QUEUE_LEN (MAXISPREQUEST/2)
145#else
146#define RESULT_QUEUE_LEN MAXISPREQUEST
147#endif
148#define ISP_QUEUE_ENTRY(q, idx) ((q) + ((idx) * QENTRY_LEN))
149#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
150#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
151#define ISP_QAVAIL(in, out, qlen) \
152 ((in == out)? (qlen - 1) : ((in > out)? \
153 ((qlen - 1) - (in - out)) : (out - in - 1)))
154
155#define ISP_ADD_REQUEST(isp, iptr) \
156 ISP_WRITE(isp, INMAILBOX4, iptr), isp->isp_reqidx = iptr
157
158/*
159 * SCSI Specific Host Adapter Parameters- per bus, per target
160 */
161
162typedef struct {
163 u_int isp_gotdparms : 1,
164 isp_req_ack_active_neg : 1,
165 isp_data_line_active_neg: 1,
166 isp_cmd_dma_burst_enable: 1,
167 isp_data_dma_burst_enabl: 1,
168 isp_fifo_threshold : 3,
169 isp_ultramode : 1,
170 isp_diffmode : 1,
171 isp_lvdmode : 1,
172 : 1,
173 isp_initiator_id : 4,
174 isp_async_data_setup : 4;
175 u_int16_t isp_selection_timeout;
176 u_int16_t isp_max_queue_depth;
177 u_int8_t isp_tag_aging;
178 u_int8_t isp_bus_reset_delay;
179 u_int8_t isp_retry_count;
180 u_int8_t isp_retry_delay;
181 struct {
182 u_int dev_enable : 1, /* ignored */
183 : 1,
184 dev_update : 1,
185 dev_refresh : 1,
186 exc_throttle : 8,
187 cur_offset : 4,
188 sync_offset : 4;
189 u_int8_t cur_period; /* current sync period */
190 u_int8_t sync_period; /* goal sync period */
191 u_int16_t dev_flags; /* goal device flags */
192 u_int16_t cur_dflags; /* current device flags */
193 } isp_devparam[MAX_TARGETS];
194} sdparam;
195
196/*
197 * Device Flags
198 */
199#define DPARM_DISC 0x8000
200#define DPARM_PARITY 0x4000
201#define DPARM_WIDE 0x2000
202#define DPARM_SYNC 0x1000
203#define DPARM_TQING 0x0800
204#define DPARM_ARQ 0x0400
205#define DPARM_QFRZ 0x0200
206#define DPARM_RENEG 0x0100
207#define DPARM_NARROW 0x0080 /* Possibly only available with >= 7.55 fw */
208#define DPARM_ASYNC 0x0040 /* Possibly only available with >= 7.55 fw */
209#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
210#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
211
212
213/* technically, not really correct, as they need to be rated based upon clock */
214#define ISP_40M_SYNCPARMS 0x080a
215#define ISP_20M_SYNCPARMS 0x080c
216#define ISP_10M_SYNCPARMS 0x0c19
217#define ISP_08M_SYNCPARMS 0x0c25
218#define ISP_05M_SYNCPARMS 0x0c32
219#define ISP_04M_SYNCPARMS 0x0c41
220
221/*
222 * Fibre Channel Specifics
223 */
224#define FL_PORT_ID 0x7e /* FL_Port Special ID */
225#define FC_PORT_ID 0x7f /* Fabric Controller Special ID */
226#define FC_SNS_ID 0x80 /* SNS Server Special ID */
227
228typedef struct {
229 u_int32_t isp_fwoptions : 16,
230 : 7,
231 loop_seen_once : 1,
232 isp_loopstate : 3, /* Current Loop State */
233 isp_fwstate : 3, /* ISP F/W state */
234 isp_gotdparms : 1,
235 isp_onfabric : 1;
236 u_int8_t isp_loopid; /* hard loop id */
237 u_int8_t isp_alpa; /* ALPA */
238 volatile u_int16_t isp_lipseq; /* LIP sequence # */
239 u_int32_t isp_portid;
240 u_int8_t isp_execthrottle;
241 u_int8_t isp_retry_delay;
242 u_int8_t isp_retry_count;
243 u_int8_t isp_reserved;
244 u_int16_t isp_maxalloc;
245 u_int16_t isp_maxfrmlen;
246 u_int64_t isp_nodewwn;
247 u_int64_t isp_portwwn;
248 /*
249 * Port Data Base. This is indexed by 'target', which is invariate.
250 * However, elements within can move around due to loop changes,
251 * so the actual loop ID passed to the F/W is in this structure.
252 * The first time the loop is seen up, loopid will match the index
253 * (except for fabric nodes which are above mapped above FC_SNS_ID
254 * and are completely virtual), but subsequent LIPs can cause things
255 * to move around.
256 */
257 struct lportdb {
258 u_int
259 loopid : 8,
260 : 4,
261 fabdev : 1,
262 roles : 2,
263 valid : 1;
264 u_int32_t portid;
265 u_int64_t node_wwn;
266 u_int64_t port_wwn;
267 } portdb[MAX_FC_TARG], tport[FL_PORT_ID];
268
269 /*
270 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
271 */
272 caddr_t isp_scratch;
273 u_int32_t isp_scdma;
274} fcparam;
275
276#define FW_CONFIG_WAIT 0
277#define FW_WAIT_AL_PA 1
278#define FW_WAIT_LOGIN 2
279#define FW_READY 3
280#define FW_LOSS_OF_SYNC 4
281#define FW_ERROR 5
282#define FW_REINIT 6
283#define FW_NON_PART 7
284
285#define LOOP_NIL 0
286#define LOOP_LIP_RCVD 1
287#define LOOP_PDB_RCVD 2
288#define LOOP_READY 7
289
290/*
291 * Soft Structure per host adapter
292 */
293struct ispsoftc {
294 /*
295 * Platform (OS) specific data
296 */
297 struct isposinfo isp_osinfo;
298
299 /*
300 * Pointer to bus specific functions and data
301 */
302 struct ispmdvec * isp_mdvec;
303
304 /*
305 * (Mostly) nonvolatile state. Board specific parameters
306 * may contain some volatile state (e.g., current loop state).
307 */
308
309 void * isp_param; /* type specific */
310 u_int16_t isp_fwrev[3]; /* Loaded F/W revision */
311 u_int16_t isp_romfw_rev[3]; /* PROM F/W revision */
312 u_int16_t isp_maxcmds; /* max possible I/O cmds */
313 u_int8_t isp_type; /* HBA Chip Type */
314 u_int8_t isp_revision; /* HBA Chip H/W Revision */
315
316 u_int32_t : 4,
317 isp_touched : 1, /* board ever seen? */
318 isp_fast_mttr : 1, /* fast sram */
319 isp_bustype : 1, /* SBus or PCI */
320 isp_dogactive : 1, /* watchdog running */
321 isp_dblev : 8, /* debug level */
322 isp_clock : 8, /* input clock */
323 isp_confopts : 8; /* config options */
324
325 /*
326 * Volatile state
327 */
328
329 volatile u_int32_t : 9,
330 isp_state : 3,
331 isp_sendmarker : 2, /* send a marker entry */
332 isp_update : 2, /* update parameters */
333 isp_nactive : 16; /* how many commands active */
334
335 volatile u_int16_t isp_reqodx; /* index of last ISP pickup */
336 volatile u_int16_t isp_reqidx; /* index of next request */
337 volatile u_int16_t isp_residx; /* index of next result */
338 volatile u_int16_t isp_lasthdls; /* last handle seed */
339
340 /*
341 * Active commands are stored here, indexed by handle functions.
342 */
343 ISP_SCSI_XFER_T **isp_xflist;
344
345 /*
346 * request/result queue pointers and dma handles for them.
347 */
348 caddr_t isp_rquest;
349 caddr_t isp_result;
350 u_int32_t isp_rquest_dma;
351 u_int32_t isp_result_dma;
352};
353
354#define SDPARAM(isp) ((sdparam *) (isp)->isp_param)
355#define FCPARAM(isp) ((fcparam *) (isp)->isp_param)
356
357/*
358 * ISP States
359 */
360#define ISP_NILSTATE 0
361#define ISP_RESETSTATE 1
362#define ISP_INITSTATE 2
363#define ISP_RUNSTATE 3
364
365/*
366 * ISP Configuration Options
367 */
368#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
369#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
370#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
371#define ISP_CFG_OWNWWN 0x02 /* override NVRAM wwn */
372
373#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
374#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
375
376/*
377 * Bus (implementation) types
378 */
379#define ISP_BT_PCI 0 /* PCI Implementations */
380#define ISP_BT_SBUS 1 /* SBus Implementations */
381
382/*
383 * Chip Types
384 */
385#define ISP_HA_SCSI 0xf
386#define ISP_HA_SCSI_UNKNOWN 0x1
387#define ISP_HA_SCSI_1020 0x2
388#define ISP_HA_SCSI_1020A 0x3
389#define ISP_HA_SCSI_1040 0x4
390#define ISP_HA_SCSI_1040A 0x5
391#define ISP_HA_SCSI_1040B 0x6
392#define ISP_HA_SCSI_1040C 0x7
393#define ISP_HA_SCSI_1240 0x8
394#define ISP_HA_SCSI_1080 0x9
395#define ISP_HA_SCSI_1280 0xa
396#define ISP_HA_FC 0xf0
397#define ISP_HA_FC_2100 0x10
398#define ISP_HA_FC_2200 0x20
399
400#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
401#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
402#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
403#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
404#define IS_12X0(isp) \
405 (isp->isp_type == ISP_HA_SCSI_1240 || isp->isp_type == ISP_HA_SCSI_1280)
406#define IS_DUALBUS(isp) IS_12X0(isp)
407#define IS_ULTRA2(isp) \
408 (isp->isp_type == ISP_HA_SCSI_1080 || isp->isp_type == ISP_HA_SCSI_1280)
409#define IS_FC(isp) (isp->isp_type & ISP_HA_FC)
410
411/*
412 * Function Prototypes
413 */
414
415/*
416 * Reset Hardware. Totally. Assumes that you'll follow this with
417 * a call to isp_init.
418 */
419void isp_reset __P((struct ispsoftc *));
420
421/*
422 * Initialize Hardware to known state
423 */
424void isp_init __P((struct ispsoftc *));
425
426/*
427 * Reset the ISP and call completion for any orphaned commands.
428 */
429void isp_restart __P((struct ispsoftc *));
430
431/*
432 * Interrupt Service Routine
433 */
434int isp_intr __P((void *));
435
436/*
437 * Command Entry Point
438 */
439int32_t ispscsicmd __P((ISP_SCSI_XFER_T *));
440
441/*
442 * Platform Dependent to External to Internal Control Function
443 *
444 * Assumes all locks are held and that no reentrancy issues need be dealt with.
445 *
446 */
447typedef enum {
448 ISPCTL_RESET_BUS, /* Reset Bus */
449 ISPCTL_RESET_DEV, /* Reset Device */
450 ISPCTL_ABORT_CMD, /* Abort Command */
451 ISPCTL_UPDATE_PARAMS, /* Update Operating Parameters */
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