2/*-
3 * Copyright (c) 1997-2009 by Matthew Jacob
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 */
29/*
30 * Soft Definitions for for Qlogic ISP SCSI adapters.
31 */
32
33#ifndef _ISPVAR_H
34#define _ISPVAR_H
35
36#if defined(__NetBSD__) || defined(__OpenBSD__)
37#include <dev/ic/isp_stds.h>
38#include <dev/ic/ispmbox.h>
39#endif
40#ifdef __FreeBSD__
41#include <dev/isp/isp_stds.h>
42#include <dev/isp/ispmbox.h>
43#endif
44#ifdef __linux__
45#include "isp_stds.h"
46#include "ispmbox.h"
47#endif
48#ifdef __svr4__
49#include "isp_stds.h"
50#include "ispmbox.h"
51#endif
52
53#define ISP_CORE_VERSION_MAJOR 7
54#define ISP_CORE_VERSION_MINOR 0
55
56/*
57 * Vector for bus specific code to provide specific services.
58 */
59typedef struct ispsoftc ispsoftc_t;
60struct ispmdvec {
61 int (*dv_rd_isr) (ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *);
62 uint32_t (*dv_rd_reg) (ispsoftc_t *, int);
63 void (*dv_wr_reg) (ispsoftc_t *, int, uint32_t);
64 int (*dv_mbxdma) (ispsoftc_t *);
65 int (*dv_dmaset) (ispsoftc_t *, XS_T *, void *);
66 void (*dv_dmaclr) (ispsoftc_t *, XS_T *, uint32_t);
67 void (*dv_reset0) (ispsoftc_t *);
68 void (*dv_reset1) (ispsoftc_t *);
69 void (*dv_dregs) (ispsoftc_t *, const char *);
70 const void * dv_ispfw; /* ptr to f/w */
71 uint16_t dv_conf1;
72 uint16_t dv_clock; /* clock frequency */
73};
74
75/*
76 * Overall parameters
77 */
78#define MAX_TARGETS 16
79#ifndef MAX_FC_TARG
80#define MAX_FC_TARG 1024
81#endif
82#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
83#define ISP_MAX_LUNS(isp) (isp)->isp_maxluns
84
85/*
86 * Macros to access ISP registers through bus specific layers-
87 * mostly wrappers to vector through the mdvec structure.
88 */
89#define ISP_READ_ISR(isp, isrp, semap, info) \
90 (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, info)
91
92#define ISP_READ(isp, reg) \
93 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
94
95#define ISP_WRITE(isp, reg, val) \
96 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
97
98#define ISP_MBOXDMASETUP(isp) \
99 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
100
101#define ISP_DMASETUP(isp, xs, req) \
102 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req))
103
104#define ISP_DMAFREE(isp, xs, hndl) \
105 if ((isp)->isp_mdvec->dv_dmaclr) \
106 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
107
108#define ISP_RESET0(isp) \
109 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
110#define ISP_RESET1(isp) \
111 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
112#define ISP_DUMPREGS(isp, m) \
113 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
114
115#define ISP_SETBITS(isp, reg, val) \
116 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
117
118#define ISP_CLRBITS(isp, reg, val) \
119 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
120
121/*
122 * The MEMORYBARRIER macro is defined per platform (to provide synchronization
123 * on Request and Response Queues, Scratch DMA areas, and Registers)
124 *
125 * Defined Memory Barrier Synchronization Types
126 */
127#define SYNC_REQUEST 0 /* request queue synchronization */
128#define SYNC_RESULT 1 /* result queue synchronization */
129#define SYNC_SFORDEV 2 /* scratch, sync for ISP */
130#define SYNC_SFORCPU 3 /* scratch, sync for CPU */
131#define SYNC_REG 4 /* for registers */
132#define SYNC_ATIOQ 5 /* atio result queue (24xx) */
133#define SYNC_IFORDEV 6 /* synchrounous IOCB, sync for ISP */
134#define SYNC_IFORCPU 7 /* synchrounous IOCB, sync for CPU */
135
136/*
137 * Request/Response Queue defines and macros.
138 * The maximum is defined per platform (and can be based on board type).
139 */
140/* This is the size of a queue entry (request and response) */
141#define QENTRY_LEN 64
142/* Both request and result queue length must be a power of two */
143#define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x)
144#ifdef ISP_TARGET_MODE
145#define RESULT_QUEUE_LEN(x) MAXISPREQUEST(x)
146#else
147#define RESULT_QUEUE_LEN(x) \
148 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
149#endif
150#define ISP_QUEUE_ENTRY(q, idx) (((uint8_t *)q) + ((idx) * QENTRY_LEN))
151#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
152#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
153#define ISP_QFREE(in, out, qlen) \
154 ((in == out)? (qlen - 1) : ((in > out)? \
155 ((qlen - 1) - (in - out)) : (out - in - 1)))
156#define ISP_QAVAIL(isp) \
157 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
158
159#define ISP_ADD_REQUEST(isp, nxti) \
160 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
161 ISP_WRITE(isp, isp->isp_rqstinrp, nxti); \
162 isp->isp_reqidx = nxti
163
164#define ISP_SYNC_REQUEST(isp) \
165 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
166 isp->isp_reqidx = ISP_NXT_QENTRY(isp->isp_reqidx, RQUEST_QUEUE_LEN(isp)); \
167 ISP_WRITE(isp, isp->isp_rqstinrp, isp->isp_reqidx)
168
169/*
170 * SCSI Specific Host Adapter Parameters- per bus, per target
171 */
172typedef struct {
173 uint32_t : 8,
174 update : 1,
175 sendmarker : 1,
176 isp_req_ack_active_neg : 1,
177 isp_data_line_active_neg: 1,
178 isp_cmd_dma_burst_enable: 1,
179 isp_data_dma_burst_enabl: 1,
180 isp_fifo_threshold : 3,
181 isp_ptisp : 1,
182 isp_ultramode : 1,
183 isp_diffmode : 1,
184 isp_lvdmode : 1,
185 isp_fast_mttr : 1, /* fast sram */
186 isp_initiator_id : 4,
187 isp_async_data_setup : 4;
188 uint16_t isp_selection_timeout;
189 uint16_t isp_max_queue_depth;
190 uint8_t isp_tag_aging;
191 uint8_t isp_bus_reset_delay;
192 uint8_t isp_retry_count;
193 uint8_t isp_retry_delay;
194 struct {
195 uint32_t
196 exc_throttle : 8,
197 : 1,
198 dev_enable : 1, /* ignored */
199 dev_update : 1,
200 dev_refresh : 1,
201 actv_offset : 4,
202 goal_offset : 4,
203 nvrm_offset : 4;
204 uint8_t actv_period; /* current sync period */
205 uint8_t goal_period; /* goal sync period */
206 uint8_t nvrm_period; /* nvram sync period */
207 uint16_t actv_flags; /* current device flags */
208 uint16_t goal_flags; /* goal device flags */
209 uint16_t nvrm_flags; /* nvram device flags */
210 } isp_devparam[MAX_TARGETS];
211} sdparam;
212
213/*
214 * Device Flags
215 */
216#define DPARM_DISC 0x8000
217#define DPARM_PARITY 0x4000
218#define DPARM_WIDE 0x2000
219#define DPARM_SYNC 0x1000
220#define DPARM_TQING 0x0800
221#define DPARM_ARQ 0x0400
222#define DPARM_QFRZ 0x0200
223#define DPARM_RENEG 0x0100
224#define DPARM_NARROW 0x0080
225#define DPARM_ASYNC 0x0040
226#define DPARM_PPR 0x0020
227#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
228#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
229
230/* technically, not really correct, as they need to be rated based upon clock */
231#define ISP_80M_SYNCPARMS 0x0c09
232#define ISP_40M_SYNCPARMS 0x0c0a
233#define ISP_20M_SYNCPARMS 0x0c0c
234#define ISP_20M_SYNCPARMS_1040 0x080c
235#define ISP_10M_SYNCPARMS 0x0c19
236#define ISP_08M_SYNCPARMS 0x0c25
237#define ISP_05M_SYNCPARMS 0x0c32
238#define ISP_04M_SYNCPARMS 0x0c41
239
240/*
241 * Fibre Channel Specifics
242 */
243/* These are for non-2K Login Firmware cards */
244#define FL_ID 0x7e /* FL_Port Special ID */
245#define SNS_ID 0x80 /* SNS Server Special ID */
246#define NPH_MAX 0xfe
247
248/* These are for 2K Login Firmware cards */
249#define NPH_RESERVED 0x7F0 /* begin of reserved N-port handles */
250#define NPH_MGT_ID 0x7FA /* Management Server Special ID */
251#define NPH_SNS_ID 0x7FC /* SNS Server Special ID */
252#define NPH_FABRIC_CTLR 0x7FD /* Fabric Controller (0xFFFFFD) */
253#define NPH_FL_ID 0x7FE /* F Port Special ID (0xFFFFFE) */
254#define NPH_IP_BCST 0x7FF /* IP Broadcast Special ID (0xFFFFFF) */
255#define NPH_MAX_2K 0x800
256
257/*
258 * "Unassigned" handle to be used internally
259 */
260#define NIL_HANDLE 0xffff
261
262/*
263 * Limit for devices on an arbitrated loop.
264 */
265#define LOCAL_LOOP_LIM 126
266
267/*
268 * Limit for (2K login) N-port handle amounts
269 */
270#define MAX_NPORT_HANDLE 2048
271
272/*
273 * Special Constants
274 */
275#define INI_NONE ((uint64_t) 0)
276#define ISP_NOCHAN 0xff
277
278/*
279 * Special Port IDs
280 */
281#define MANAGEMENT_PORT_ID 0xFFFFFA
282#define SNS_PORT_ID 0xFFFFFC
283#define FABRIC_PORT_ID 0xFFFFFE
284#define PORT_ANY 0xFFFFFF
285#define PORT_NONE 0
286#define VALID_PORT(port) (port != PORT_NONE && port != PORT_ANY)
287#define DOMAIN_CONTROLLER_BASE 0xFFFC00
288#define DOMAIN_CONTROLLER_END 0xFFFCFF
289
290/*
291 * Command Handles
292 *
293 * Most QLogic initiator or target have 32 bit handles associated with them.
294 * We want to have a quick way to index back and forth between a local SCSI
295 * command context and what the firmware is passing back to us. We also
296 * want to avoid working on stale information. This structure handles both
297 * at the expense of some local memory.
298 *
299 * The handle is architected thusly:
300 *
301 * 0 means "free handle"
302 * bits 0..12 index commands
303 * bits 13..15 bits index usage
304 * bits 16..31 contain a rolling sequence
305 *
306 *
307 */
308typedef struct {
309 void * cmd; /* associated command context */
310 uint32_t handle; /* handle associated with this command */
311} isp_hdl_t;
312#define ISP_HANDLE_FREE 0x00000000
313#define ISP_HANDLE_CMD_MASK 0x00001fff
314#define ISP_HANDLE_USAGE_MASK 0x0000e000
315#define ISP_HANDLE_USAGE_SHIFT 13
316#define ISP_H2HT(hdl) ((hdl & ISP_HANDLE_USAGE_MASK) >> ISP_HANDLE_USAGE_SHIFT)
317# define ISP_HANDLE_NONE 0
318# define ISP_HANDLE_INITIATOR 1
319# define ISP_HANDLE_TARGET 2
320# define ISP_HANDLE_CTRL 3
321#define ISP_HANDLE_SEQ_MASK 0xffff0000
322#define ISP_HANDLE_SEQ_SHIFT 16
323#define ISP_H2SEQ(hdl) ((hdl & ISP_HANDLE_SEQ_MASK) >> ISP_HANDLE_SEQ_SHIFT)
324#define ISP_VALID_HANDLE(c, hdl) \
325 ((ISP_H2HT(hdl) == ISP_HANDLE_INITIATOR || \
326 ISP_H2HT(hdl) == ISP_HANDLE_TARGET || \
327 ISP_H2HT(hdl) == ISP_HANDLE_CTRL) && \
328 ((hdl) & ISP_HANDLE_CMD_MASK) < (c)->isp_maxcmds && \
329 (hdl) == ((c)->isp_xflist[(hdl) & ISP_HANDLE_CMD_MASK].handle))
330#define ISP_BAD_HANDLE_INDEX 0xffffffff
331
332
333/*
334 * FC Port Database entry.
335 *
336 * It has a handle that the f/w uses to address commands to a device.
337 * This handle's value may be assigned by the firmware (e.g., for local loop
338 * devices) or by the driver (e.g., for fabric devices).
339 *
340 * It has a state. If the state if VALID, that means that we've logged into
341 * the device.
342 *
343 * Local loop devices the firmware automatically performs PLOGI on for us
344 * (which is why that handle is imposed upon us). Fabric devices we assign
345 * a handle to and perform the PLOGI on.
346 *
347 * When a PORT DATABASE CHANGED asynchronous event occurs, we mark all VALID
348 * entries as PROBATIONAL. This allows us, if policy says to, just keep track
349 * of devices whose handles change but are otherwise the same device (and
350 * thus keep 'target' constant).
351 *
352 * In any case, we search all possible local loop handles. For each one that
353 * has a port database entity returned, we search for any PROBATIONAL entry
354 * that matches it and update as appropriate. Otherwise, as a new entry, we
355 * find room for it in the Port Database. We *try* and use the handle as the
356 * index to put it into the Database, but that's just an optimization. We mark
357 * the entry VALID and make sure that the target index is updated and correct.
358 *
359 * When we get done searching the local loop, we then search similarily for
360 * a list of devices we've gotten from the fabric name controller (if we're
361 * on a fabric). VALID marking is also done similarily.
362 *
363 * When all of this is done, we can march through the database and clean up
364 * any entry that is still PROBATIONAL (these represent devices which have
365 * departed). Then we're done and can resume normal operations.
366 *
367 * Negative invariants that we try and test for are:
368 *
369 * + There can never be two non-NIL entries with the same { Port, Node } WWN
370 * duples.
371 *
372 * + There can never be two non-NIL entries with the same handle.
373 */
374typedef struct {
375 /*
376 * This is the handle that the firmware needs in order for us to
377 * send commands to the device. For pre-24XX cards, this would be
378 * the 'loopid'.
379 */
380 uint16_t handle;
381
382 /*
383 * A device is 'autologin' if the firmware automatically logs into
384 * it (re-logins as needed). Basically, local private loop devices.
385 *
386 * PRLI word 3 parameters contains role as well as other things.
387 *
388 * The state is the current state of this entry.
389 *
390 * The is_target is the current state of target on this port.
391 *
392 * The is_initiator is the current state of initiator on this port.
393 *
394 * Portid is obvious, as are node && port WWNs. The new_role and
395 * new_portid is for when we are pending a change.
396 */
397 uint16_t prli_word3; /* PRLI parameters */
398 uint16_t new_prli_word3; /* Incoming new PRLI parameters */
399 uint16_t : 11,
400 autologin : 1, /* F/W does PLOGI/PLOGO */
401 probational : 1,
402 state : 3;
403 uint32_t : 6,
404 is_target : 1,
405 is_initiator : 1,
406 portid : 24;
407 uint32_t
408 : 8,
409 new_portid : 24;
410 uint64_t node_wwn;
411 uint64_t port_wwn;
412 uint32_t gone_timer;
413} fcportdb_t;
414
415#define FC_PORTDB_STATE_NIL 0 /* Empty DB slot */
416#define FC_PORTDB_STATE_DEAD 1 /* Was valid, but no more. */
417#define FC_PORTDB_STATE_CHANGED 2 /* Was valid, but changed. */
418#define FC_PORTDB_STATE_NEW 3 /* Logged in, not announced. */
419#define FC_PORTDB_STATE_ZOMBIE 4 /* Invalid, but announced. */
420#define FC_PORTDB_STATE_VALID 5 /* Valid */
421
422#define FC_PORTDB_TGT(isp, bus, pdb) (int)(lp - FCPARAM(isp, bus)->portdb)
423
424/*
425 * FC card specific information
426 *
427 * This structure is replicated across multiple channels for multi-id
428 * capapble chipsets, with some entities different on a per-channel basis.
429 */
430
431typedef struct {
432 int isp_gbspeed; /* Connection speed */
433 int isp_linkstate; /* Link state */
434 int isp_fwstate; /* ISP F/W state */
435 int isp_loopstate; /* Loop State */
436 int isp_topo; /* Connection Type */
437
438 uint32_t : 4,
439 fctape_enabled : 1,
440 sendmarker : 1,
441 role : 2,
442 isp_portid : 24; /* S_ID */
443
444 uint16_t isp_fwoptions;
445 uint16_t isp_xfwoptions;
446 uint16_t isp_zfwoptions;
447 uint16_t isp_loopid; /* hard loop id */
448 uint16_t isp_sns_hdl; /* N-port handle for SNS */
449 uint16_t isp_lasthdl; /* only valid for channel 0 */
450 uint16_t isp_maxalloc;
451 uint16_t isp_fabric_params;
| 2/*-
3 * Copyright (c) 1997-2009 by Matthew Jacob
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 */
29/*
30 * Soft Definitions for for Qlogic ISP SCSI adapters.
31 */
32
33#ifndef _ISPVAR_H
34#define _ISPVAR_H
35
36#if defined(__NetBSD__) || defined(__OpenBSD__)
37#include <dev/ic/isp_stds.h>
38#include <dev/ic/ispmbox.h>
39#endif
40#ifdef __FreeBSD__
41#include <dev/isp/isp_stds.h>
42#include <dev/isp/ispmbox.h>
43#endif
44#ifdef __linux__
45#include "isp_stds.h"
46#include "ispmbox.h"
47#endif
48#ifdef __svr4__
49#include "isp_stds.h"
50#include "ispmbox.h"
51#endif
52
53#define ISP_CORE_VERSION_MAJOR 7
54#define ISP_CORE_VERSION_MINOR 0
55
56/*
57 * Vector for bus specific code to provide specific services.
58 */
59typedef struct ispsoftc ispsoftc_t;
60struct ispmdvec {
61 int (*dv_rd_isr) (ispsoftc_t *, uint16_t *, uint16_t *, uint16_t *);
62 uint32_t (*dv_rd_reg) (ispsoftc_t *, int);
63 void (*dv_wr_reg) (ispsoftc_t *, int, uint32_t);
64 int (*dv_mbxdma) (ispsoftc_t *);
65 int (*dv_dmaset) (ispsoftc_t *, XS_T *, void *);
66 void (*dv_dmaclr) (ispsoftc_t *, XS_T *, uint32_t);
67 void (*dv_reset0) (ispsoftc_t *);
68 void (*dv_reset1) (ispsoftc_t *);
69 void (*dv_dregs) (ispsoftc_t *, const char *);
70 const void * dv_ispfw; /* ptr to f/w */
71 uint16_t dv_conf1;
72 uint16_t dv_clock; /* clock frequency */
73};
74
75/*
76 * Overall parameters
77 */
78#define MAX_TARGETS 16
79#ifndef MAX_FC_TARG
80#define MAX_FC_TARG 1024
81#endif
82#define ISP_MAX_TARGETS(isp) (IS_FC(isp)? MAX_FC_TARG : MAX_TARGETS)
83#define ISP_MAX_LUNS(isp) (isp)->isp_maxluns
84
85/*
86 * Macros to access ISP registers through bus specific layers-
87 * mostly wrappers to vector through the mdvec structure.
88 */
89#define ISP_READ_ISR(isp, isrp, semap, info) \
90 (*(isp)->isp_mdvec->dv_rd_isr)(isp, isrp, semap, info)
91
92#define ISP_READ(isp, reg) \
93 (*(isp)->isp_mdvec->dv_rd_reg)((isp), (reg))
94
95#define ISP_WRITE(isp, reg, val) \
96 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), (val))
97
98#define ISP_MBOXDMASETUP(isp) \
99 (*(isp)->isp_mdvec->dv_mbxdma)((isp))
100
101#define ISP_DMASETUP(isp, xs, req) \
102 (*(isp)->isp_mdvec->dv_dmaset)((isp), (xs), (req))
103
104#define ISP_DMAFREE(isp, xs, hndl) \
105 if ((isp)->isp_mdvec->dv_dmaclr) \
106 (*(isp)->isp_mdvec->dv_dmaclr)((isp), (xs), (hndl))
107
108#define ISP_RESET0(isp) \
109 if ((isp)->isp_mdvec->dv_reset0) (*(isp)->isp_mdvec->dv_reset0)((isp))
110#define ISP_RESET1(isp) \
111 if ((isp)->isp_mdvec->dv_reset1) (*(isp)->isp_mdvec->dv_reset1)((isp))
112#define ISP_DUMPREGS(isp, m) \
113 if ((isp)->isp_mdvec->dv_dregs) (*(isp)->isp_mdvec->dv_dregs)((isp),(m))
114
115#define ISP_SETBITS(isp, reg, val) \
116 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) | (val))
117
118#define ISP_CLRBITS(isp, reg, val) \
119 (*(isp)->isp_mdvec->dv_wr_reg)((isp), (reg), ISP_READ((isp), (reg)) & ~(val))
120
121/*
122 * The MEMORYBARRIER macro is defined per platform (to provide synchronization
123 * on Request and Response Queues, Scratch DMA areas, and Registers)
124 *
125 * Defined Memory Barrier Synchronization Types
126 */
127#define SYNC_REQUEST 0 /* request queue synchronization */
128#define SYNC_RESULT 1 /* result queue synchronization */
129#define SYNC_SFORDEV 2 /* scratch, sync for ISP */
130#define SYNC_SFORCPU 3 /* scratch, sync for CPU */
131#define SYNC_REG 4 /* for registers */
132#define SYNC_ATIOQ 5 /* atio result queue (24xx) */
133#define SYNC_IFORDEV 6 /* synchrounous IOCB, sync for ISP */
134#define SYNC_IFORCPU 7 /* synchrounous IOCB, sync for CPU */
135
136/*
137 * Request/Response Queue defines and macros.
138 * The maximum is defined per platform (and can be based on board type).
139 */
140/* This is the size of a queue entry (request and response) */
141#define QENTRY_LEN 64
142/* Both request and result queue length must be a power of two */
143#define RQUEST_QUEUE_LEN(x) MAXISPREQUEST(x)
144#ifdef ISP_TARGET_MODE
145#define RESULT_QUEUE_LEN(x) MAXISPREQUEST(x)
146#else
147#define RESULT_QUEUE_LEN(x) \
148 (((MAXISPREQUEST(x) >> 2) < 64)? 64 : MAXISPREQUEST(x) >> 2)
149#endif
150#define ISP_QUEUE_ENTRY(q, idx) (((uint8_t *)q) + ((idx) * QENTRY_LEN))
151#define ISP_QUEUE_SIZE(n) ((n) * QENTRY_LEN)
152#define ISP_NXT_QENTRY(idx, qlen) (((idx) + 1) & ((qlen)-1))
153#define ISP_QFREE(in, out, qlen) \
154 ((in == out)? (qlen - 1) : ((in > out)? \
155 ((qlen - 1) - (in - out)) : (out - in - 1)))
156#define ISP_QAVAIL(isp) \
157 ISP_QFREE(isp->isp_reqidx, isp->isp_reqodx, RQUEST_QUEUE_LEN(isp))
158
159#define ISP_ADD_REQUEST(isp, nxti) \
160 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
161 ISP_WRITE(isp, isp->isp_rqstinrp, nxti); \
162 isp->isp_reqidx = nxti
163
164#define ISP_SYNC_REQUEST(isp) \
165 MEMORYBARRIER(isp, SYNC_REQUEST, isp->isp_reqidx, QENTRY_LEN, -1); \
166 isp->isp_reqidx = ISP_NXT_QENTRY(isp->isp_reqidx, RQUEST_QUEUE_LEN(isp)); \
167 ISP_WRITE(isp, isp->isp_rqstinrp, isp->isp_reqidx)
168
169/*
170 * SCSI Specific Host Adapter Parameters- per bus, per target
171 */
172typedef struct {
173 uint32_t : 8,
174 update : 1,
175 sendmarker : 1,
176 isp_req_ack_active_neg : 1,
177 isp_data_line_active_neg: 1,
178 isp_cmd_dma_burst_enable: 1,
179 isp_data_dma_burst_enabl: 1,
180 isp_fifo_threshold : 3,
181 isp_ptisp : 1,
182 isp_ultramode : 1,
183 isp_diffmode : 1,
184 isp_lvdmode : 1,
185 isp_fast_mttr : 1, /* fast sram */
186 isp_initiator_id : 4,
187 isp_async_data_setup : 4;
188 uint16_t isp_selection_timeout;
189 uint16_t isp_max_queue_depth;
190 uint8_t isp_tag_aging;
191 uint8_t isp_bus_reset_delay;
192 uint8_t isp_retry_count;
193 uint8_t isp_retry_delay;
194 struct {
195 uint32_t
196 exc_throttle : 8,
197 : 1,
198 dev_enable : 1, /* ignored */
199 dev_update : 1,
200 dev_refresh : 1,
201 actv_offset : 4,
202 goal_offset : 4,
203 nvrm_offset : 4;
204 uint8_t actv_period; /* current sync period */
205 uint8_t goal_period; /* goal sync period */
206 uint8_t nvrm_period; /* nvram sync period */
207 uint16_t actv_flags; /* current device flags */
208 uint16_t goal_flags; /* goal device flags */
209 uint16_t nvrm_flags; /* nvram device flags */
210 } isp_devparam[MAX_TARGETS];
211} sdparam;
212
213/*
214 * Device Flags
215 */
216#define DPARM_DISC 0x8000
217#define DPARM_PARITY 0x4000
218#define DPARM_WIDE 0x2000
219#define DPARM_SYNC 0x1000
220#define DPARM_TQING 0x0800
221#define DPARM_ARQ 0x0400
222#define DPARM_QFRZ 0x0200
223#define DPARM_RENEG 0x0100
224#define DPARM_NARROW 0x0080
225#define DPARM_ASYNC 0x0040
226#define DPARM_PPR 0x0020
227#define DPARM_DEFAULT (0xFF00 & ~DPARM_QFRZ)
228#define DPARM_SAFE_DFLT (DPARM_DEFAULT & ~(DPARM_WIDE|DPARM_SYNC|DPARM_TQING))
229
230/* technically, not really correct, as they need to be rated based upon clock */
231#define ISP_80M_SYNCPARMS 0x0c09
232#define ISP_40M_SYNCPARMS 0x0c0a
233#define ISP_20M_SYNCPARMS 0x0c0c
234#define ISP_20M_SYNCPARMS_1040 0x080c
235#define ISP_10M_SYNCPARMS 0x0c19
236#define ISP_08M_SYNCPARMS 0x0c25
237#define ISP_05M_SYNCPARMS 0x0c32
238#define ISP_04M_SYNCPARMS 0x0c41
239
240/*
241 * Fibre Channel Specifics
242 */
243/* These are for non-2K Login Firmware cards */
244#define FL_ID 0x7e /* FL_Port Special ID */
245#define SNS_ID 0x80 /* SNS Server Special ID */
246#define NPH_MAX 0xfe
247
248/* These are for 2K Login Firmware cards */
249#define NPH_RESERVED 0x7F0 /* begin of reserved N-port handles */
250#define NPH_MGT_ID 0x7FA /* Management Server Special ID */
251#define NPH_SNS_ID 0x7FC /* SNS Server Special ID */
252#define NPH_FABRIC_CTLR 0x7FD /* Fabric Controller (0xFFFFFD) */
253#define NPH_FL_ID 0x7FE /* F Port Special ID (0xFFFFFE) */
254#define NPH_IP_BCST 0x7FF /* IP Broadcast Special ID (0xFFFFFF) */
255#define NPH_MAX_2K 0x800
256
257/*
258 * "Unassigned" handle to be used internally
259 */
260#define NIL_HANDLE 0xffff
261
262/*
263 * Limit for devices on an arbitrated loop.
264 */
265#define LOCAL_LOOP_LIM 126
266
267/*
268 * Limit for (2K login) N-port handle amounts
269 */
270#define MAX_NPORT_HANDLE 2048
271
272/*
273 * Special Constants
274 */
275#define INI_NONE ((uint64_t) 0)
276#define ISP_NOCHAN 0xff
277
278/*
279 * Special Port IDs
280 */
281#define MANAGEMENT_PORT_ID 0xFFFFFA
282#define SNS_PORT_ID 0xFFFFFC
283#define FABRIC_PORT_ID 0xFFFFFE
284#define PORT_ANY 0xFFFFFF
285#define PORT_NONE 0
286#define VALID_PORT(port) (port != PORT_NONE && port != PORT_ANY)
287#define DOMAIN_CONTROLLER_BASE 0xFFFC00
288#define DOMAIN_CONTROLLER_END 0xFFFCFF
289
290/*
291 * Command Handles
292 *
293 * Most QLogic initiator or target have 32 bit handles associated with them.
294 * We want to have a quick way to index back and forth between a local SCSI
295 * command context and what the firmware is passing back to us. We also
296 * want to avoid working on stale information. This structure handles both
297 * at the expense of some local memory.
298 *
299 * The handle is architected thusly:
300 *
301 * 0 means "free handle"
302 * bits 0..12 index commands
303 * bits 13..15 bits index usage
304 * bits 16..31 contain a rolling sequence
305 *
306 *
307 */
308typedef struct {
309 void * cmd; /* associated command context */
310 uint32_t handle; /* handle associated with this command */
311} isp_hdl_t;
312#define ISP_HANDLE_FREE 0x00000000
313#define ISP_HANDLE_CMD_MASK 0x00001fff
314#define ISP_HANDLE_USAGE_MASK 0x0000e000
315#define ISP_HANDLE_USAGE_SHIFT 13
316#define ISP_H2HT(hdl) ((hdl & ISP_HANDLE_USAGE_MASK) >> ISP_HANDLE_USAGE_SHIFT)
317# define ISP_HANDLE_NONE 0
318# define ISP_HANDLE_INITIATOR 1
319# define ISP_HANDLE_TARGET 2
320# define ISP_HANDLE_CTRL 3
321#define ISP_HANDLE_SEQ_MASK 0xffff0000
322#define ISP_HANDLE_SEQ_SHIFT 16
323#define ISP_H2SEQ(hdl) ((hdl & ISP_HANDLE_SEQ_MASK) >> ISP_HANDLE_SEQ_SHIFT)
324#define ISP_VALID_HANDLE(c, hdl) \
325 ((ISP_H2HT(hdl) == ISP_HANDLE_INITIATOR || \
326 ISP_H2HT(hdl) == ISP_HANDLE_TARGET || \
327 ISP_H2HT(hdl) == ISP_HANDLE_CTRL) && \
328 ((hdl) & ISP_HANDLE_CMD_MASK) < (c)->isp_maxcmds && \
329 (hdl) == ((c)->isp_xflist[(hdl) & ISP_HANDLE_CMD_MASK].handle))
330#define ISP_BAD_HANDLE_INDEX 0xffffffff
331
332
333/*
334 * FC Port Database entry.
335 *
336 * It has a handle that the f/w uses to address commands to a device.
337 * This handle's value may be assigned by the firmware (e.g., for local loop
338 * devices) or by the driver (e.g., for fabric devices).
339 *
340 * It has a state. If the state if VALID, that means that we've logged into
341 * the device.
342 *
343 * Local loop devices the firmware automatically performs PLOGI on for us
344 * (which is why that handle is imposed upon us). Fabric devices we assign
345 * a handle to and perform the PLOGI on.
346 *
347 * When a PORT DATABASE CHANGED asynchronous event occurs, we mark all VALID
348 * entries as PROBATIONAL. This allows us, if policy says to, just keep track
349 * of devices whose handles change but are otherwise the same device (and
350 * thus keep 'target' constant).
351 *
352 * In any case, we search all possible local loop handles. For each one that
353 * has a port database entity returned, we search for any PROBATIONAL entry
354 * that matches it and update as appropriate. Otherwise, as a new entry, we
355 * find room for it in the Port Database. We *try* and use the handle as the
356 * index to put it into the Database, but that's just an optimization. We mark
357 * the entry VALID and make sure that the target index is updated and correct.
358 *
359 * When we get done searching the local loop, we then search similarily for
360 * a list of devices we've gotten from the fabric name controller (if we're
361 * on a fabric). VALID marking is also done similarily.
362 *
363 * When all of this is done, we can march through the database and clean up
364 * any entry that is still PROBATIONAL (these represent devices which have
365 * departed). Then we're done and can resume normal operations.
366 *
367 * Negative invariants that we try and test for are:
368 *
369 * + There can never be two non-NIL entries with the same { Port, Node } WWN
370 * duples.
371 *
372 * + There can never be two non-NIL entries with the same handle.
373 */
374typedef struct {
375 /*
376 * This is the handle that the firmware needs in order for us to
377 * send commands to the device. For pre-24XX cards, this would be
378 * the 'loopid'.
379 */
380 uint16_t handle;
381
382 /*
383 * A device is 'autologin' if the firmware automatically logs into
384 * it (re-logins as needed). Basically, local private loop devices.
385 *
386 * PRLI word 3 parameters contains role as well as other things.
387 *
388 * The state is the current state of this entry.
389 *
390 * The is_target is the current state of target on this port.
391 *
392 * The is_initiator is the current state of initiator on this port.
393 *
394 * Portid is obvious, as are node && port WWNs. The new_role and
395 * new_portid is for when we are pending a change.
396 */
397 uint16_t prli_word3; /* PRLI parameters */
398 uint16_t new_prli_word3; /* Incoming new PRLI parameters */
399 uint16_t : 11,
400 autologin : 1, /* F/W does PLOGI/PLOGO */
401 probational : 1,
402 state : 3;
403 uint32_t : 6,
404 is_target : 1,
405 is_initiator : 1,
406 portid : 24;
407 uint32_t
408 : 8,
409 new_portid : 24;
410 uint64_t node_wwn;
411 uint64_t port_wwn;
412 uint32_t gone_timer;
413} fcportdb_t;
414
415#define FC_PORTDB_STATE_NIL 0 /* Empty DB slot */
416#define FC_PORTDB_STATE_DEAD 1 /* Was valid, but no more. */
417#define FC_PORTDB_STATE_CHANGED 2 /* Was valid, but changed. */
418#define FC_PORTDB_STATE_NEW 3 /* Logged in, not announced. */
419#define FC_PORTDB_STATE_ZOMBIE 4 /* Invalid, but announced. */
420#define FC_PORTDB_STATE_VALID 5 /* Valid */
421
422#define FC_PORTDB_TGT(isp, bus, pdb) (int)(lp - FCPARAM(isp, bus)->portdb)
423
424/*
425 * FC card specific information
426 *
427 * This structure is replicated across multiple channels for multi-id
428 * capapble chipsets, with some entities different on a per-channel basis.
429 */
430
431typedef struct {
432 int isp_gbspeed; /* Connection speed */
433 int isp_linkstate; /* Link state */
434 int isp_fwstate; /* ISP F/W state */
435 int isp_loopstate; /* Loop State */
436 int isp_topo; /* Connection Type */
437
438 uint32_t : 4,
439 fctape_enabled : 1,
440 sendmarker : 1,
441 role : 2,
442 isp_portid : 24; /* S_ID */
443
444 uint16_t isp_fwoptions;
445 uint16_t isp_xfwoptions;
446 uint16_t isp_zfwoptions;
447 uint16_t isp_loopid; /* hard loop id */
448 uint16_t isp_sns_hdl; /* N-port handle for SNS */
449 uint16_t isp_lasthdl; /* only valid for channel 0 */
450 uint16_t isp_maxalloc;
451 uint16_t isp_fabric_params;
|
452 uint8_t isp_retry_delay;
453 uint8_t isp_retry_count;
454
455 /*
456 * Current active WWNN/WWPN
457 */
458 uint64_t isp_wwnn;
459 uint64_t isp_wwpn;
460
461 /*
462 * NVRAM WWNN/WWPN
463 */
464 uint64_t isp_wwnn_nvram;
465 uint64_t isp_wwpn_nvram;
466
467 /*
468 * Our Port Data Base
469 */
470 fcportdb_t portdb[MAX_FC_TARG];
471
472 /*
473 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
474 */
475 void * isp_scratch;
476 XS_DMA_ADDR_T isp_scdma;
477
478 uint8_t isp_scanscratch[ISP_FC_SCRLEN];
479} fcparam;
480
481#define FW_CONFIG_WAIT 0
482#define FW_WAIT_LINK 1
483#define FW_WAIT_LOGIN 2
484#define FW_READY 3
485#define FW_LOSS_OF_SYNC 4
486#define FW_ERROR 5
487#define FW_REINIT 6
488#define FW_NON_PART 7
489
490#define LOOP_NIL 0
491#define LOOP_HAVE_LINK 1
492#define LOOP_TESTING_LINK 2
493#define LOOP_LTEST_DONE 3
494#define LOOP_SCANNING_LOOP 4
495#define LOOP_LSCAN_DONE 5
496#define LOOP_SCANNING_FABRIC 6
497#define LOOP_FSCAN_DONE 7
498#define LOOP_SYNCING_PDB 8
499#define LOOP_READY 9
500
501#define TOPO_NL_PORT 0
502#define TOPO_FL_PORT 1
503#define TOPO_N_PORT 2
504#define TOPO_F_PORT 3
505#define TOPO_PTP_STUB 4
506
507#define TOPO_IS_FABRIC(x) ((x) == TOPO_FL_PORT || (x) == TOPO_F_PORT)
508
509/*
510 * Soft Structure per host adapter
511 */
512struct ispsoftc {
513 /*
514 * Platform (OS) specific data
515 */
516 struct isposinfo isp_osinfo;
517
518 /*
519 * Pointer to bus specific functions and data
520 */
521 struct ispmdvec * isp_mdvec;
522
523 /*
524 * (Mostly) nonvolatile state. Board specific parameters
525 * may contain some volatile state (e.g., current loop state).
526 */
527
528 void * isp_param; /* type specific */
529 uint64_t isp_fwattr; /* firmware attributes */
530 uint16_t isp_fwrev[3]; /* Loaded F/W revision */
531 uint16_t isp_maxcmds; /* max possible I/O cmds */
532 uint8_t isp_type; /* HBA Chip Type */
533 uint8_t isp_revision; /* HBA Chip H/W Revision */
534 uint16_t isp_nchan; /* number of channels */
535 uint32_t isp_maxluns; /* maximum luns supported */
536
537 uint32_t isp_clock : 8, /* input clock */
538 : 4,
539 isp_port : 1, /* 23XX/24XX only */
540 isp_open : 1, /* opened (ioctl) */
541 isp_bustype : 1, /* SBus or PCI */
542 isp_loaded_fw : 1, /* loaded firmware */
543 isp_dblev : 16; /* debug log mask */
544
545
546 uint32_t isp_confopts; /* config options */
547
548 uint32_t isp_rqstinrp; /* register for REQINP */
549 uint32_t isp_rqstoutrp; /* register for REQOUTP */
550 uint32_t isp_respinrp; /* register for RESINP */
551 uint32_t isp_respoutrp; /* register for RESOUTP */
552
553 /*
554 * Instrumentation
555 */
556 uint64_t isp_intcnt; /* total int count */
557 uint64_t isp_intbogus; /* spurious int count */
558 uint64_t isp_intmboxc; /* mbox completions */
559 uint64_t isp_intoasync; /* other async */
560 uint64_t isp_rsltccmplt; /* CMDs on result q */
561 uint64_t isp_fphccmplt; /* CMDs via fastpost */
562 uint16_t isp_rscchiwater;
563 uint16_t isp_fpcchiwater;
564 NANOTIME_T isp_init_time; /* time were last initialized */
565
566 /*
567 * Volatile state
568 */
569
570 volatile uint32_t : 8,
571 : 2,
572 isp_dead : 1,
573 : 1,
574 isp_mboxbsy : 1, /* mailbox command active */
575 isp_state : 3,
576 isp_nactive : 16; /* how many commands active */
577 volatile mbreg_t isp_curmbx; /* currently active mailbox command */
578 volatile uint32_t isp_reqodx; /* index of last ISP pickup */
579 volatile uint32_t isp_reqidx; /* index of next request */
580 volatile uint32_t isp_residx; /* index of last ISP write */
581 volatile uint32_t isp_resodx; /* index of next result */
582 volatile uint32_t isp_atioodx; /* index of next ATIO */
583 volatile uint32_t isp_obits; /* mailbox command output */
584 volatile uint32_t isp_serno; /* rolling serial number */
585 volatile uint16_t isp_mboxtmp[MAX_MAILBOX];
586 volatile uint16_t isp_lastmbxcmd; /* last mbox command sent */
587 volatile uint16_t isp_mbxwrk0;
588 volatile uint16_t isp_mbxwrk1;
589 volatile uint16_t isp_mbxwrk2;
590 volatile uint16_t isp_mbxwrk8;
591 volatile uint16_t isp_seqno; /* running sequence number */
592 void * isp_mbxworkp;
593
594 /*
595 * Active commands are stored here, indexed by handle functions.
596 */
597 isp_hdl_t *isp_xflist;
598 isp_hdl_t *isp_xffree;
599
600 /*
601 * DMA mapped in area for synchronous IOCB requests.
602 */
603 void * isp_iocb;
604 XS_DMA_ADDR_T isp_iocb_dma;
605
606 /*
607 * request/result queue pointers and DMA handles for them.
608 */
609 void * isp_rquest;
610 void * isp_result;
611 XS_DMA_ADDR_T isp_rquest_dma;
612 XS_DMA_ADDR_T isp_result_dma;
613#ifdef ISP_TARGET_MODE
614 /* for 24XX only */
615 void * isp_atioq;
616 XS_DMA_ADDR_T isp_atioq_dma;
617#endif
618};
619
620#define SDPARAM(isp, chan) (&((sdparam *)(isp)->isp_param)[(chan)])
621#define FCPARAM(isp, chan) (&((fcparam *)(isp)->isp_param)[(chan)])
622
623#define ISP_SET_SENDMARKER(isp, chan, val) \
624 if (IS_FC(isp)) { \
625 FCPARAM(isp, chan)->sendmarker = val; \
626 } else { \
627 SDPARAM(isp, chan)->sendmarker = val; \
628 }
629
630#define ISP_TST_SENDMARKER(isp, chan) \
631 (IS_FC(isp)? \
632 FCPARAM(isp, chan)->sendmarker != 0 : \
633 SDPARAM(isp, chan)->sendmarker != 0)
634
635/*
636 * ISP Driver Run States
637 */
638#define ISP_NILSTATE 0
639#define ISP_CRASHED 1
640#define ISP_RESETSTATE 2
641#define ISP_INITSTATE 3
642#define ISP_RUNSTATE 4
643
644/*
645 * ISP Runtime Configuration Options
646 */
647#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
648#define ISP_CFG_PORT_PREF 0x0e /* Mask for Port Prefs (all FC except 2100) */
649#define ISP_CFG_PORT_DEF 0x00 /* prefer connection type from NVRAM */
650#define ISP_CFG_LPORT_ONLY 0x02 /* insist on {N/F}L-Port connection */
651#define ISP_CFG_NPORT_ONLY 0x04 /* insist on {N/F}-Port connection */
652#define ISP_CFG_LPORT 0x06 /* prefer {N/F}L-Port connection */
653#define ISP_CFG_NPORT 0x08 /* prefer {N/F}-Port connection */
654#define ISP_CFG_1GB 0x10 /* force 1GB connection (23XX only) */
655#define ISP_CFG_2GB 0x20 /* force 2GB connection (23XX only) */
656#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
657#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
658#define ISP_CFG_NOFCTAPE 0x100 /* disable FC-Tape */
659#define ISP_CFG_FCTAPE 0x200 /* enable FC-Tape */
660#define ISP_CFG_OWNFSZ 0x400 /* override NVRAM frame size */
661#define ISP_CFG_OWNLOOPID 0x800 /* override NVRAM loopid */
662#define ISP_CFG_OWNEXCTHROTTLE 0x1000 /* override NVRAM execution throttle */
663#define ISP_CFG_4GB 0x2000 /* force 4GB connection (24XX only) */
664#define ISP_CFG_8GB 0x4000 /* force 8GB connection (25XX only) */
665#define ISP_CFG_16GB 0x8000 /* force 16GB connection (82XX only) */
666
667/*
668 * For each channel, the outer layers should know what role that channel
669 * will take: ISP_ROLE_NONE, ISP_ROLE_INITIATOR, ISP_ROLE_TARGET,
670 * ISP_ROLE_BOTH.
671 *
672 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded,
673 * NVRAM read, and defaults set, but any further initialization (e.g.
674 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done.
675 *
676 * If INITIATOR MODE isn't set, attempts to run commands will be stopped
677 * at isp_start and completed with the equivalent of SELECTION TIMEOUT.
678 *
679 * If TARGET MODE is set, it doesn't mean that the rest of target mode support
680 * needs to be enabled, or will even work. What happens with the 2X00 cards
681 * here is that if you have enabled it with TARGET MODE as part of the ICB
682 * options, but you haven't given the f/w any ram resources for ATIOs or
683 * Immediate Notifies, the f/w just handles what it can and you never see
684 * anything. Basically, it sends a single byte of data (the first byte,
685 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for
686 * INQUIRY, and sends back QUEUE FULL status for any other command.
687 *
688 */
689#define ISP_ROLE_NONE 0x0
690#define ISP_ROLE_TARGET 0x1
691#define ISP_ROLE_INITIATOR 0x2
692#define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)
693#define ISP_ROLE_EITHER ISP_ROLE_BOTH
694#ifndef ISP_DEFAULT_ROLES
695/*
696 * Counterintuitively, we prefer to default to role 'none'
697 * if we are enable target mode support. This gives us the
698 * maximum flexibility as to which port will do what.
699 */
700#ifdef ISP_TARGET_MODE
701#define ISP_DEFAULT_ROLES ISP_ROLE_NONE
702#else
703#define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR
704#endif
705#endif
706
707
708/*
709 * Firmware related defines
710 */
711#define ISP_CODE_ORG 0x1000 /* default f/w code start */
712#define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */
713#define ISP_CODE_ORG_2400 0x100000 /* ..and 2400s */
714#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
715#define ISP_FW_MAJOR(code) ((code >> 24) & 0xff)
716#define ISP_FW_MINOR(code) ((code >> 16) & 0xff)
717#define ISP_FW_MICRO(code) ((code >> 8) & 0xff)
718#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
719#define ISP_FW_MAJORX(xp) (xp[0])
720#define ISP_FW_MINORX(xp) (xp[1])
721#define ISP_FW_MICROX(xp) (xp[2])
722#define ISP_FW_NEWER_THAN(i, major, minor, micro) \
723 (ISP_FW_REVX((i)->isp_fwrev) > ISP_FW_REV(major, minor, micro))
724#define ISP_FW_OLDER_THAN(i, major, minor, micro) \
725 (ISP_FW_REVX((i)->isp_fwrev) < ISP_FW_REV(major, minor, micro))
726
727/*
728 * Bus (implementation) types
729 */
730#define ISP_BT_PCI 0 /* PCI Implementations */
731#define ISP_BT_SBUS 1 /* SBus Implementations */
732
733/*
734 * If we have not otherwise defined SBus support away make sure
735 * it is defined here such that the code is included as default
736 */
737#ifndef ISP_SBUS_SUPPORTED
738#define ISP_SBUS_SUPPORTED 1
739#endif
740
741/*
742 * Chip Types
743 */
744#define ISP_HA_SCSI 0xf
745#define ISP_HA_SCSI_UNKNOWN 0x1
746#define ISP_HA_SCSI_1020 0x2
747#define ISP_HA_SCSI_1020A 0x3
748#define ISP_HA_SCSI_1040 0x4
749#define ISP_HA_SCSI_1040A 0x5
750#define ISP_HA_SCSI_1040B 0x6
751#define ISP_HA_SCSI_1040C 0x7
752#define ISP_HA_SCSI_1240 0x8
753#define ISP_HA_SCSI_1080 0x9
754#define ISP_HA_SCSI_1280 0xa
755#define ISP_HA_SCSI_10160 0xb
756#define ISP_HA_SCSI_12160 0xc
757#define ISP_HA_FC 0xf0
758#define ISP_HA_FC_2100 0x10
759#define ISP_HA_FC_2200 0x20
760#define ISP_HA_FC_2300 0x30
761#define ISP_HA_FC_2312 0x40
762#define ISP_HA_FC_2322 0x50
763#define ISP_HA_FC_2400 0x60
764#define ISP_HA_FC_2500 0x70
765#define ISP_HA_FC_2600 0x80
766
767#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
768#define IS_1020(isp) (isp->isp_type < ISP_HA_SCSI_1240)
769#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
770#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
771#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
772#define IS_10160(isp) (isp->isp_type == ISP_HA_SCSI_10160)
773#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160)
774
775#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp))
776#define IS_1X160(isp) (IS_10160(isp) || IS_12160(isp))
777#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp))
778#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_1X160(isp))
779#define IS_ULTRA3(isp) (IS_1X160(isp))
780
781#define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC)
782#define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100)
783#define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200)
784#define IS_23XX(isp) ((isp)->isp_type >= ISP_HA_FC_2300 && \
785 (isp)->isp_type < ISP_HA_FC_2400)
786#define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300)
787#define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312)
788#define IS_2322(isp) ((isp)->isp_type == ISP_HA_FC_2322)
789#define IS_24XX(isp) ((isp)->isp_type >= ISP_HA_FC_2400)
790#define IS_25XX(isp) ((isp)->isp_type >= ISP_HA_FC_2500)
791#define IS_26XX(isp) ((isp)->isp_type >= ISP_HA_FC_2600)
792
793/*
794 * DMA related macros
795 */
796#define DMA_WD3(x) (((uint16_t)(((uint64_t)x) >> 48)) & 0xffff)
797#define DMA_WD2(x) (((uint16_t)(((uint64_t)x) >> 32)) & 0xffff)
798#define DMA_WD1(x) ((uint16_t)((x) >> 16) & 0xffff)
799#define DMA_WD0(x) ((uint16_t)((x) & 0xffff))
800
801#define DMA_LO32(x) ((uint32_t) (x))
802#define DMA_HI32(x) ((uint32_t)(((uint64_t)x) >> 32))
803
804/*
805 * Core System Function Prototypes
806 */
807
808/*
809 * Reset Hardware. Totally. Assumes that you'll follow this with a call to isp_init.
810 */
811void isp_reset(ispsoftc_t *, int);
812
813/*
814 * Initialize Hardware to known state
815 */
816void isp_init(ispsoftc_t *);
817
818/*
819 * Reset the ISP and call completion for any orphaned commands.
820 */
821int isp_reinit(ispsoftc_t *, int);
822
823/*
824 * Internal Interrupt Service Routine
825 *
826 * The outer layers do the spade work to get the appropriate status register,
827 * semaphore register and first mailbox register (if appropriate). This also
828 * means that most spurious/bogus interrupts not for us can be filtered first.
829 */
830void isp_intr(ispsoftc_t *, uint16_t, uint16_t, uint16_t);
831
832
833/*
834 * Command Entry Point- Platform Dependent layers call into this
835 */
836int isp_start(XS_T *);
837
838/* these values are what isp_start returns */
839#define CMD_COMPLETE 101 /* command completed */
840#define CMD_EAGAIN 102 /* busy- maybe retry later */
841#define CMD_QUEUED 103 /* command has been queued for execution */
842#define CMD_RQLATER 104 /* requeue this command later */
843
844/*
845 * Command Completion Point- Core layers call out from this with completed cmds
846 */
847void isp_done(XS_T *);
848
849/*
850 * Platform Dependent to External to Internal Control Function
851 *
852 * Assumes locks are held on entry. You should note that with many of
853 * these commands locks may be released while this function is called.
854 *
855 * ... ISPCTL_RESET_BUS, int channel);
856 * Reset BUS on this channel
857 * ... ISPCTL_RESET_DEV, int channel, int target);
858 * Reset Device on this channel at this target.
859 * ... ISPCTL_ABORT_CMD, XS_T *xs);
860 * Abort active transaction described by xs.
861 * ... IPCTL_UPDATE_PARAMS);
862 * Update any operating parameters (speed, etc.)
863 * ... ISPCTL_FCLINK_TEST, int channel);
864 * Test FC link status on this channel
865 * ... ISPCTL_SCAN_LOOP, int channel);
866 * Scan local loop on this channel
867 * ... ISPCTL_SCAN_FABRIC, int channel);
868 * Scan fabric on this channel
869 * ... ISPCTL_PDB_SYNC, int channel);
870 * Synchronize port database on this channel
871 * ... ISPCTL_SEND_LIP, int channel);
872 * Send a LIP on this channel
873 * ... ISPCTL_GET_NAMES, int channel, int np, uint64_t *wwnn, uint64_t *wwpn)
874 * Get a WWNN/WWPN for this N-port handle on this channel
875 * ... ISPCTL_RUN_MBOXCMD, mbreg_t *mbp)
876 * Run this mailbox command
877 * ... ISPCTL_GET_PDB, int channel, int nphandle, isp_pdb_t *pdb)
878 * Get PDB on this channel for this N-port handle
879 * ... ISPCTL_PLOGX, isp_plcmd_t *)
880 * Performa a port login/logout
881 * ... ISPCTL_CHANGE_ROLE, int channel, int role);
882 * Change role of specified channel
883 *
884 * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in
885 * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_LOOP, and ISPCTL_SCAN_FABRIC.
886 * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging
887 * and logging out of fabric devices (if one is on a fabric) and then marking
888 * the 'loop state' as being ready to now be used for sending commands to
889 * devices.
890 */
891typedef enum {
892 ISPCTL_RESET_BUS,
893 ISPCTL_RESET_DEV,
894 ISPCTL_ABORT_CMD,
895 ISPCTL_UPDATE_PARAMS,
896 ISPCTL_FCLINK_TEST,
897 ISPCTL_SCAN_FABRIC,
898 ISPCTL_SCAN_LOOP,
899 ISPCTL_PDB_SYNC,
900 ISPCTL_SEND_LIP,
901 ISPCTL_GET_NAMES,
902 ISPCTL_RUN_MBOXCMD,
903 ISPCTL_GET_PDB,
904 ISPCTL_PLOGX,
905 ISPCTL_CHANGE_ROLE
906} ispctl_t;
907int isp_control(ispsoftc_t *, ispctl_t, ...);
908
909/*
910 * Platform Dependent to Internal to External Control Function
911 */
912
913typedef enum {
914 ISPASYNC_NEW_TGT_PARAMS, /* SPI New Target Parameters */
915 ISPASYNC_BUS_RESET, /* All Bus Was Reset */
916 ISPASYNC_LOOP_DOWN, /* FC Loop Down */
917 ISPASYNC_LOOP_UP, /* FC Loop Up */
918 ISPASYNC_LIP, /* FC LIP Received */
919 ISPASYNC_LOOP_RESET, /* FC Loop Reset Received */
920 ISPASYNC_CHANGE_NOTIFY, /* FC Change Notification */
921 ISPASYNC_DEV_ARRIVED, /* FC Device Arrived */
922 ISPASYNC_DEV_CHANGED, /* FC Device Changed */
923 ISPASYNC_DEV_STAYED, /* FC Device Stayed */
924 ISPASYNC_DEV_GONE, /* FC Device Departure */
925 ISPASYNC_TARGET_NOTIFY, /* All target async notification */
926 ISPASYNC_TARGET_NOTIFY_ACK, /* All target notify ack required */
927 ISPASYNC_TARGET_ACTION, /* All target action requested */
928 ISPASYNC_FW_CRASH, /* All Firmware has crashed */
929 ISPASYNC_FW_RESTARTED /* All Firmware has been restarted */
930} ispasync_t;
931void isp_async(ispsoftc_t *, ispasync_t, ...);
932
933#define ISPASYNC_CHANGE_PDB 0
934#define ISPASYNC_CHANGE_SNS 1
935#define ISPASYNC_CHANGE_OTHER 2
936
937/*
938 * Platform Independent Error Prinout
939 */
940void isp_prt_endcmd(ispsoftc_t *, XS_T *);
941
942/*
943 * Platform Dependent Error and Debug Printout
944 *
945 * Two required functions for each platform must be provided:
946 *
947 * void isp_prt(ispsoftc_t *, int level, const char *, ...)
948 * void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...)
949 *
950 * but due to compiler differences on different platforms this won't be
951 * formally defined here. Instead, they go in each platform definition file.
952 */
953
954#define ISP_LOGALL 0x0 /* log always */
955#define ISP_LOGCONFIG 0x1 /* log configuration messages */
956#define ISP_LOGINFO 0x2 /* log informational messages */
957#define ISP_LOGWARN 0x4 /* log warning messages */
958#define ISP_LOGERR 0x8 /* log error messages */
959#define ISP_LOGDEBUG0 0x10 /* log simple debug messages */
960#define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */
961#define ISP_LOGDEBUG2 0x40 /* log most debug messages */
962#define ISP_LOGDEBUG3 0x80 /* log high frequency debug messages */
963#define ISP_LOG_SANCFG 0x100 /* log SAN configuration */
964#define ISP_LOG_CWARN 0x200 /* log SCSI command "warnings" (e.g., check conditions) */
965#define ISP_LOG_WARN1 0x400 /* log WARNS we might be interested at some time */
966#define ISP_LOGTINFO 0x1000 /* log informational messages (target mode) */
967#define ISP_LOGTDEBUG0 0x2000 /* log simple debug messages (target mode) */
968#define ISP_LOGTDEBUG1 0x4000 /* log intermediate debug messages (target) */
969#define ISP_LOGTDEBUG2 0x8000 /* log all debug messages (target) */
970
971/*
972 * Each Platform provides it's own isposinfo substructure of the ispsoftc
973 * defined above.
974 *
975 * Each platform must also provide the following macros/defines:
976 *
977 *
978 * ISP_FC_SCRLEN FC scratch area DMA length
979 *
980 * ISP_MEMZERO(dst, src) platform zeroing function
981 * ISP_MEMCPY(dst, src, count) platform copying function
982 * ISP_SNPRINTF(buf, bufsize, fmt, ...) snprintf
983 * ISP_DELAY(usecs) microsecond spindelay function
984 * ISP_SLEEP(isp, usecs) microsecond sleep function
985 *
986 * ISP_INLINE ___inline or not- depending on how
987 * good your debugger is
988 * ISP_MIN shorthand for ((a) < (b))? (a) : (b)
989 *
990 * NANOTIME_T nanosecond time type
991 *
992 * GET_NANOTIME(NANOTIME_T *) get current nanotime.
993 *
994 * GET_NANOSEC(NANOTIME_T *) get uint64_t from NANOTIME_T
995 *
996 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
997 * subtract two NANOTIME_T values
998 *
999 * MAXISPREQUEST(ispsoftc_t *) maximum request queue size
1000 * for this particular board type
1001 *
1002 * MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size, chan)
1003 *
1004 * Function/Macro the provides memory synchronization on
1005 * various objects so that the ISP's and the system's view
1006 * of the same object is consistent.
1007 *
1008 * MBOX_ACQUIRE(ispsoftc_t *) acquire lock on mailbox regs
1009 * MBOX_WAIT_COMPLETE(ispsoftc_t *, mbreg_t *) wait for cmd to be done
1010 * MBOX_NOTIFY_COMPLETE(ispsoftc_t *) notification of mbox cmd donee
1011 * MBOX_RELEASE(ispsoftc_t *) release lock on mailbox regs
1012 *
1013 * FC_SCRATCH_ACQUIRE(ispsoftc_t *, chan) acquire lock on FC scratch area
1014 * return -1 if you cannot
1015 * FC_SCRATCH_RELEASE(ispsoftc_t *, chan) acquire lock on FC scratch area
1016 *
1017 * FCP_NEXT_CRN(ispsoftc_t *, XS_T *, rslt, channel, target, lun) generate the next command reference number. XS_T * may be null.
1018 *
1019 * SCSI_GOOD SCSI 'Good' Status
1020 * SCSI_CHECK SCSI 'Check Condition' Status
1021 * SCSI_BUSY SCSI 'Busy' Status
1022 * SCSI_QFULL SCSI 'Queue Full' Status
1023 *
1024 * XS_T Platform SCSI transaction type (i.e., command for HBA)
1025 * XS_DMA_ADDR_T Platform PCI DMA Address Type
1026 * XS_GET_DMA_SEG(..) Get 32 bit dma segment list value
1027 * XS_GET_DMA64_SEG(..) Get 64 bit dma segment list value
1028 * XS_ISP(xs) gets an instance out of an XS_T
1029 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) ""
1030 * XS_TGT(xs) gets the target ""
1031 * XS_LUN(xs) gets the lun ""
1032 * XS_CDBP(xs) gets a pointer to the scsi CDB ""
1033 * XS_CDBLEN(xs) gets the CDB's length ""
1034 * XS_XFRLEN(xs) gets the associated data transfer length ""
1035 * XS_TIME(xs) gets the time (in milliseconds) for this command
1036 * XS_GET_RESID(xs) gets the current residual count
1037 * XS_GET_RESID(xs, resid) sets the current residual count
1038 * XS_STSP(xs) gets a pointer to the SCSI status byte ""
1039 * XS_SNSP(xs) gets a pointer to the associate sense data
1040 * XS_TOT_SNSLEN(xs) gets the total length of sense data storage
1041 * XS_CUR_SNSLEN(xs) gets the currently used lenght of sense data storage
1042 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key
1043 * XS_SNSASC(xs) dereferences XS_SNSP to get the current stored Additional Sense Code
1044 * XS_SNSASCQ(xs) dereferences XS_SNSP to get the current stored Additional Sense Code Qualifier
1045 * XS_TAG_P(xs) predicate of whether this command should be tagged
1046 * XS_TAG_TYPE(xs) which type of tag to use
1047 * XS_SETERR(xs) set error state
1048 *
1049 * HBA_NOERROR command has no erros
1050 * HBA_BOTCH hba botched something
1051 * HBA_CMDTIMEOUT command timed out
1052 * HBA_SELTIMEOUT selection timed out (also port logouts for FC)
1053 * HBA_TGTBSY target returned a BUSY status
1054 * HBA_BUSRESET bus reset destroyed command
1055 * HBA_ABORTED command was aborted (by request)
1056 * HBA_DATAOVR a data overrun was detected
1057 * HBA_ARQFAIL Automatic Request Sense failed
1058 *
1059 * XS_ERR(xs) return current error state
1060 * XS_NOERR(xs) there is no error currently set
1061 * XS_INITERR(xs) initialize error state
1062 *
1063 * XS_SAVE_SENSE(xs, sp, total_len, this_len) save sense data (total and current amount)
1064 *
1065 * XS_APPEND_SENSE(xs, sp, len) append more sense data
1066 *
1067 * XS_SENSE_VALID(xs) indicates whether sense is valid
1068 *
1069 * DEFAULT_FRAMESIZE(ispsoftc_t *) Default Frame Size
1070 * DEFAULT_EXEC_THROTTLE(ispsoftc_t *) Default Execution Throttle
1071 *
1072 * DEFAULT_ROLE(ispsoftc_t *, int) Get Default Role for a channel
1073 * DEFAULT_IID(ispsoftc_t *, int) Default SCSI initiator ID
1074 * DEFAULT_LOOPID(ispsoftc_t *, int) Default FC Loop ID
1075 *
1076 * These establish reasonable defaults for each platform.
1077 * These must be available independent of card NVRAM and are
1078 * to be used should NVRAM not be readable.
1079 *
1080 * DEFAULT_NODEWWN(ispsoftc_t *, chan) Default FC Node WWN to use
1081 * DEFAULT_PORTWWN(ispsoftc_t *, chan) Default FC Port WWN to use
1082 *
1083 * These defines are hooks to allow the setting of node and
1084 * port WWNs when NVRAM cannot be read or is to be overriden.
1085 *
1086 * ACTIVE_NODEWWN(ispsoftc_t *, chan) FC Node WWN to use
1087 * ACTIVE_PORTWWN(ispsoftc_t *, chan) FC Port WWN to use
1088 *
1089 * After NVRAM is read, these will be invoked to get the
1090 * node and port WWNs that will actually be used for this
1091 * channel.
1092 *
1093 *
1094 * ISP_IOXPUT_8(ispsoftc_t *, uint8_t srcval, uint8_t *dstptr)
1095 * ISP_IOXPUT_16(ispsoftc_t *, uint16_t srcval, uint16_t *dstptr)
1096 * ISP_IOXPUT_32(ispsoftc_t *, uint32_t srcval, uint32_t *dstptr)
1097 *
1098 * ISP_IOXGET_8(ispsoftc_t *, uint8_t *srcptr, uint8_t dstrval)
1099 * ISP_IOXGET_16(ispsoftc_t *, uint16_t *srcptr, uint16_t dstrval)
1100 * ISP_IOXGET_32(ispsoftc_t *, uint32_t *srcptr, uint32_t dstrval)
1101 *
1102 * ISP_SWIZZLE_NVRAM_WORD(ispsoftc_t *, uint16_t *)
1103 * ISP_SWIZZLE_NVRAM_LONG(ispsoftc_t *, uint32_t *)
1104 * ISP_SWAP16(ispsoftc_t *, uint16_t srcval)
1105 * ISP_SWAP32(ispsoftc_t *, uint32_t srcval)
1106 */
1107
1108#ifdef ISP_TARGET_MODE
1109/*
1110 * The functions below are for the publicly available
1111 * target mode functions that are internal to the Qlogic driver.
1112 */
1113
1114/*
1115 * This function handles new response queue entry appropriate for target mode.
1116 */
1117int isp_target_notify(ispsoftc_t *, void *, uint32_t *);
1118
1119/*
1120 * This function externalizes the ability to acknowledge an Immediate Notify request.
1121 */
1122int isp_notify_ack(ispsoftc_t *, void *);
1123
1124/*
1125 * This function externalized acknowledging (success/fail) an ABTS frame
1126 */
1127int isp_acknak_abts(ispsoftc_t *, void *, int);
1128
1129/*
1130 * General request queue 'put' routine for target mode entries.
1131 */
1132int isp_target_put_entry(ispsoftc_t *isp, void *);
1133
1134/*
1135 * General routine to put back an ATIO entry-
1136 * used for replenishing f/w resource counts.
1137 * The argument is a pointer to a source ATIO
1138 * or ATIO2.
1139 */
1140int isp_target_put_atio(ispsoftc_t *, void *);
1141
1142/*
1143 * General routine to send a final CTIO for a command- used mostly for
1144 * local responses.
1145 */
1146int isp_endcmd(ispsoftc_t *, ...);
1147#define ECMD_SVALID 0x100
1148#define ECMD_TERMINATE 0x200
1149
1150/*
1151 * Handle an asynchronous event
1152 *
1153 * Return nonzero if the interrupt that generated this event has been dismissed.
1154 */
1155int isp_target_async(ispsoftc_t *, int, int);
1156#endif
1157#endif /* _ISPVAR_H */
| 453 uint8_t isp_retry_delay;
454 uint8_t isp_retry_count;
455
456 /*
457 * Current active WWNN/WWPN
458 */
459 uint64_t isp_wwnn;
460 uint64_t isp_wwpn;
461
462 /*
463 * NVRAM WWNN/WWPN
464 */
465 uint64_t isp_wwnn_nvram;
466 uint64_t isp_wwpn_nvram;
467
468 /*
469 * Our Port Data Base
470 */
471 fcportdb_t portdb[MAX_FC_TARG];
472
473 /*
474 * Scratch DMA mapped in area to fetch Port Database stuff, etc.
475 */
476 void * isp_scratch;
477 XS_DMA_ADDR_T isp_scdma;
478
479 uint8_t isp_scanscratch[ISP_FC_SCRLEN];
480} fcparam;
481
482#define FW_CONFIG_WAIT 0
483#define FW_WAIT_LINK 1
484#define FW_WAIT_LOGIN 2
485#define FW_READY 3
486#define FW_LOSS_OF_SYNC 4
487#define FW_ERROR 5
488#define FW_REINIT 6
489#define FW_NON_PART 7
490
491#define LOOP_NIL 0
492#define LOOP_HAVE_LINK 1
493#define LOOP_TESTING_LINK 2
494#define LOOP_LTEST_DONE 3
495#define LOOP_SCANNING_LOOP 4
496#define LOOP_LSCAN_DONE 5
497#define LOOP_SCANNING_FABRIC 6
498#define LOOP_FSCAN_DONE 7
499#define LOOP_SYNCING_PDB 8
500#define LOOP_READY 9
501
502#define TOPO_NL_PORT 0
503#define TOPO_FL_PORT 1
504#define TOPO_N_PORT 2
505#define TOPO_F_PORT 3
506#define TOPO_PTP_STUB 4
507
508#define TOPO_IS_FABRIC(x) ((x) == TOPO_FL_PORT || (x) == TOPO_F_PORT)
509
510/*
511 * Soft Structure per host adapter
512 */
513struct ispsoftc {
514 /*
515 * Platform (OS) specific data
516 */
517 struct isposinfo isp_osinfo;
518
519 /*
520 * Pointer to bus specific functions and data
521 */
522 struct ispmdvec * isp_mdvec;
523
524 /*
525 * (Mostly) nonvolatile state. Board specific parameters
526 * may contain some volatile state (e.g., current loop state).
527 */
528
529 void * isp_param; /* type specific */
530 uint64_t isp_fwattr; /* firmware attributes */
531 uint16_t isp_fwrev[3]; /* Loaded F/W revision */
532 uint16_t isp_maxcmds; /* max possible I/O cmds */
533 uint8_t isp_type; /* HBA Chip Type */
534 uint8_t isp_revision; /* HBA Chip H/W Revision */
535 uint16_t isp_nchan; /* number of channels */
536 uint32_t isp_maxluns; /* maximum luns supported */
537
538 uint32_t isp_clock : 8, /* input clock */
539 : 4,
540 isp_port : 1, /* 23XX/24XX only */
541 isp_open : 1, /* opened (ioctl) */
542 isp_bustype : 1, /* SBus or PCI */
543 isp_loaded_fw : 1, /* loaded firmware */
544 isp_dblev : 16; /* debug log mask */
545
546
547 uint32_t isp_confopts; /* config options */
548
549 uint32_t isp_rqstinrp; /* register for REQINP */
550 uint32_t isp_rqstoutrp; /* register for REQOUTP */
551 uint32_t isp_respinrp; /* register for RESINP */
552 uint32_t isp_respoutrp; /* register for RESOUTP */
553
554 /*
555 * Instrumentation
556 */
557 uint64_t isp_intcnt; /* total int count */
558 uint64_t isp_intbogus; /* spurious int count */
559 uint64_t isp_intmboxc; /* mbox completions */
560 uint64_t isp_intoasync; /* other async */
561 uint64_t isp_rsltccmplt; /* CMDs on result q */
562 uint64_t isp_fphccmplt; /* CMDs via fastpost */
563 uint16_t isp_rscchiwater;
564 uint16_t isp_fpcchiwater;
565 NANOTIME_T isp_init_time; /* time were last initialized */
566
567 /*
568 * Volatile state
569 */
570
571 volatile uint32_t : 8,
572 : 2,
573 isp_dead : 1,
574 : 1,
575 isp_mboxbsy : 1, /* mailbox command active */
576 isp_state : 3,
577 isp_nactive : 16; /* how many commands active */
578 volatile mbreg_t isp_curmbx; /* currently active mailbox command */
579 volatile uint32_t isp_reqodx; /* index of last ISP pickup */
580 volatile uint32_t isp_reqidx; /* index of next request */
581 volatile uint32_t isp_residx; /* index of last ISP write */
582 volatile uint32_t isp_resodx; /* index of next result */
583 volatile uint32_t isp_atioodx; /* index of next ATIO */
584 volatile uint32_t isp_obits; /* mailbox command output */
585 volatile uint32_t isp_serno; /* rolling serial number */
586 volatile uint16_t isp_mboxtmp[MAX_MAILBOX];
587 volatile uint16_t isp_lastmbxcmd; /* last mbox command sent */
588 volatile uint16_t isp_mbxwrk0;
589 volatile uint16_t isp_mbxwrk1;
590 volatile uint16_t isp_mbxwrk2;
591 volatile uint16_t isp_mbxwrk8;
592 volatile uint16_t isp_seqno; /* running sequence number */
593 void * isp_mbxworkp;
594
595 /*
596 * Active commands are stored here, indexed by handle functions.
597 */
598 isp_hdl_t *isp_xflist;
599 isp_hdl_t *isp_xffree;
600
601 /*
602 * DMA mapped in area for synchronous IOCB requests.
603 */
604 void * isp_iocb;
605 XS_DMA_ADDR_T isp_iocb_dma;
606
607 /*
608 * request/result queue pointers and DMA handles for them.
609 */
610 void * isp_rquest;
611 void * isp_result;
612 XS_DMA_ADDR_T isp_rquest_dma;
613 XS_DMA_ADDR_T isp_result_dma;
614#ifdef ISP_TARGET_MODE
615 /* for 24XX only */
616 void * isp_atioq;
617 XS_DMA_ADDR_T isp_atioq_dma;
618#endif
619};
620
621#define SDPARAM(isp, chan) (&((sdparam *)(isp)->isp_param)[(chan)])
622#define FCPARAM(isp, chan) (&((fcparam *)(isp)->isp_param)[(chan)])
623
624#define ISP_SET_SENDMARKER(isp, chan, val) \
625 if (IS_FC(isp)) { \
626 FCPARAM(isp, chan)->sendmarker = val; \
627 } else { \
628 SDPARAM(isp, chan)->sendmarker = val; \
629 }
630
631#define ISP_TST_SENDMARKER(isp, chan) \
632 (IS_FC(isp)? \
633 FCPARAM(isp, chan)->sendmarker != 0 : \
634 SDPARAM(isp, chan)->sendmarker != 0)
635
636/*
637 * ISP Driver Run States
638 */
639#define ISP_NILSTATE 0
640#define ISP_CRASHED 1
641#define ISP_RESETSTATE 2
642#define ISP_INITSTATE 3
643#define ISP_RUNSTATE 4
644
645/*
646 * ISP Runtime Configuration Options
647 */
648#define ISP_CFG_FULL_DUPLEX 0x01 /* Full Duplex (Fibre Channel only) */
649#define ISP_CFG_PORT_PREF 0x0e /* Mask for Port Prefs (all FC except 2100) */
650#define ISP_CFG_PORT_DEF 0x00 /* prefer connection type from NVRAM */
651#define ISP_CFG_LPORT_ONLY 0x02 /* insist on {N/F}L-Port connection */
652#define ISP_CFG_NPORT_ONLY 0x04 /* insist on {N/F}-Port connection */
653#define ISP_CFG_LPORT 0x06 /* prefer {N/F}L-Port connection */
654#define ISP_CFG_NPORT 0x08 /* prefer {N/F}-Port connection */
655#define ISP_CFG_1GB 0x10 /* force 1GB connection (23XX only) */
656#define ISP_CFG_2GB 0x20 /* force 2GB connection (23XX only) */
657#define ISP_CFG_NORELOAD 0x80 /* don't download f/w */
658#define ISP_CFG_NONVRAM 0x40 /* ignore NVRAM */
659#define ISP_CFG_NOFCTAPE 0x100 /* disable FC-Tape */
660#define ISP_CFG_FCTAPE 0x200 /* enable FC-Tape */
661#define ISP_CFG_OWNFSZ 0x400 /* override NVRAM frame size */
662#define ISP_CFG_OWNLOOPID 0x800 /* override NVRAM loopid */
663#define ISP_CFG_OWNEXCTHROTTLE 0x1000 /* override NVRAM execution throttle */
664#define ISP_CFG_4GB 0x2000 /* force 4GB connection (24XX only) */
665#define ISP_CFG_8GB 0x4000 /* force 8GB connection (25XX only) */
666#define ISP_CFG_16GB 0x8000 /* force 16GB connection (82XX only) */
667
668/*
669 * For each channel, the outer layers should know what role that channel
670 * will take: ISP_ROLE_NONE, ISP_ROLE_INITIATOR, ISP_ROLE_TARGET,
671 * ISP_ROLE_BOTH.
672 *
673 * If you set ISP_ROLE_NONE, the cards will be reset, new firmware loaded,
674 * NVRAM read, and defaults set, but any further initialization (e.g.
675 * INITIALIZE CONTROL BLOCK commands for 2X00 cards) won't be done.
676 *
677 * If INITIATOR MODE isn't set, attempts to run commands will be stopped
678 * at isp_start and completed with the equivalent of SELECTION TIMEOUT.
679 *
680 * If TARGET MODE is set, it doesn't mean that the rest of target mode support
681 * needs to be enabled, or will even work. What happens with the 2X00 cards
682 * here is that if you have enabled it with TARGET MODE as part of the ICB
683 * options, but you haven't given the f/w any ram resources for ATIOs or
684 * Immediate Notifies, the f/w just handles what it can and you never see
685 * anything. Basically, it sends a single byte of data (the first byte,
686 * which you can set as part of the INITIALIZE CONTROL BLOCK command) for
687 * INQUIRY, and sends back QUEUE FULL status for any other command.
688 *
689 */
690#define ISP_ROLE_NONE 0x0
691#define ISP_ROLE_TARGET 0x1
692#define ISP_ROLE_INITIATOR 0x2
693#define ISP_ROLE_BOTH (ISP_ROLE_TARGET|ISP_ROLE_INITIATOR)
694#define ISP_ROLE_EITHER ISP_ROLE_BOTH
695#ifndef ISP_DEFAULT_ROLES
696/*
697 * Counterintuitively, we prefer to default to role 'none'
698 * if we are enable target mode support. This gives us the
699 * maximum flexibility as to which port will do what.
700 */
701#ifdef ISP_TARGET_MODE
702#define ISP_DEFAULT_ROLES ISP_ROLE_NONE
703#else
704#define ISP_DEFAULT_ROLES ISP_ROLE_INITIATOR
705#endif
706#endif
707
708
709/*
710 * Firmware related defines
711 */
712#define ISP_CODE_ORG 0x1000 /* default f/w code start */
713#define ISP_CODE_ORG_2300 0x0800 /* ..except for 2300s */
714#define ISP_CODE_ORG_2400 0x100000 /* ..and 2400s */
715#define ISP_FW_REV(maj, min, mic) ((maj << 24) | (min << 16) | mic)
716#define ISP_FW_MAJOR(code) ((code >> 24) & 0xff)
717#define ISP_FW_MINOR(code) ((code >> 16) & 0xff)
718#define ISP_FW_MICRO(code) ((code >> 8) & 0xff)
719#define ISP_FW_REVX(xp) ((xp[0]<<24) | (xp[1] << 16) | xp[2])
720#define ISP_FW_MAJORX(xp) (xp[0])
721#define ISP_FW_MINORX(xp) (xp[1])
722#define ISP_FW_MICROX(xp) (xp[2])
723#define ISP_FW_NEWER_THAN(i, major, minor, micro) \
724 (ISP_FW_REVX((i)->isp_fwrev) > ISP_FW_REV(major, minor, micro))
725#define ISP_FW_OLDER_THAN(i, major, minor, micro) \
726 (ISP_FW_REVX((i)->isp_fwrev) < ISP_FW_REV(major, minor, micro))
727
728/*
729 * Bus (implementation) types
730 */
731#define ISP_BT_PCI 0 /* PCI Implementations */
732#define ISP_BT_SBUS 1 /* SBus Implementations */
733
734/*
735 * If we have not otherwise defined SBus support away make sure
736 * it is defined here such that the code is included as default
737 */
738#ifndef ISP_SBUS_SUPPORTED
739#define ISP_SBUS_SUPPORTED 1
740#endif
741
742/*
743 * Chip Types
744 */
745#define ISP_HA_SCSI 0xf
746#define ISP_HA_SCSI_UNKNOWN 0x1
747#define ISP_HA_SCSI_1020 0x2
748#define ISP_HA_SCSI_1020A 0x3
749#define ISP_HA_SCSI_1040 0x4
750#define ISP_HA_SCSI_1040A 0x5
751#define ISP_HA_SCSI_1040B 0x6
752#define ISP_HA_SCSI_1040C 0x7
753#define ISP_HA_SCSI_1240 0x8
754#define ISP_HA_SCSI_1080 0x9
755#define ISP_HA_SCSI_1280 0xa
756#define ISP_HA_SCSI_10160 0xb
757#define ISP_HA_SCSI_12160 0xc
758#define ISP_HA_FC 0xf0
759#define ISP_HA_FC_2100 0x10
760#define ISP_HA_FC_2200 0x20
761#define ISP_HA_FC_2300 0x30
762#define ISP_HA_FC_2312 0x40
763#define ISP_HA_FC_2322 0x50
764#define ISP_HA_FC_2400 0x60
765#define ISP_HA_FC_2500 0x70
766#define ISP_HA_FC_2600 0x80
767
768#define IS_SCSI(isp) (isp->isp_type & ISP_HA_SCSI)
769#define IS_1020(isp) (isp->isp_type < ISP_HA_SCSI_1240)
770#define IS_1240(isp) (isp->isp_type == ISP_HA_SCSI_1240)
771#define IS_1080(isp) (isp->isp_type == ISP_HA_SCSI_1080)
772#define IS_1280(isp) (isp->isp_type == ISP_HA_SCSI_1280)
773#define IS_10160(isp) (isp->isp_type == ISP_HA_SCSI_10160)
774#define IS_12160(isp) (isp->isp_type == ISP_HA_SCSI_12160)
775
776#define IS_12X0(isp) (IS_1240(isp) || IS_1280(isp))
777#define IS_1X160(isp) (IS_10160(isp) || IS_12160(isp))
778#define IS_DUALBUS(isp) (IS_12X0(isp) || IS_12160(isp))
779#define IS_ULTRA2(isp) (IS_1080(isp) || IS_1280(isp) || IS_1X160(isp))
780#define IS_ULTRA3(isp) (IS_1X160(isp))
781
782#define IS_FC(isp) ((isp)->isp_type & ISP_HA_FC)
783#define IS_2100(isp) ((isp)->isp_type == ISP_HA_FC_2100)
784#define IS_2200(isp) ((isp)->isp_type == ISP_HA_FC_2200)
785#define IS_23XX(isp) ((isp)->isp_type >= ISP_HA_FC_2300 && \
786 (isp)->isp_type < ISP_HA_FC_2400)
787#define IS_2300(isp) ((isp)->isp_type == ISP_HA_FC_2300)
788#define IS_2312(isp) ((isp)->isp_type == ISP_HA_FC_2312)
789#define IS_2322(isp) ((isp)->isp_type == ISP_HA_FC_2322)
790#define IS_24XX(isp) ((isp)->isp_type >= ISP_HA_FC_2400)
791#define IS_25XX(isp) ((isp)->isp_type >= ISP_HA_FC_2500)
792#define IS_26XX(isp) ((isp)->isp_type >= ISP_HA_FC_2600)
793
794/*
795 * DMA related macros
796 */
797#define DMA_WD3(x) (((uint16_t)(((uint64_t)x) >> 48)) & 0xffff)
798#define DMA_WD2(x) (((uint16_t)(((uint64_t)x) >> 32)) & 0xffff)
799#define DMA_WD1(x) ((uint16_t)((x) >> 16) & 0xffff)
800#define DMA_WD0(x) ((uint16_t)((x) & 0xffff))
801
802#define DMA_LO32(x) ((uint32_t) (x))
803#define DMA_HI32(x) ((uint32_t)(((uint64_t)x) >> 32))
804
805/*
806 * Core System Function Prototypes
807 */
808
809/*
810 * Reset Hardware. Totally. Assumes that you'll follow this with a call to isp_init.
811 */
812void isp_reset(ispsoftc_t *, int);
813
814/*
815 * Initialize Hardware to known state
816 */
817void isp_init(ispsoftc_t *);
818
819/*
820 * Reset the ISP and call completion for any orphaned commands.
821 */
822int isp_reinit(ispsoftc_t *, int);
823
824/*
825 * Internal Interrupt Service Routine
826 *
827 * The outer layers do the spade work to get the appropriate status register,
828 * semaphore register and first mailbox register (if appropriate). This also
829 * means that most spurious/bogus interrupts not for us can be filtered first.
830 */
831void isp_intr(ispsoftc_t *, uint16_t, uint16_t, uint16_t);
832
833
834/*
835 * Command Entry Point- Platform Dependent layers call into this
836 */
837int isp_start(XS_T *);
838
839/* these values are what isp_start returns */
840#define CMD_COMPLETE 101 /* command completed */
841#define CMD_EAGAIN 102 /* busy- maybe retry later */
842#define CMD_QUEUED 103 /* command has been queued for execution */
843#define CMD_RQLATER 104 /* requeue this command later */
844
845/*
846 * Command Completion Point- Core layers call out from this with completed cmds
847 */
848void isp_done(XS_T *);
849
850/*
851 * Platform Dependent to External to Internal Control Function
852 *
853 * Assumes locks are held on entry. You should note that with many of
854 * these commands locks may be released while this function is called.
855 *
856 * ... ISPCTL_RESET_BUS, int channel);
857 * Reset BUS on this channel
858 * ... ISPCTL_RESET_DEV, int channel, int target);
859 * Reset Device on this channel at this target.
860 * ... ISPCTL_ABORT_CMD, XS_T *xs);
861 * Abort active transaction described by xs.
862 * ... IPCTL_UPDATE_PARAMS);
863 * Update any operating parameters (speed, etc.)
864 * ... ISPCTL_FCLINK_TEST, int channel);
865 * Test FC link status on this channel
866 * ... ISPCTL_SCAN_LOOP, int channel);
867 * Scan local loop on this channel
868 * ... ISPCTL_SCAN_FABRIC, int channel);
869 * Scan fabric on this channel
870 * ... ISPCTL_PDB_SYNC, int channel);
871 * Synchronize port database on this channel
872 * ... ISPCTL_SEND_LIP, int channel);
873 * Send a LIP on this channel
874 * ... ISPCTL_GET_NAMES, int channel, int np, uint64_t *wwnn, uint64_t *wwpn)
875 * Get a WWNN/WWPN for this N-port handle on this channel
876 * ... ISPCTL_RUN_MBOXCMD, mbreg_t *mbp)
877 * Run this mailbox command
878 * ... ISPCTL_GET_PDB, int channel, int nphandle, isp_pdb_t *pdb)
879 * Get PDB on this channel for this N-port handle
880 * ... ISPCTL_PLOGX, isp_plcmd_t *)
881 * Performa a port login/logout
882 * ... ISPCTL_CHANGE_ROLE, int channel, int role);
883 * Change role of specified channel
884 *
885 * ISPCTL_PDB_SYNC is somewhat misnamed. It actually is the final step, in
886 * order, of ISPCTL_FCLINK_TEST, ISPCTL_SCAN_LOOP, and ISPCTL_SCAN_FABRIC.
887 * The main purpose of ISPCTL_PDB_SYNC is to complete management of logging
888 * and logging out of fabric devices (if one is on a fabric) and then marking
889 * the 'loop state' as being ready to now be used for sending commands to
890 * devices.
891 */
892typedef enum {
893 ISPCTL_RESET_BUS,
894 ISPCTL_RESET_DEV,
895 ISPCTL_ABORT_CMD,
896 ISPCTL_UPDATE_PARAMS,
897 ISPCTL_FCLINK_TEST,
898 ISPCTL_SCAN_FABRIC,
899 ISPCTL_SCAN_LOOP,
900 ISPCTL_PDB_SYNC,
901 ISPCTL_SEND_LIP,
902 ISPCTL_GET_NAMES,
903 ISPCTL_RUN_MBOXCMD,
904 ISPCTL_GET_PDB,
905 ISPCTL_PLOGX,
906 ISPCTL_CHANGE_ROLE
907} ispctl_t;
908int isp_control(ispsoftc_t *, ispctl_t, ...);
909
910/*
911 * Platform Dependent to Internal to External Control Function
912 */
913
914typedef enum {
915 ISPASYNC_NEW_TGT_PARAMS, /* SPI New Target Parameters */
916 ISPASYNC_BUS_RESET, /* All Bus Was Reset */
917 ISPASYNC_LOOP_DOWN, /* FC Loop Down */
918 ISPASYNC_LOOP_UP, /* FC Loop Up */
919 ISPASYNC_LIP, /* FC LIP Received */
920 ISPASYNC_LOOP_RESET, /* FC Loop Reset Received */
921 ISPASYNC_CHANGE_NOTIFY, /* FC Change Notification */
922 ISPASYNC_DEV_ARRIVED, /* FC Device Arrived */
923 ISPASYNC_DEV_CHANGED, /* FC Device Changed */
924 ISPASYNC_DEV_STAYED, /* FC Device Stayed */
925 ISPASYNC_DEV_GONE, /* FC Device Departure */
926 ISPASYNC_TARGET_NOTIFY, /* All target async notification */
927 ISPASYNC_TARGET_NOTIFY_ACK, /* All target notify ack required */
928 ISPASYNC_TARGET_ACTION, /* All target action requested */
929 ISPASYNC_FW_CRASH, /* All Firmware has crashed */
930 ISPASYNC_FW_RESTARTED /* All Firmware has been restarted */
931} ispasync_t;
932void isp_async(ispsoftc_t *, ispasync_t, ...);
933
934#define ISPASYNC_CHANGE_PDB 0
935#define ISPASYNC_CHANGE_SNS 1
936#define ISPASYNC_CHANGE_OTHER 2
937
938/*
939 * Platform Independent Error Prinout
940 */
941void isp_prt_endcmd(ispsoftc_t *, XS_T *);
942
943/*
944 * Platform Dependent Error and Debug Printout
945 *
946 * Two required functions for each platform must be provided:
947 *
948 * void isp_prt(ispsoftc_t *, int level, const char *, ...)
949 * void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...)
950 *
951 * but due to compiler differences on different platforms this won't be
952 * formally defined here. Instead, they go in each platform definition file.
953 */
954
955#define ISP_LOGALL 0x0 /* log always */
956#define ISP_LOGCONFIG 0x1 /* log configuration messages */
957#define ISP_LOGINFO 0x2 /* log informational messages */
958#define ISP_LOGWARN 0x4 /* log warning messages */
959#define ISP_LOGERR 0x8 /* log error messages */
960#define ISP_LOGDEBUG0 0x10 /* log simple debug messages */
961#define ISP_LOGDEBUG1 0x20 /* log intermediate debug messages */
962#define ISP_LOGDEBUG2 0x40 /* log most debug messages */
963#define ISP_LOGDEBUG3 0x80 /* log high frequency debug messages */
964#define ISP_LOG_SANCFG 0x100 /* log SAN configuration */
965#define ISP_LOG_CWARN 0x200 /* log SCSI command "warnings" (e.g., check conditions) */
966#define ISP_LOG_WARN1 0x400 /* log WARNS we might be interested at some time */
967#define ISP_LOGTINFO 0x1000 /* log informational messages (target mode) */
968#define ISP_LOGTDEBUG0 0x2000 /* log simple debug messages (target mode) */
969#define ISP_LOGTDEBUG1 0x4000 /* log intermediate debug messages (target) */
970#define ISP_LOGTDEBUG2 0x8000 /* log all debug messages (target) */
971
972/*
973 * Each Platform provides it's own isposinfo substructure of the ispsoftc
974 * defined above.
975 *
976 * Each platform must also provide the following macros/defines:
977 *
978 *
979 * ISP_FC_SCRLEN FC scratch area DMA length
980 *
981 * ISP_MEMZERO(dst, src) platform zeroing function
982 * ISP_MEMCPY(dst, src, count) platform copying function
983 * ISP_SNPRINTF(buf, bufsize, fmt, ...) snprintf
984 * ISP_DELAY(usecs) microsecond spindelay function
985 * ISP_SLEEP(isp, usecs) microsecond sleep function
986 *
987 * ISP_INLINE ___inline or not- depending on how
988 * good your debugger is
989 * ISP_MIN shorthand for ((a) < (b))? (a) : (b)
990 *
991 * NANOTIME_T nanosecond time type
992 *
993 * GET_NANOTIME(NANOTIME_T *) get current nanotime.
994 *
995 * GET_NANOSEC(NANOTIME_T *) get uint64_t from NANOTIME_T
996 *
997 * NANOTIME_SUB(NANOTIME_T *, NANOTIME_T *)
998 * subtract two NANOTIME_T values
999 *
1000 * MAXISPREQUEST(ispsoftc_t *) maximum request queue size
1001 * for this particular board type
1002 *
1003 * MEMORYBARRIER(ispsoftc_t *, barrier_type, offset, size, chan)
1004 *
1005 * Function/Macro the provides memory synchronization on
1006 * various objects so that the ISP's and the system's view
1007 * of the same object is consistent.
1008 *
1009 * MBOX_ACQUIRE(ispsoftc_t *) acquire lock on mailbox regs
1010 * MBOX_WAIT_COMPLETE(ispsoftc_t *, mbreg_t *) wait for cmd to be done
1011 * MBOX_NOTIFY_COMPLETE(ispsoftc_t *) notification of mbox cmd donee
1012 * MBOX_RELEASE(ispsoftc_t *) release lock on mailbox regs
1013 *
1014 * FC_SCRATCH_ACQUIRE(ispsoftc_t *, chan) acquire lock on FC scratch area
1015 * return -1 if you cannot
1016 * FC_SCRATCH_RELEASE(ispsoftc_t *, chan) acquire lock on FC scratch area
1017 *
1018 * FCP_NEXT_CRN(ispsoftc_t *, XS_T *, rslt, channel, target, lun) generate the next command reference number. XS_T * may be null.
1019 *
1020 * SCSI_GOOD SCSI 'Good' Status
1021 * SCSI_CHECK SCSI 'Check Condition' Status
1022 * SCSI_BUSY SCSI 'Busy' Status
1023 * SCSI_QFULL SCSI 'Queue Full' Status
1024 *
1025 * XS_T Platform SCSI transaction type (i.e., command for HBA)
1026 * XS_DMA_ADDR_T Platform PCI DMA Address Type
1027 * XS_GET_DMA_SEG(..) Get 32 bit dma segment list value
1028 * XS_GET_DMA64_SEG(..) Get 64 bit dma segment list value
1029 * XS_ISP(xs) gets an instance out of an XS_T
1030 * XS_CHANNEL(xs) gets the channel (bus # for DUALBUS cards) ""
1031 * XS_TGT(xs) gets the target ""
1032 * XS_LUN(xs) gets the lun ""
1033 * XS_CDBP(xs) gets a pointer to the scsi CDB ""
1034 * XS_CDBLEN(xs) gets the CDB's length ""
1035 * XS_XFRLEN(xs) gets the associated data transfer length ""
1036 * XS_TIME(xs) gets the time (in milliseconds) for this command
1037 * XS_GET_RESID(xs) gets the current residual count
1038 * XS_GET_RESID(xs, resid) sets the current residual count
1039 * XS_STSP(xs) gets a pointer to the SCSI status byte ""
1040 * XS_SNSP(xs) gets a pointer to the associate sense data
1041 * XS_TOT_SNSLEN(xs) gets the total length of sense data storage
1042 * XS_CUR_SNSLEN(xs) gets the currently used lenght of sense data storage
1043 * XS_SNSKEY(xs) dereferences XS_SNSP to get the current stored Sense Key
1044 * XS_SNSASC(xs) dereferences XS_SNSP to get the current stored Additional Sense Code
1045 * XS_SNSASCQ(xs) dereferences XS_SNSP to get the current stored Additional Sense Code Qualifier
1046 * XS_TAG_P(xs) predicate of whether this command should be tagged
1047 * XS_TAG_TYPE(xs) which type of tag to use
1048 * XS_SETERR(xs) set error state
1049 *
1050 * HBA_NOERROR command has no erros
1051 * HBA_BOTCH hba botched something
1052 * HBA_CMDTIMEOUT command timed out
1053 * HBA_SELTIMEOUT selection timed out (also port logouts for FC)
1054 * HBA_TGTBSY target returned a BUSY status
1055 * HBA_BUSRESET bus reset destroyed command
1056 * HBA_ABORTED command was aborted (by request)
1057 * HBA_DATAOVR a data overrun was detected
1058 * HBA_ARQFAIL Automatic Request Sense failed
1059 *
1060 * XS_ERR(xs) return current error state
1061 * XS_NOERR(xs) there is no error currently set
1062 * XS_INITERR(xs) initialize error state
1063 *
1064 * XS_SAVE_SENSE(xs, sp, total_len, this_len) save sense data (total and current amount)
1065 *
1066 * XS_APPEND_SENSE(xs, sp, len) append more sense data
1067 *
1068 * XS_SENSE_VALID(xs) indicates whether sense is valid
1069 *
1070 * DEFAULT_FRAMESIZE(ispsoftc_t *) Default Frame Size
1071 * DEFAULT_EXEC_THROTTLE(ispsoftc_t *) Default Execution Throttle
1072 *
1073 * DEFAULT_ROLE(ispsoftc_t *, int) Get Default Role for a channel
1074 * DEFAULT_IID(ispsoftc_t *, int) Default SCSI initiator ID
1075 * DEFAULT_LOOPID(ispsoftc_t *, int) Default FC Loop ID
1076 *
1077 * These establish reasonable defaults for each platform.
1078 * These must be available independent of card NVRAM and are
1079 * to be used should NVRAM not be readable.
1080 *
1081 * DEFAULT_NODEWWN(ispsoftc_t *, chan) Default FC Node WWN to use
1082 * DEFAULT_PORTWWN(ispsoftc_t *, chan) Default FC Port WWN to use
1083 *
1084 * These defines are hooks to allow the setting of node and
1085 * port WWNs when NVRAM cannot be read or is to be overriden.
1086 *
1087 * ACTIVE_NODEWWN(ispsoftc_t *, chan) FC Node WWN to use
1088 * ACTIVE_PORTWWN(ispsoftc_t *, chan) FC Port WWN to use
1089 *
1090 * After NVRAM is read, these will be invoked to get the
1091 * node and port WWNs that will actually be used for this
1092 * channel.
1093 *
1094 *
1095 * ISP_IOXPUT_8(ispsoftc_t *, uint8_t srcval, uint8_t *dstptr)
1096 * ISP_IOXPUT_16(ispsoftc_t *, uint16_t srcval, uint16_t *dstptr)
1097 * ISP_IOXPUT_32(ispsoftc_t *, uint32_t srcval, uint32_t *dstptr)
1098 *
1099 * ISP_IOXGET_8(ispsoftc_t *, uint8_t *srcptr, uint8_t dstrval)
1100 * ISP_IOXGET_16(ispsoftc_t *, uint16_t *srcptr, uint16_t dstrval)
1101 * ISP_IOXGET_32(ispsoftc_t *, uint32_t *srcptr, uint32_t dstrval)
1102 *
1103 * ISP_SWIZZLE_NVRAM_WORD(ispsoftc_t *, uint16_t *)
1104 * ISP_SWIZZLE_NVRAM_LONG(ispsoftc_t *, uint32_t *)
1105 * ISP_SWAP16(ispsoftc_t *, uint16_t srcval)
1106 * ISP_SWAP32(ispsoftc_t *, uint32_t srcval)
1107 */
1108
1109#ifdef ISP_TARGET_MODE
1110/*
1111 * The functions below are for the publicly available
1112 * target mode functions that are internal to the Qlogic driver.
1113 */
1114
1115/*
1116 * This function handles new response queue entry appropriate for target mode.
1117 */
1118int isp_target_notify(ispsoftc_t *, void *, uint32_t *);
1119
1120/*
1121 * This function externalizes the ability to acknowledge an Immediate Notify request.
1122 */
1123int isp_notify_ack(ispsoftc_t *, void *);
1124
1125/*
1126 * This function externalized acknowledging (success/fail) an ABTS frame
1127 */
1128int isp_acknak_abts(ispsoftc_t *, void *, int);
1129
1130/*
1131 * General request queue 'put' routine for target mode entries.
1132 */
1133int isp_target_put_entry(ispsoftc_t *isp, void *);
1134
1135/*
1136 * General routine to put back an ATIO entry-
1137 * used for replenishing f/w resource counts.
1138 * The argument is a pointer to a source ATIO
1139 * or ATIO2.
1140 */
1141int isp_target_put_atio(ispsoftc_t *, void *);
1142
1143/*
1144 * General routine to send a final CTIO for a command- used mostly for
1145 * local responses.
1146 */
1147int isp_endcmd(ispsoftc_t *, ...);
1148#define ECMD_SVALID 0x100
1149#define ECMD_TERMINATE 0x200
1150
1151/*
1152 * Handle an asynchronous event
1153 *
1154 * Return nonzero if the interrupt that generated this event has been dismissed.
1155 */
1156int isp_target_async(ispsoftc_t *, int, int);
1157#endif
1158#endif /* _ISPVAR_H */
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