259 260 iqd = 0; 261 sbs->sbus_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 262 RF_ACTIVE | RF_SHAREABLE); 263 if (sbs->sbus_ires == NULL) { 264 device_printf(dev, "could not allocate interrupt\n"); 265 goto bad; 266 } 267 268 tval = 0; 269 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 270 "fwload_disable", &tval) == 0 && tval != 0) { 271 isp->isp_confopts |= ISP_CFG_NORELOAD; 272 } 273 274 isp->isp_osinfo.default_id = -1; 275 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 276 "iid", &tval) == 0) { 277 isp->isp_osinfo.default_id = tval; 278 isp->isp_confopts |= ISP_CFG_OWNLOOPID; 279 } 280 if (isp->isp_osinfo.default_id == -1) { 281 /* 282 * XXX: should be a way to get properties w/o having 283 * XXX: to call OF_xxx functions 284 */ 285 isp->isp_osinfo.default_id = 7; 286 } 287 288 isp_debug = 0; 289 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 290 "debug", &isp_debug); 291 292 /* Make sure the lock is set up. */ 293 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF); 294 locksetup++; 295 296 if (bus_setup_intr(dev, sbs->sbus_ires, ISP_IFLAGS, 297 isp_sbus_intr, isp, &sbs->ih)) { 298 device_printf(dev, "could not setup interrupt\n"); 299 goto bad; 300 } 301 302 /* 303 * Set up logging levels. 304 */ 305 if (isp_debug) { 306 isp->isp_dblev = isp_debug; 307 } else { 308 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 309 } 310 if (bootverbose) 311 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 312 313 /* 314 * Make sure we're in reset state. 315 */ 316 ISP_LOCK(isp); 317 isp_reset(isp); 318 if (isp->isp_state != ISP_RESETSTATE) { 319 ISP_UNLOCK(isp); 320 goto bad; 321 } 322 isp_init(isp); 323 if (isp->isp_role != ISP_ROLE_NONE && isp->isp_state != ISP_INITSTATE) { 324 isp_uninit(isp); 325 ISP_UNLOCK(isp); 326 goto bad; 327 } 328 isp_attach(isp); 329 if (isp->isp_role != ISP_ROLE_NONE && isp->isp_state != ISP_RUNSTATE) { 330 isp_uninit(isp); 331 ISP_UNLOCK(isp); 332 goto bad; 333 } 334 /* 335 * XXXX: Here is where we might unload the f/w module 336 * XXXX: (or decrease the reference count to it). 337 */ 338 ISP_UNLOCK(isp); 339 return (0); 340 341bad: 342 343 if (sbs && sbs->ih) { 344 (void) bus_teardown_intr(dev, sbs->sbus_ires, sbs->ih); 345 } 346 347 if (locksetup && isp) { 348 mtx_destroy(&isp->isp_osinfo.lock); 349 } 350 351 if (sbs && sbs->sbus_ires) { 352 bus_release_resource(dev, SYS_RES_IRQ, iqd, sbs->sbus_ires); 353 } 354 355 356 if (regs) { 357 (void) bus_release_resource(dev, 0, 0, regs); 358 } 359 360 if (sbs) { 361 if (sbs->sbus_isp.isp_param) 362 free(sbs->sbus_isp.isp_param, M_DEVBUF); 363 free(sbs, M_DEVBUF); 364 } 365 366 /* 367 * XXXX: Here is where we might unload the f/w module 368 * XXXX: (or decrease the reference count to it). 369 */ 370 return (ENXIO); 371} 372 373static void 374isp_sbus_intr(void *arg) 375{ 376 ispsoftc_t *isp = arg; 377 uint16_t isr, sema, mbox; 378 379 ISP_LOCK(isp); 380 isp->isp_intcnt++; 381 if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) { 382 isp->isp_intbogus++; 383 } else { 384 int iok = isp->isp_osinfo.intsok; 385 isp->isp_osinfo.intsok = 0; 386 isp_intr(isp, isr, sema, mbox); 387 isp->isp_osinfo.intsok = iok; 388 } 389 ISP_UNLOCK(isp); 390} 391 392#define IspVirt2Off(a, x) \ 393 (((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \ 394 _BLK_REG_SHFT] + ((x) & 0xff)) 395 396#define BXR2(sbc, off) \ 397 bus_space_read_2(sbc->sbus_st, sbc->sbus_sh, off) 398 399static int 400isp_sbus_rd_isr(ispsoftc_t *isp, uint16_t *isrp, 401 uint16_t *semap, uint16_t *mbp) 402{ 403 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 404 uint16_t isr, sema; 405 406 isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR)); 407 sema = BXR2(sbc, IspVirt2Off(isp, BIU_SEMA)); 408 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema); 409 isr &= INT_PENDING_MASK(isp); 410 sema &= BIU_SEMA_LOCK; 411 if (isr == 0 && sema == 0) { 412 return (0); 413 } 414 *isrp = isr; 415 if ((*semap = sema) != 0) { 416 *mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0)); 417 } 418 return (1); 419} 420 421static uint16_t 422isp_sbus_rd_reg(ispsoftc_t *isp, int regoff) 423{ 424 uint16_t rval; 425 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 426 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 427 offset += (regoff & 0xff); 428 rval = bus_space_read_2(sbs->sbus_st, sbs->sbus_sh, offset); 429 isp_prt(isp, ISP_LOGDEBUG3, 430 "isp_sbus_rd_reg(off %x) = %x", regoff, rval); 431 return (rval); 432} 433 434static void 435isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint16_t val) 436{ 437 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 438 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 439 offset += (regoff & 0xff); 440 isp_prt(isp, ISP_LOGDEBUG3, 441 "isp_sbus_wr_reg(off %x) = %x", regoff, val); 442 bus_space_write_2(sbs->sbus_st, sbs->sbus_sh, offset, val); 443} 444 445struct imush { 446 ispsoftc_t *isp; 447 int error; 448}; 449 450static void imc(void *, bus_dma_segment_t *, int, int); 451 452static void 453imc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 454{ 455 struct imush *imushp = (struct imush *) arg; 456 if (error) { 457 imushp->error = error; 458 } else { 459 ispsoftc_t *isp =imushp->isp; 460 bus_addr_t addr = segs->ds_addr; 461 462 isp->isp_rquest_dma = addr; 463 addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 464 isp->isp_result_dma = addr; 465 } 466} 467 468/* 469 * Should be BUS_SPACE_MAXSIZE, but MAXPHYS is larger than BUS_SPACE_MAXSIZE 470 */ 471#define ISP_NSEGS ((MAXPHYS / PAGE_SIZE) + 1) 472 473static int 474isp_sbus_mbxdma(ispsoftc_t *isp) 475{ 476 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 477 caddr_t base; 478 uint32_t len; 479 int i, error, ns; 480 struct imush im; 481 482 /* 483 * Already been here? If so, leave... 484 */ 485 if (isp->isp_rquest) { 486 return (0); 487 } 488 489 ISP_UNLOCK(isp); 490 491 if (bus_dma_tag_create(NULL, 1, BUS_SPACE_MAXADDR_24BIT+1, 492 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR_32BIT, 493 NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, ISP_NSEGS, 494 BUS_SPACE_MAXADDR_24BIT, 0, busdma_lock_mutex, &Giant, 495 &sbs->dmat)) { 496 isp_prt(isp, ISP_LOGERR, "could not create master dma tag"); 497 ISP_LOCK(isp); 498 return(1); 499 } 500 501 len = sizeof (XS_T **) * isp->isp_maxcmds; 502 isp->isp_xflist = (XS_T **) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 503 if (isp->isp_xflist == NULL) { 504 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array"); 505 ISP_LOCK(isp); 506 return (1); 507 } 508 len = sizeof (bus_dmamap_t) * isp->isp_maxcmds; 509 sbs->dmaps = (bus_dmamap_t *) malloc(len, M_DEVBUF, M_WAITOK); 510 if (sbs->dmaps == NULL) { 511 isp_prt(isp, ISP_LOGERR, "can't alloc dma map storage"); 512 free(isp->isp_xflist, M_DEVBUF); 513 ISP_LOCK(isp); 514 return (1); 515 } 516 517 /* 518 * Allocate and map the request, result queues, plus FC scratch area. 519 */ 520 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 521 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 522 523 ns = (len / PAGE_SIZE) + 1; 524 if (bus_dma_tag_create(sbs->dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 525 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR_32BIT, NULL, NULL, 526 len, ns, BUS_SPACE_MAXADDR_24BIT, 0, busdma_lock_mutex, &Giant, 527 &isp->isp_cdmat)) { 528 isp_prt(isp, ISP_LOGERR, 529 "cannot create a dma tag for control spaces"); 530 free(sbs->dmaps, M_DEVBUF); 531 free(isp->isp_xflist, M_DEVBUF); 532 ISP_LOCK(isp); 533 return (1); 534 } 535 536 if (bus_dmamem_alloc(isp->isp_cdmat, (void **)&base, BUS_DMA_NOWAIT, 537 &isp->isp_cdmap) != 0) { 538 isp_prt(isp, ISP_LOGERR, 539 "cannot allocate %d bytes of CCB memory", len); 540 bus_dma_tag_destroy(isp->isp_cdmat); 541 free(isp->isp_xflist, M_DEVBUF); 542 free(sbs->dmaps, M_DEVBUF); 543 ISP_LOCK(isp); 544 return (1); 545 } 546 547 for (i = 0; i < isp->isp_maxcmds; i++) { 548 error = bus_dmamap_create(sbs->dmat, 0, &sbs->dmaps[i]); 549 if (error) { 550 isp_prt(isp, ISP_LOGERR, 551 "error %d creating per-cmd DMA maps", error); 552 while (--i >= 0) { 553 bus_dmamap_destroy(sbs->dmat, sbs->dmaps[i]); 554 } 555 goto bad; 556 } 557 } 558 559 im.isp = isp; 560 im.error = 0; 561 bus_dmamap_load(isp->isp_cdmat, isp->isp_cdmap, base, len, imc, &im, 0); 562 if (im.error) { 563 isp_prt(isp, ISP_LOGERR, 564 "error %d loading dma map for control areas", im.error); 565 goto bad; 566 } 567 568 isp->isp_rquest = base; 569 base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 570 ISP_LOCK(isp); 571 isp->isp_result = base; 572 return (0); 573 574bad: 575 bus_dmamem_free(isp->isp_cdmat, base, isp->isp_cdmap); 576 bus_dma_tag_destroy(isp->isp_cdmat); 577 free(isp->isp_xflist, M_DEVBUF); 578 free(sbs->dmaps, M_DEVBUF); 579 ISP_LOCK(isp); 580 isp->isp_rquest = NULL; 581 return (1); 582} 583 584typedef struct { 585 ispsoftc_t *isp; 586 void *cmd_token; 587 void *rq; 588 uint16_t *nxtip; 589 uint16_t optr; 590 int error; 591} mush_t; 592 593#define MUSHERR_NOQENTRIES -2 594 595 596static void dma2(void *, bus_dma_segment_t *, int, int); 597 598static void 599dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 600{ 601 mush_t *mp; 602 ispsoftc_t *isp; 603 struct ccb_scsiio *csio; 604 struct isp_sbussoftc *sbs; 605 bus_dmamap_t *dp; 606 bus_dma_segment_t *eseg; 607 ispreq_t *rq; 608 int seglim, datalen; 609 uint16_t nxti; 610 611 mp = (mush_t *) arg; 612 if (error) { 613 mp->error = error; 614 return; 615 } 616 617 if (nseg < 1) { 618 isp_prt(mp->isp, ISP_LOGERR, "bad segment count (%d)", nseg); 619 mp->error = EFAULT; 620 return; 621 } 622 csio = mp->cmd_token; 623 isp = mp->isp; 624 rq = mp->rq; 625 sbs = (struct isp_sbussoftc *)mp->isp; 626 dp = &sbs->dmaps[isp_handle_index(rq->req_handle)]; 627 nxti = *mp->nxtip; 628 629 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 630 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_PREREAD); 631 } else { 632 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_PREWRITE); 633 } 634 635 datalen = XS_XFRLEN(csio); 636 637 /* 638 * We're passed an initial partially filled in entry that 639 * has most fields filled in except for data transfer 640 * related values. 641 * 642 * Our job is to fill in the initial request queue entry and 643 * then to start allocating and filling in continuation entries 644 * until we've covered the entire transfer. 645 */ 646 647 if (csio->cdb_len > 12) { 648 seglim = 0; 649 } else { 650 seglim = ISP_RQDSEG; 651 } 652 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 653 rq->req_flags |= REQFLAG_DATA_IN; 654 } else { 655 rq->req_flags |= REQFLAG_DATA_OUT; 656 } 657 658 eseg = dm_segs + nseg; 659 660 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) { 661 rq->req_dataseg[rq->req_seg_count].ds_base = dm_segs->ds_addr; 662 rq->req_dataseg[rq->req_seg_count].ds_count = dm_segs->ds_len; 663 datalen -= dm_segs->ds_len; 664 rq->req_seg_count++; 665 dm_segs++; 666 } 667 668 while (datalen > 0 && dm_segs != eseg) { 669 uint16_t onxti; 670 ispcontreq_t local, *crq = &local, *cqe; 671 672 cqe = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti); 673 onxti = nxti; 674 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp)); 675 if (nxti == mp->optr) { 676 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++"); 677 mp->error = MUSHERR_NOQENTRIES; 678 return; 679 } 680 rq->req_header.rqs_entry_count++; 681 MEMZERO((void *)crq, sizeof (*crq)); 682 crq->req_header.rqs_entry_count = 1; 683 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG; 684 685 seglim = 0; 686 while (datalen > 0 && seglim < ISP_CDSEG && dm_segs != eseg) { 687 crq->req_dataseg[seglim].ds_base = 688 dm_segs->ds_addr; 689 crq->req_dataseg[seglim].ds_count = 690 dm_segs->ds_len; 691 rq->req_seg_count++; 692 dm_segs++; 693 seglim++; 694 datalen -= dm_segs->ds_len; 695 } 696 isp_put_cont_req(isp, crq, cqe); 697 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN); 698 } 699 *mp->nxtip = nxti; 700} 701 702static int 703isp_sbus_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, ispreq_t *rq, 704 uint16_t *nxtip, uint16_t optr) 705{ 706 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 707 ispreq_t *qep; 708 bus_dmamap_t *dp = NULL; 709 mush_t mush, *mp; 710 void (*eptr)(void *, bus_dma_segment_t *, int, int); 711 712 qep = (ispreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, isp->isp_reqidx); 713 eptr = dma2; 714 715 716 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || 717 (csio->dxfer_len == 0)) { 718 rq->req_seg_count = 1; 719 goto mbxsync; 720 } 721 722 /* 723 * Do a virtual grapevine step to collect info for 724 * the callback dma allocation that we have to use... 725 */ 726 mp = &mush; 727 mp->isp = isp; 728 mp->cmd_token = csio; 729 mp->rq = rq; 730 mp->nxtip = nxtip; 731 mp->optr = optr; 732 mp->error = 0; 733 734 if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 735 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) { 736 int error, s; 737 dp = &sbs->dmaps[isp_handle_index(rq->req_handle)]; 738 s = splsoftvm(); 739 error = bus_dmamap_load(sbs->dmat, *dp, 740 csio->data_ptr, csio->dxfer_len, eptr, mp, 0); 741 if (error == EINPROGRESS) { 742 bus_dmamap_unload(sbs->dmat, *dp); 743 mp->error = EINVAL; 744 isp_prt(isp, ISP_LOGERR, 745 "deferred dma allocation not supported"); 746 } else if (error && mp->error == 0) { 747#ifdef DIAGNOSTIC 748 isp_prt(isp, ISP_LOGERR, 749 "error %d in dma mapping code", error); 750#endif 751 mp->error = error; 752 } 753 splx(s); 754 } else { 755 /* Pointer to physical buffer */ 756 struct bus_dma_segment seg; 757 seg.ds_addr = (bus_addr_t)csio->data_ptr; 758 seg.ds_len = csio->dxfer_len; 759 (*eptr)(mp, &seg, 1, 0); 760 } 761 } else { 762 struct bus_dma_segment *segs; 763 764 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) { 765 isp_prt(isp, ISP_LOGERR, 766 "Physical segment pointers unsupported"); 767 mp->error = EINVAL; 768 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) { 769 isp_prt(isp, ISP_LOGERR, 770 "Virtual segment addresses unsupported"); 771 mp->error = EINVAL; 772 } else { 773 /* Just use the segments provided */ 774 segs = (struct bus_dma_segment *) csio->data_ptr; 775 (*eptr)(mp, segs, csio->sglist_cnt, 0); 776 } 777 } 778 if (mp->error) { 779 int retval = CMD_COMPLETE; 780 if (mp->error == MUSHERR_NOQENTRIES) { 781 retval = CMD_EAGAIN; 782 } else if (mp->error == EFBIG) { 783 XS_SETERR(csio, CAM_REQ_TOO_BIG); 784 } else if (mp->error == EINVAL) { 785 XS_SETERR(csio, CAM_REQ_INVALID); 786 } else { 787 XS_SETERR(csio, CAM_UNREC_HBA_ERROR); 788 } 789 return (retval); 790 } 791mbxsync: 792 switch (rq->req_header.rqs_entry_type) { 793 case RQSTYPE_REQUEST: 794 isp_put_request(isp, rq, qep); 795 break; 796 case RQSTYPE_CMDONLY: 797 isp_put_extended_request(isp, (ispextreq_t *)rq, 798 (ispextreq_t *)qep); 799 break; 800 } 801 return (CMD_QUEUED); 802} 803 804static void 805isp_sbus_dmateardown(ispsoftc_t *isp, XS_T *xs, uint16_t handle) 806{ 807 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 808 bus_dmamap_t *dp = &sbs->dmaps[isp_handle_index(handle)]; 809 if ((xs->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 810 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_POSTREAD); 811 } else { 812 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_POSTWRITE); 813 } 814 bus_dmamap_unload(sbs->dmat, *dp); 815} 816 817 818static void 819isp_sbus_reset1(ispsoftc_t *isp) 820{ 821 /* enable interrupts */ 822 ENABLE_INTS(isp); 823} 824 825static void 826isp_sbus_dumpregs(ispsoftc_t *isp, const char *msg) 827{ 828 if (msg) 829 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg); 830 else 831 printf("%s:\n", device_get_nameunit(isp->isp_dev)); 832 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1)); 833 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR), 834 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA)); 835 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR)); 836 837 838 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE); 839 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n", 840 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS), 841 ISP_READ(isp, CDMA_FIFO_STS)); 842 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n", 843 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS), 844 ISP_READ(isp, DDMA_FIFO_STS)); 845 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n", 846 ISP_READ(isp, SXP_INTERRUPT), 847 ISP_READ(isp, SXP_GROSS_ERR), 848 ISP_READ(isp, SXP_PINS_CTRL)); 849 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE); 850 printf(" mbox regs: %x %x %x %x %x\n", 851 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1), 852 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3), 853 ISP_READ(isp, OUTMAILBOX4)); 854}
| 279 280 iqd = 0; 281 sbs->sbus_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, 282 RF_ACTIVE | RF_SHAREABLE); 283 if (sbs->sbus_ires == NULL) { 284 device_printf(dev, "could not allocate interrupt\n"); 285 goto bad; 286 } 287 288 tval = 0; 289 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 290 "fwload_disable", &tval) == 0 && tval != 0) { 291 isp->isp_confopts |= ISP_CFG_NORELOAD; 292 } 293 294 isp->isp_osinfo.default_id = -1; 295 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 296 "iid", &tval) == 0) { 297 isp->isp_osinfo.default_id = tval; 298 isp->isp_confopts |= ISP_CFG_OWNLOOPID; 299 } 300 if (isp->isp_osinfo.default_id == -1) { 301 /* 302 * XXX: should be a way to get properties w/o having 303 * XXX: to call OF_xxx functions 304 */ 305 isp->isp_osinfo.default_id = 7; 306 } 307 308 isp_debug = 0; 309 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 310 "debug", &isp_debug); 311 312 /* Make sure the lock is set up. */ 313 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF); 314 locksetup++; 315 316 if (bus_setup_intr(dev, sbs->sbus_ires, ISP_IFLAGS, 317 isp_sbus_intr, isp, &sbs->ih)) { 318 device_printf(dev, "could not setup interrupt\n"); 319 goto bad; 320 } 321 322 /* 323 * Set up logging levels. 324 */ 325 if (isp_debug) { 326 isp->isp_dblev = isp_debug; 327 } else { 328 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 329 } 330 if (bootverbose) 331 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 332 333 /* 334 * Make sure we're in reset state. 335 */ 336 ISP_LOCK(isp); 337 isp_reset(isp); 338 if (isp->isp_state != ISP_RESETSTATE) { 339 ISP_UNLOCK(isp); 340 goto bad; 341 } 342 isp_init(isp); 343 if (isp->isp_role != ISP_ROLE_NONE && isp->isp_state != ISP_INITSTATE) { 344 isp_uninit(isp); 345 ISP_UNLOCK(isp); 346 goto bad; 347 } 348 isp_attach(isp); 349 if (isp->isp_role != ISP_ROLE_NONE && isp->isp_state != ISP_RUNSTATE) { 350 isp_uninit(isp); 351 ISP_UNLOCK(isp); 352 goto bad; 353 } 354 /* 355 * XXXX: Here is where we might unload the f/w module 356 * XXXX: (or decrease the reference count to it). 357 */ 358 ISP_UNLOCK(isp); 359 return (0); 360 361bad: 362 363 if (sbs && sbs->ih) { 364 (void) bus_teardown_intr(dev, sbs->sbus_ires, sbs->ih); 365 } 366 367 if (locksetup && isp) { 368 mtx_destroy(&isp->isp_osinfo.lock); 369 } 370 371 if (sbs && sbs->sbus_ires) { 372 bus_release_resource(dev, SYS_RES_IRQ, iqd, sbs->sbus_ires); 373 } 374 375 376 if (regs) { 377 (void) bus_release_resource(dev, 0, 0, regs); 378 } 379 380 if (sbs) { 381 if (sbs->sbus_isp.isp_param) 382 free(sbs->sbus_isp.isp_param, M_DEVBUF); 383 free(sbs, M_DEVBUF); 384 } 385 386 /* 387 * XXXX: Here is where we might unload the f/w module 388 * XXXX: (or decrease the reference count to it). 389 */ 390 return (ENXIO); 391} 392 393static void 394isp_sbus_intr(void *arg) 395{ 396 ispsoftc_t *isp = arg; 397 uint16_t isr, sema, mbox; 398 399 ISP_LOCK(isp); 400 isp->isp_intcnt++; 401 if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) { 402 isp->isp_intbogus++; 403 } else { 404 int iok = isp->isp_osinfo.intsok; 405 isp->isp_osinfo.intsok = 0; 406 isp_intr(isp, isr, sema, mbox); 407 isp->isp_osinfo.intsok = iok; 408 } 409 ISP_UNLOCK(isp); 410} 411 412#define IspVirt2Off(a, x) \ 413 (((struct isp_sbussoftc *)a)->sbus_poff[((x) & _BLK_REG_MASK) >> \ 414 _BLK_REG_SHFT] + ((x) & 0xff)) 415 416#define BXR2(sbc, off) \ 417 bus_space_read_2(sbc->sbus_st, sbc->sbus_sh, off) 418 419static int 420isp_sbus_rd_isr(ispsoftc_t *isp, uint16_t *isrp, 421 uint16_t *semap, uint16_t *mbp) 422{ 423 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 424 uint16_t isr, sema; 425 426 isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR)); 427 sema = BXR2(sbc, IspVirt2Off(isp, BIU_SEMA)); 428 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema); 429 isr &= INT_PENDING_MASK(isp); 430 sema &= BIU_SEMA_LOCK; 431 if (isr == 0 && sema == 0) { 432 return (0); 433 } 434 *isrp = isr; 435 if ((*semap = sema) != 0) { 436 *mbp = BXR2(sbc, IspVirt2Off(isp, OUTMAILBOX0)); 437 } 438 return (1); 439} 440 441static uint16_t 442isp_sbus_rd_reg(ispsoftc_t *isp, int regoff) 443{ 444 uint16_t rval; 445 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 446 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 447 offset += (regoff & 0xff); 448 rval = bus_space_read_2(sbs->sbus_st, sbs->sbus_sh, offset); 449 isp_prt(isp, ISP_LOGDEBUG3, 450 "isp_sbus_rd_reg(off %x) = %x", regoff, rval); 451 return (rval); 452} 453 454static void 455isp_sbus_wr_reg(ispsoftc_t *isp, int regoff, uint16_t val) 456{ 457 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *) isp; 458 int offset = sbs->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 459 offset += (regoff & 0xff); 460 isp_prt(isp, ISP_LOGDEBUG3, 461 "isp_sbus_wr_reg(off %x) = %x", regoff, val); 462 bus_space_write_2(sbs->sbus_st, sbs->sbus_sh, offset, val); 463} 464 465struct imush { 466 ispsoftc_t *isp; 467 int error; 468}; 469 470static void imc(void *, bus_dma_segment_t *, int, int); 471 472static void 473imc(void *arg, bus_dma_segment_t *segs, int nseg, int error) 474{ 475 struct imush *imushp = (struct imush *) arg; 476 if (error) { 477 imushp->error = error; 478 } else { 479 ispsoftc_t *isp =imushp->isp; 480 bus_addr_t addr = segs->ds_addr; 481 482 isp->isp_rquest_dma = addr; 483 addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 484 isp->isp_result_dma = addr; 485 } 486} 487 488/* 489 * Should be BUS_SPACE_MAXSIZE, but MAXPHYS is larger than BUS_SPACE_MAXSIZE 490 */ 491#define ISP_NSEGS ((MAXPHYS / PAGE_SIZE) + 1) 492 493static int 494isp_sbus_mbxdma(ispsoftc_t *isp) 495{ 496 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 497 caddr_t base; 498 uint32_t len; 499 int i, error, ns; 500 struct imush im; 501 502 /* 503 * Already been here? If so, leave... 504 */ 505 if (isp->isp_rquest) { 506 return (0); 507 } 508 509 ISP_UNLOCK(isp); 510 511 if (bus_dma_tag_create(NULL, 1, BUS_SPACE_MAXADDR_24BIT+1, 512 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR_32BIT, 513 NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, ISP_NSEGS, 514 BUS_SPACE_MAXADDR_24BIT, 0, busdma_lock_mutex, &Giant, 515 &sbs->dmat)) { 516 isp_prt(isp, ISP_LOGERR, "could not create master dma tag"); 517 ISP_LOCK(isp); 518 return(1); 519 } 520 521 len = sizeof (XS_T **) * isp->isp_maxcmds; 522 isp->isp_xflist = (XS_T **) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO); 523 if (isp->isp_xflist == NULL) { 524 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array"); 525 ISP_LOCK(isp); 526 return (1); 527 } 528 len = sizeof (bus_dmamap_t) * isp->isp_maxcmds; 529 sbs->dmaps = (bus_dmamap_t *) malloc(len, M_DEVBUF, M_WAITOK); 530 if (sbs->dmaps == NULL) { 531 isp_prt(isp, ISP_LOGERR, "can't alloc dma map storage"); 532 free(isp->isp_xflist, M_DEVBUF); 533 ISP_LOCK(isp); 534 return (1); 535 } 536 537 /* 538 * Allocate and map the request, result queues, plus FC scratch area. 539 */ 540 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 541 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 542 543 ns = (len / PAGE_SIZE) + 1; 544 if (bus_dma_tag_create(sbs->dmat, QENTRY_LEN, BUS_SPACE_MAXADDR_24BIT+1, 545 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR_32BIT, NULL, NULL, 546 len, ns, BUS_SPACE_MAXADDR_24BIT, 0, busdma_lock_mutex, &Giant, 547 &isp->isp_cdmat)) { 548 isp_prt(isp, ISP_LOGERR, 549 "cannot create a dma tag for control spaces"); 550 free(sbs->dmaps, M_DEVBUF); 551 free(isp->isp_xflist, M_DEVBUF); 552 ISP_LOCK(isp); 553 return (1); 554 } 555 556 if (bus_dmamem_alloc(isp->isp_cdmat, (void **)&base, BUS_DMA_NOWAIT, 557 &isp->isp_cdmap) != 0) { 558 isp_prt(isp, ISP_LOGERR, 559 "cannot allocate %d bytes of CCB memory", len); 560 bus_dma_tag_destroy(isp->isp_cdmat); 561 free(isp->isp_xflist, M_DEVBUF); 562 free(sbs->dmaps, M_DEVBUF); 563 ISP_LOCK(isp); 564 return (1); 565 } 566 567 for (i = 0; i < isp->isp_maxcmds; i++) { 568 error = bus_dmamap_create(sbs->dmat, 0, &sbs->dmaps[i]); 569 if (error) { 570 isp_prt(isp, ISP_LOGERR, 571 "error %d creating per-cmd DMA maps", error); 572 while (--i >= 0) { 573 bus_dmamap_destroy(sbs->dmat, sbs->dmaps[i]); 574 } 575 goto bad; 576 } 577 } 578 579 im.isp = isp; 580 im.error = 0; 581 bus_dmamap_load(isp->isp_cdmat, isp->isp_cdmap, base, len, imc, &im, 0); 582 if (im.error) { 583 isp_prt(isp, ISP_LOGERR, 584 "error %d loading dma map for control areas", im.error); 585 goto bad; 586 } 587 588 isp->isp_rquest = base; 589 base += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 590 ISP_LOCK(isp); 591 isp->isp_result = base; 592 return (0); 593 594bad: 595 bus_dmamem_free(isp->isp_cdmat, base, isp->isp_cdmap); 596 bus_dma_tag_destroy(isp->isp_cdmat); 597 free(isp->isp_xflist, M_DEVBUF); 598 free(sbs->dmaps, M_DEVBUF); 599 ISP_LOCK(isp); 600 isp->isp_rquest = NULL; 601 return (1); 602} 603 604typedef struct { 605 ispsoftc_t *isp; 606 void *cmd_token; 607 void *rq; 608 uint16_t *nxtip; 609 uint16_t optr; 610 int error; 611} mush_t; 612 613#define MUSHERR_NOQENTRIES -2 614 615 616static void dma2(void *, bus_dma_segment_t *, int, int); 617 618static void 619dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 620{ 621 mush_t *mp; 622 ispsoftc_t *isp; 623 struct ccb_scsiio *csio; 624 struct isp_sbussoftc *sbs; 625 bus_dmamap_t *dp; 626 bus_dma_segment_t *eseg; 627 ispreq_t *rq; 628 int seglim, datalen; 629 uint16_t nxti; 630 631 mp = (mush_t *) arg; 632 if (error) { 633 mp->error = error; 634 return; 635 } 636 637 if (nseg < 1) { 638 isp_prt(mp->isp, ISP_LOGERR, "bad segment count (%d)", nseg); 639 mp->error = EFAULT; 640 return; 641 } 642 csio = mp->cmd_token; 643 isp = mp->isp; 644 rq = mp->rq; 645 sbs = (struct isp_sbussoftc *)mp->isp; 646 dp = &sbs->dmaps[isp_handle_index(rq->req_handle)]; 647 nxti = *mp->nxtip; 648 649 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 650 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_PREREAD); 651 } else { 652 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_PREWRITE); 653 } 654 655 datalen = XS_XFRLEN(csio); 656 657 /* 658 * We're passed an initial partially filled in entry that 659 * has most fields filled in except for data transfer 660 * related values. 661 * 662 * Our job is to fill in the initial request queue entry and 663 * then to start allocating and filling in continuation entries 664 * until we've covered the entire transfer. 665 */ 666 667 if (csio->cdb_len > 12) { 668 seglim = 0; 669 } else { 670 seglim = ISP_RQDSEG; 671 } 672 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 673 rq->req_flags |= REQFLAG_DATA_IN; 674 } else { 675 rq->req_flags |= REQFLAG_DATA_OUT; 676 } 677 678 eseg = dm_segs + nseg; 679 680 while (datalen != 0 && rq->req_seg_count < seglim && dm_segs != eseg) { 681 rq->req_dataseg[rq->req_seg_count].ds_base = dm_segs->ds_addr; 682 rq->req_dataseg[rq->req_seg_count].ds_count = dm_segs->ds_len; 683 datalen -= dm_segs->ds_len; 684 rq->req_seg_count++; 685 dm_segs++; 686 } 687 688 while (datalen > 0 && dm_segs != eseg) { 689 uint16_t onxti; 690 ispcontreq_t local, *crq = &local, *cqe; 691 692 cqe = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, nxti); 693 onxti = nxti; 694 nxti = ISP_NXT_QENTRY(onxti, RQUEST_QUEUE_LEN(isp)); 695 if (nxti == mp->optr) { 696 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++"); 697 mp->error = MUSHERR_NOQENTRIES; 698 return; 699 } 700 rq->req_header.rqs_entry_count++; 701 MEMZERO((void *)crq, sizeof (*crq)); 702 crq->req_header.rqs_entry_count = 1; 703 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG; 704 705 seglim = 0; 706 while (datalen > 0 && seglim < ISP_CDSEG && dm_segs != eseg) { 707 crq->req_dataseg[seglim].ds_base = 708 dm_segs->ds_addr; 709 crq->req_dataseg[seglim].ds_count = 710 dm_segs->ds_len; 711 rq->req_seg_count++; 712 dm_segs++; 713 seglim++; 714 datalen -= dm_segs->ds_len; 715 } 716 isp_put_cont_req(isp, crq, cqe); 717 MEMORYBARRIER(isp, SYNC_REQUEST, onxti, QENTRY_LEN); 718 } 719 *mp->nxtip = nxti; 720} 721 722static int 723isp_sbus_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, ispreq_t *rq, 724 uint16_t *nxtip, uint16_t optr) 725{ 726 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 727 ispreq_t *qep; 728 bus_dmamap_t *dp = NULL; 729 mush_t mush, *mp; 730 void (*eptr)(void *, bus_dma_segment_t *, int, int); 731 732 qep = (ispreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, isp->isp_reqidx); 733 eptr = dma2; 734 735 736 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || 737 (csio->dxfer_len == 0)) { 738 rq->req_seg_count = 1; 739 goto mbxsync; 740 } 741 742 /* 743 * Do a virtual grapevine step to collect info for 744 * the callback dma allocation that we have to use... 745 */ 746 mp = &mush; 747 mp->isp = isp; 748 mp->cmd_token = csio; 749 mp->rq = rq; 750 mp->nxtip = nxtip; 751 mp->optr = optr; 752 mp->error = 0; 753 754 if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) { 755 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) { 756 int error, s; 757 dp = &sbs->dmaps[isp_handle_index(rq->req_handle)]; 758 s = splsoftvm(); 759 error = bus_dmamap_load(sbs->dmat, *dp, 760 csio->data_ptr, csio->dxfer_len, eptr, mp, 0); 761 if (error == EINPROGRESS) { 762 bus_dmamap_unload(sbs->dmat, *dp); 763 mp->error = EINVAL; 764 isp_prt(isp, ISP_LOGERR, 765 "deferred dma allocation not supported"); 766 } else if (error && mp->error == 0) { 767#ifdef DIAGNOSTIC 768 isp_prt(isp, ISP_LOGERR, 769 "error %d in dma mapping code", error); 770#endif 771 mp->error = error; 772 } 773 splx(s); 774 } else { 775 /* Pointer to physical buffer */ 776 struct bus_dma_segment seg; 777 seg.ds_addr = (bus_addr_t)csio->data_ptr; 778 seg.ds_len = csio->dxfer_len; 779 (*eptr)(mp, &seg, 1, 0); 780 } 781 } else { 782 struct bus_dma_segment *segs; 783 784 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) { 785 isp_prt(isp, ISP_LOGERR, 786 "Physical segment pointers unsupported"); 787 mp->error = EINVAL; 788 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) { 789 isp_prt(isp, ISP_LOGERR, 790 "Virtual segment addresses unsupported"); 791 mp->error = EINVAL; 792 } else { 793 /* Just use the segments provided */ 794 segs = (struct bus_dma_segment *) csio->data_ptr; 795 (*eptr)(mp, segs, csio->sglist_cnt, 0); 796 } 797 } 798 if (mp->error) { 799 int retval = CMD_COMPLETE; 800 if (mp->error == MUSHERR_NOQENTRIES) { 801 retval = CMD_EAGAIN; 802 } else if (mp->error == EFBIG) { 803 XS_SETERR(csio, CAM_REQ_TOO_BIG); 804 } else if (mp->error == EINVAL) { 805 XS_SETERR(csio, CAM_REQ_INVALID); 806 } else { 807 XS_SETERR(csio, CAM_UNREC_HBA_ERROR); 808 } 809 return (retval); 810 } 811mbxsync: 812 switch (rq->req_header.rqs_entry_type) { 813 case RQSTYPE_REQUEST: 814 isp_put_request(isp, rq, qep); 815 break; 816 case RQSTYPE_CMDONLY: 817 isp_put_extended_request(isp, (ispextreq_t *)rq, 818 (ispextreq_t *)qep); 819 break; 820 } 821 return (CMD_QUEUED); 822} 823 824static void 825isp_sbus_dmateardown(ispsoftc_t *isp, XS_T *xs, uint16_t handle) 826{ 827 struct isp_sbussoftc *sbs = (struct isp_sbussoftc *)isp; 828 bus_dmamap_t *dp = &sbs->dmaps[isp_handle_index(handle)]; 829 if ((xs->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 830 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_POSTREAD); 831 } else { 832 bus_dmamap_sync(sbs->dmat, *dp, BUS_DMASYNC_POSTWRITE); 833 } 834 bus_dmamap_unload(sbs->dmat, *dp); 835} 836 837 838static void 839isp_sbus_reset1(ispsoftc_t *isp) 840{ 841 /* enable interrupts */ 842 ENABLE_INTS(isp); 843} 844 845static void 846isp_sbus_dumpregs(ispsoftc_t *isp, const char *msg) 847{ 848 if (msg) 849 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg); 850 else 851 printf("%s:\n", device_get_nameunit(isp->isp_dev)); 852 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1)); 853 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR), 854 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA)); 855 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR)); 856 857 858 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE); 859 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n", 860 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS), 861 ISP_READ(isp, CDMA_FIFO_STS)); 862 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n", 863 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS), 864 ISP_READ(isp, DDMA_FIFO_STS)); 865 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n", 866 ISP_READ(isp, SXP_INTERRUPT), 867 ISP_READ(isp, SXP_GROSS_ERR), 868 ISP_READ(isp, SXP_PINS_CTRL)); 869 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE); 870 printf(" mbox regs: %x %x %x %x %x\n", 871 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1), 872 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3), 873 ISP_READ(isp, OUTMAILBOX4)); 874}
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