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hyperv.c (256071) hyperv.c (256276)
1/*-
2 * Copyright (c) 2009-2012 Microsoft Corp.
3 * Copyright (c) 2012 NetApp Inc.
4 * Copyright (c) 2012 Citrix Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/**
30 * Implements low-level interactions with Hypver-V/Azure
31 */
32#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2009-2012 Microsoft Corp.
3 * Copyright (c) 2012 NetApp Inc.
4 * Copyright (c) 2012 Citrix Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/**
30 * Implements low-level interactions with Hypver-V/Azure
31 */
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hv_hv.c 256071 2013-10-05 19:51:09Z gibbs $");
33__FBSDID("$FreeBSD: head/sys/dev/hyperv/vmbus/hv_hv.c 256276 2013-10-10 16:25:53Z dim $");
34
35#include <sys/param.h>
36#include <sys/malloc.h>
37#include <sys/pcpu.h>
38#include <sys/timetc.h>
39#include <machine/bus.h>
40#include <vm/vm.h>
41#include <vm/vm_param.h>

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235 */
236 hypercall_msr.as_uint64_t = rdmsr(HV_X64_MSR_HYPERCALL);
237 virt_addr = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT | M_ZERO);
238 KASSERT(virt_addr != NULL,
239 ("Error VMBUS: malloc failed to allocate page during init!"));
240 if (virt_addr == NULL)
241 goto cleanup;
242
34
35#include <sys/param.h>
36#include <sys/malloc.h>
37#include <sys/pcpu.h>
38#include <sys/timetc.h>
39#include <machine/bus.h>
40#include <vm/vm.h>
41#include <vm/vm_param.h>

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235 */
236 hypercall_msr.as_uint64_t = rdmsr(HV_X64_MSR_HYPERCALL);
237 virt_addr = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT | M_ZERO);
238 KASSERT(virt_addr != NULL,
239 ("Error VMBUS: malloc failed to allocate page during init!"));
240 if (virt_addr == NULL)
241 goto cleanup;
242
243 hypercall_msr.enable = 1;
244 hypercall_msr.guest_physical_address =
243 hypercall_msr.u.enable = 1;
244 hypercall_msr.u.guest_physical_address =
245 (hv_get_phys_addr(virt_addr) >> PAGE_SHIFT);
246 wrmsr(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64_t);
247
248 /*
249 * Confirm that hypercall page did get set up
250 */
251 hypercall_msr.as_uint64_t = 0;
252 hypercall_msr.as_uint64_t = rdmsr(HV_X64_MSR_HYPERCALL);
253
245 (hv_get_phys_addr(virt_addr) >> PAGE_SHIFT);
246 wrmsr(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64_t);
247
248 /*
249 * Confirm that hypercall page did get set up
250 */
251 hypercall_msr.as_uint64_t = 0;
252 hypercall_msr.as_uint64_t = rdmsr(HV_X64_MSR_HYPERCALL);
253
254 if (!hypercall_msr.enable)
254 if (!hypercall_msr.u.enable)
255 goto cleanup;
256
257 hv_vmbus_g_context.hypercall_page = virt_addr;
258
259 /*
260 * Setup the global signal event param for the signal event hypercall
261 */
262 hv_vmbus_g_context.signal_event_buffer =

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279 hv_vmbus_g_context.signal_event_param->rsvd_z = 0;
280
281 tc_init(&hv_timecounter); /* register virtual timecount */
282
283 return (0);
284
285 cleanup:
286 if (virt_addr != NULL) {
255 goto cleanup;
256
257 hv_vmbus_g_context.hypercall_page = virt_addr;
258
259 /*
260 * Setup the global signal event param for the signal event hypercall
261 */
262 hv_vmbus_g_context.signal_event_buffer =

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279 hv_vmbus_g_context.signal_event_param->rsvd_z = 0;
280
281 tc_init(&hv_timecounter); /* register virtual timecount */
282
283 return (0);
284
285 cleanup:
286 if (virt_addr != NULL) {
287 if (hypercall_msr.enable) {
287 if (hypercall_msr.u.enable) {
288 hypercall_msr.as_uint64_t = 0;
289 wrmsr(HV_X64_MSR_HYPERCALL,
290 hypercall_msr.as_uint64_t);
291 }
292
293 free(virt_addr, M_DEVBUF);
294 }
295 return (ENOTSUP);

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421 hv_vmbus_g_context.syn_ic_msg_page[cpu] = setup_args->page_buffers[0];
422 hv_vmbus_g_context.syn_ic_event_page[cpu] = setup_args->page_buffers[1];
423
424 /*
425 * Setup the Synic's message page
426 */
427
428 simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);
288 hypercall_msr.as_uint64_t = 0;
289 wrmsr(HV_X64_MSR_HYPERCALL,
290 hypercall_msr.as_uint64_t);
291 }
292
293 free(virt_addr, M_DEVBUF);
294 }
295 return (ENOTSUP);

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421 hv_vmbus_g_context.syn_ic_msg_page[cpu] = setup_args->page_buffers[0];
422 hv_vmbus_g_context.syn_ic_event_page[cpu] = setup_args->page_buffers[1];
423
424 /*
425 * Setup the Synic's message page
426 */
427
428 simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);
429 simp.simp_enabled = 1;
430 simp.base_simp_gpa = ((hv_get_phys_addr(
429 simp.u.simp_enabled = 1;
430 simp.u.base_simp_gpa = ((hv_get_phys_addr(
431 hv_vmbus_g_context.syn_ic_msg_page[cpu])) >> PAGE_SHIFT);
432
433 wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);
434
435 /*
436 * Setup the Synic's event page
437 */
438 siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);
431 hv_vmbus_g_context.syn_ic_msg_page[cpu])) >> PAGE_SHIFT);
432
433 wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);
434
435 /*
436 * Setup the Synic's event page
437 */
438 siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);
439 siefp.siefp_enabled = 1;
440 siefp.base_siefp_gpa = ((hv_get_phys_addr(
439 siefp.u.siefp_enabled = 1;
440 siefp.u.base_siefp_gpa = ((hv_get_phys_addr(
441 hv_vmbus_g_context.syn_ic_event_page[cpu])) >> PAGE_SHIFT);
442
443 wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);
444
445 /*HV_SHARED_SINT_IDT_VECTOR + 0x20; */
441 hv_vmbus_g_context.syn_ic_event_page[cpu])) >> PAGE_SHIFT);
442
443 wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);
444
445 /*HV_SHARED_SINT_IDT_VECTOR + 0x20; */
446 shared_sint.vector = setup_args->vector;
447 shared_sint.masked = FALSE;
448 shared_sint.auto_eoi = FALSE;
446 shared_sint.u.vector = setup_args->vector;
447 shared_sint.u.masked = FALSE;
448 shared_sint.u.auto_eoi = FALSE;
449
450 wrmsr(HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
451 shared_sint.as_uint64_t);
452
453 /* Enable the global synic bit */
454 sctrl.as_uint64_t = rdmsr(HV_X64_MSR_SCONTROL);
449
450 wrmsr(HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
451 shared_sint.as_uint64_t);
452
453 /* Enable the global synic bit */
454 sctrl.as_uint64_t = rdmsr(HV_X64_MSR_SCONTROL);
455 sctrl.enable = 1;
455 sctrl.u.enable = 1;
456
457 wrmsr(HV_X64_MSR_SCONTROL, sctrl.as_uint64_t);
458
459 hv_vmbus_g_context.syn_ic_initialized = TRUE;
460
461 return;
462}
463

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475 return;
476
477 if (cpu != 0)
478 return; /* TODO: XXXKYS: SMP? */
479
480 shared_sint.as_uint64_t = rdmsr(
481 HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT);
482
456
457 wrmsr(HV_X64_MSR_SCONTROL, sctrl.as_uint64_t);
458
459 hv_vmbus_g_context.syn_ic_initialized = TRUE;
460
461 return;
462}
463

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475 return;
476
477 if (cpu != 0)
478 return; /* TODO: XXXKYS: SMP? */
479
480 shared_sint.as_uint64_t = rdmsr(
481 HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT);
482
483 shared_sint.masked = 1;
483 shared_sint.u.masked = 1;
484
485 /*
486 * Disable the interrupt
487 */
488 wrmsr(
489 HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
490 shared_sint.as_uint64_t);
491
492 simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);
484
485 /*
486 * Disable the interrupt
487 */
488 wrmsr(
489 HV_X64_MSR_SINT0 + HV_VMBUS_MESSAGE_SINT,
490 shared_sint.as_uint64_t);
491
492 simp.as_uint64_t = rdmsr(HV_X64_MSR_SIMP);
493 simp.simp_enabled = 0;
494 simp.base_simp_gpa = 0;
493 simp.u.simp_enabled = 0;
494 simp.u.base_simp_gpa = 0;
495
496 wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);
497
498 siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);
495
496 wrmsr(HV_X64_MSR_SIMP, simp.as_uint64_t);
497
498 siefp.as_uint64_t = rdmsr(HV_X64_MSR_SIEFP);
499 siefp.siefp_enabled = 0;
500 siefp.base_siefp_gpa = 0;
499 siefp.u.siefp_enabled = 0;
500 siefp.u.base_siefp_gpa = 0;
501
502 wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);
503}
504
501
502 wrmsr(HV_X64_MSR_SIEFP, siefp.as_uint64_t);
503}
504