| if_gemvar.h (93045) | if_gemvar.h (99726) |
|---|---|
| 1/* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * from: NetBSD: gemvar.h,v 1.5 2001/10/18 15:19:22 thorpej Exp | 26 * from: NetBSD: gemvar.h,v 1.8 2002/05/15 02:36:12 matt Exp |
| 27 * | 27 * |
| 28 * $FreeBSD: head/sys/dev/gem/if_gemvar.h 93045 2002-03-23 19:43:15Z tmm $ | 28 * $FreeBSD: head/sys/dev/gem/if_gemvar.h 99726 2002-07-10 10:24:23Z benno $ |
| 29 */ 30 31#ifndef _IF_GEMVAR_H 32#define _IF_GEMVAR_H 33 34 35#include <sys/queue.h> 36#include <sys/callout.h> --- 15 unchanged lines hidden (view full) --- 52#define GEM_NEXTTX(x) ((x + 1) & GEM_NTXDESC_MASK) 53 54/* 55 * Receive descriptor list size. We have one Rx buffer per incoming 56 * packet, so this logic is a little simpler. 57 */ 58#define GEM_NRXDESC 128 59#define GEM_NRXDESC_MASK (GEM_NRXDESC - 1) | 29 */ 30 31#ifndef _IF_GEMVAR_H 32#define _IF_GEMVAR_H 33 34 35#include <sys/queue.h> 36#include <sys/callout.h> --- 15 unchanged lines hidden (view full) --- 52#define GEM_NEXTTX(x) ((x + 1) & GEM_NTXDESC_MASK) 53 54/* 55 * Receive descriptor list size. We have one Rx buffer per incoming 56 * packet, so this logic is a little simpler. 57 */ 58#define GEM_NRXDESC 128 59#define GEM_NRXDESC_MASK (GEM_NRXDESC - 1) |
| 60#define GEM_PREVRX(x) ((x - 1) & GEM_NRXDESC_MASK) |
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| 60#define GEM_NEXTRX(x) ((x + 1) & GEM_NRXDESC_MASK) 61 62/* 63 * How many ticks to wait until to retry on a RX descriptor that is still owned 64 * by the hardware. 65 */ 66#define GEM_RXOWN_TICKS (hz / 50) 67 --- 80 unchanged lines hidden (view full) --- 148 bus_dmamap_t sc_dmamap; /* bus dma handle */ 149 bus_space_handle_t sc_h; /* bus space handle for all regs */ 150 151 int sc_phys[2]; /* MII instance -> PHY map */ 152 153 int sc_mif_config; /* Selected MII reg setting */ 154 155 int sc_pci; /* XXXXX -- PCI buses are LE. */ | 61#define GEM_NEXTRX(x) ((x + 1) & GEM_NRXDESC_MASK) 62 63/* 64 * How many ticks to wait until to retry on a RX descriptor that is still owned 65 * by the hardware. 66 */ 67#define GEM_RXOWN_TICKS (hz / 50) 68 --- 80 unchanged lines hidden (view full) --- 149 bus_dmamap_t sc_dmamap; /* bus dma handle */ 150 bus_space_handle_t sc_h; /* bus space handle for all regs */ 151 152 int sc_phys[2]; /* MII instance -> PHY map */ 153 154 int sc_mif_config; /* Selected MII reg setting */ 155 156 int sc_pci; /* XXXXX -- PCI buses are LE. */ |
| 157 u_int sc_variant; /* which GEM are we dealing with? */ 158#define GEM_UNKNOWN 0 /* don't know */ 159#define GEM_SUN_GEM 1 /* Sun GEM variant */ 160#define GEM_APPLE_GMAC 2 /* Apple GMAC variant */ |
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| 156 | 161 |
| 162 u_int sc_flags; /* */ 163#define GEM_GIGABIT 0x0001 /* has a gigabit PHY */ 164 |
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| 157 /* 158 * Ring buffer DMA stuff. 159 */ 160 bus_dma_segment_t sc_cdseg; /* control data memory */ 161 int sc_cdnseg; /* number of segments */ 162 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 163 bus_addr_t sc_cddma; 164 --- 7 unchanged lines hidden (view full) --- 172 * Control data structures. 173 */ 174 struct gem_control_data *sc_control_data; 175#define sc_txdescs sc_control_data->gcd_txdescs 176#define sc_rxdescs sc_control_data->gcd_rxdescs 177 178 int sc_txfree; /* number of free Tx descriptors */ 179 int sc_txnext; /* next ready Tx descriptor */ | 165 /* 166 * Ring buffer DMA stuff. 167 */ 168 bus_dma_segment_t sc_cdseg; /* control data memory */ 169 int sc_cdnseg; /* number of segments */ 170 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 171 bus_addr_t sc_cddma; 172 --- 7 unchanged lines hidden (view full) --- 180 * Control data structures. 181 */ 182 struct gem_control_data *sc_control_data; 183#define sc_txdescs sc_control_data->gcd_txdescs 184#define sc_rxdescs sc_control_data->gcd_rxdescs 185 186 int sc_txfree; /* number of free Tx descriptors */ 187 int sc_txnext; /* next ready Tx descriptor */ |
| 188 int sc_txwin; /* Tx descriptors since last Tx int */ |
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| 180 181 struct gem_txsq sc_txfreeq; /* free Tx descsofts */ 182 struct gem_txsq sc_txdirtyq; /* dirty Tx descsofts */ 183 184 int sc_rxptr; /* next ready RX descriptor/descsoft */ | 189 190 struct gem_txsq sc_txfreeq; /* free Tx descsofts */ 191 struct gem_txsq sc_txdirtyq; /* dirty Tx descsofts */ 192 193 int sc_rxptr; /* next ready RX descriptor/descsoft */ |
| 194 int sc_rxfifosize; /* Rx FIFO size (bytes) */ |
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| 185 186 /* ========== */ 187 int sc_inited; 188 int sc_debug; | 195 196 /* ========== */ 197 int sc_inited; 198 int sc_debug; |
| 189 int sc_flags; | 199 int sc_ifflags; |
| 190 191 /* Special hardware hooks */ 192 void (*sc_hwreset)(struct gem_softc *); 193 void (*sc_hwinit)(struct gem_softc *); 194}; 195 196#define GEM_DMA_READ(sc, v) (((sc)->sc_pci) ? le64toh(v) : be64toh(v)) 197#define GEM_DMA_WRITE(sc, v) (((sc)->sc_pci) ? htole64(v) : htobe64(v)) --- 52 unchanged lines hidden --- | 200 201 /* Special hardware hooks */ 202 void (*sc_hwreset)(struct gem_softc *); 203 void (*sc_hwinit)(struct gem_softc *); 204}; 205 206#define GEM_DMA_READ(sc, v) (((sc)->sc_pci) ? le64toh(v) : be64toh(v)) 207#define GEM_DMA_WRITE(sc, v) (((sc)->sc_pci) ? htole64(v) : htobe64(v)) --- 52 unchanged lines hidden --- |