1/*
2 * Copyright (C) 2001 Eduardo Horvath.
3 * All rights reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
28 *
29 */
30
31#include <sys/cdefs.h>
| 1/*
2 * Copyright (C) 2001 Eduardo Horvath.
3 * All rights reserved.
4 *
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
28 *
29 */
30
31#include <sys/cdefs.h>
|
56#include <machine/ofw_machdep.h>
57
58#include <sys/rman.h>
59
60#include <dev/mii/mii.h>
61#include <dev/mii/miivar.h>
62
63#include <dev/gem/if_gemreg.h>
64#include <dev/gem/if_gemvar.h>
65
66#include <dev/pci/pcivar.h>
67#include <dev/pci/pcireg.h>
68
69#include "miibus_if.h"
70
71struct gem_pci_softc {
72 struct gem_softc gsc_gem; /* GEM device */
73 struct resource *gsc_sres;
74 int gsc_srid;
75 struct resource *gsc_ires;
76 int gsc_irid;
77 void *gsc_ih;
78};
79
80static int gem_pci_probe(device_t);
81static int gem_pci_attach(device_t);
82static int gem_pci_detach(device_t);
83static int gem_pci_suspend(device_t);
84static int gem_pci_resume(device_t);
85
86static device_method_t gem_pci_methods[] = {
87 /* Device interface */
88 DEVMETHOD(device_probe, gem_pci_probe),
89 DEVMETHOD(device_attach, gem_pci_attach),
90 DEVMETHOD(device_detach, gem_pci_detach),
91 DEVMETHOD(device_suspend, gem_pci_suspend),
92 DEVMETHOD(device_resume, gem_pci_resume),
93 /* Use the suspend handler here, it is all that is required. */
94 DEVMETHOD(device_shutdown, gem_pci_suspend),
95
96 /* bus interface */
97 DEVMETHOD(bus_print_child, bus_generic_print_child),
98 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
99
100 /* MII interface */
101 DEVMETHOD(miibus_readreg, gem_mii_readreg),
102 DEVMETHOD(miibus_writereg, gem_mii_writereg),
103 DEVMETHOD(miibus_statchg, gem_mii_statchg),
104
105 { 0, 0 }
106};
107
108static driver_t gem_pci_driver = {
109 "gem",
110 gem_pci_methods,
111 sizeof(struct gem_pci_softc)
112};
113
114
115DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
116MODULE_DEPEND(gem, pci, 1, 1, 1);
117MODULE_DEPEND(gem, ether, 1, 1, 1);
118
119struct gem_pci_dev {
120 u_int32_t gpd_devid;
121 int gpd_variant;
122 char *gpd_desc;
123} gem_pci_devlist[] = {
124 { 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" },
125 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" },
126 { 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" },
127 { 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" },
128 { 0, NULL }
129};
130
131/*
132 * Attach routines need to be split out to different bus-specific files.
133 */
134static int
135gem_pci_probe(dev)
136 device_t dev;
137{
138 int i;
139 u_int32_t devid;
140 struct gem_pci_softc *gsc;
141
142 devid = pci_get_devid(dev);
143 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
144 if (devid == gem_pci_devlist[i].gpd_devid) {
145 device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
146 gsc = device_get_softc(dev);
147 gsc->gsc_gem.sc_variant =
148 gem_pci_devlist[i].gpd_variant;
149 return (0);
150 }
151 }
152
153 return (ENXIO);
154}
155
156static int
157gem_pci_attach(dev)
158 device_t dev;
159{
160 struct gem_pci_softc *gsc = device_get_softc(dev);
161 struct gem_softc *sc = &gsc->gsc_gem;
162
163 pci_enable_busmaster(dev);
164
165 /*
166 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
167 * although it should be 1. correct that.
168 */
169 if (pci_get_intpin(dev) == 0)
170 pci_set_intpin(dev, 1);
171
172 sc->sc_dev = dev;
173 sc->sc_pci = 1; /* XXX */
174
175 gsc->gsc_srid = PCI_GEM_BASEADDR;
176 gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid,
177 0, ~0, 1, RF_ACTIVE);
178 if (gsc->gsc_sres == NULL) {
179 device_printf(dev, "failed to allocate bus space resource\n");
180 return (ENXIO);
181 }
182
183 gsc->gsc_irid = 0;
184 gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0,
185 ~0, 1, RF_SHAREABLE | RF_ACTIVE);
186 if (gsc->gsc_ires == NULL) {
187 device_printf(dev, "failed to allocate interrupt resource\n");
188 goto fail_sres;
189 }
190
191 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
192 sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
193
194 /* All platform that this driver is used on must provide this. */
195 OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr);
196
197 /*
198 * call the main configure
199 */
200 if (gem_attach(sc) != 0) {
201 device_printf(dev, "could not be configured\n");
202 goto fail_ires;
203 }
204
205 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc,
206 &gsc->gsc_ih) != 0) {
207 device_printf(dev, "failed to set up interrupt\n");
208 gem_detach(sc);
209 goto fail_ires;
210 }
211 return (0);
212
213fail_ires:
214 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
215fail_sres:
216 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
217 return (ENXIO);
218}
219
220static int
221gem_pci_detach(dev)
222 device_t dev;
223{
224 struct gem_pci_softc *gsc = device_get_softc(dev);
225 struct gem_softc *sc = &gsc->gsc_gem;
226
227 gem_detach(sc);
228
229 bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih);
230 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
231 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
232 return (0);
233}
234
235static int
236gem_pci_suspend(dev)
237 device_t dev;
238{
239 struct gem_pci_softc *gsc = device_get_softc(dev);
240 struct gem_softc *sc = &gsc->gsc_gem;
241
242 gem_suspend(sc);
243 return (0);
244}
245
246static int
247gem_pci_resume(dev)
248 device_t dev;
249{
250 struct gem_pci_softc *gsc = device_get_softc(dev);
251 struct gem_softc *sc = &gsc->gsc_gem;
252
253 gem_resume(sc);
254 return (0);
255}
| 57#include <machine/ofw_machdep.h>
58
59#include <sys/rman.h>
60
61#include <dev/mii/mii.h>
62#include <dev/mii/miivar.h>
63
64#include <dev/gem/if_gemreg.h>
65#include <dev/gem/if_gemvar.h>
66
67#include <dev/pci/pcivar.h>
68#include <dev/pci/pcireg.h>
69
70#include "miibus_if.h"
71
72struct gem_pci_softc {
73 struct gem_softc gsc_gem; /* GEM device */
74 struct resource *gsc_sres;
75 int gsc_srid;
76 struct resource *gsc_ires;
77 int gsc_irid;
78 void *gsc_ih;
79};
80
81static int gem_pci_probe(device_t);
82static int gem_pci_attach(device_t);
83static int gem_pci_detach(device_t);
84static int gem_pci_suspend(device_t);
85static int gem_pci_resume(device_t);
86
87static device_method_t gem_pci_methods[] = {
88 /* Device interface */
89 DEVMETHOD(device_probe, gem_pci_probe),
90 DEVMETHOD(device_attach, gem_pci_attach),
91 DEVMETHOD(device_detach, gem_pci_detach),
92 DEVMETHOD(device_suspend, gem_pci_suspend),
93 DEVMETHOD(device_resume, gem_pci_resume),
94 /* Use the suspend handler here, it is all that is required. */
95 DEVMETHOD(device_shutdown, gem_pci_suspend),
96
97 /* bus interface */
98 DEVMETHOD(bus_print_child, bus_generic_print_child),
99 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
100
101 /* MII interface */
102 DEVMETHOD(miibus_readreg, gem_mii_readreg),
103 DEVMETHOD(miibus_writereg, gem_mii_writereg),
104 DEVMETHOD(miibus_statchg, gem_mii_statchg),
105
106 { 0, 0 }
107};
108
109static driver_t gem_pci_driver = {
110 "gem",
111 gem_pci_methods,
112 sizeof(struct gem_pci_softc)
113};
114
115
116DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
117MODULE_DEPEND(gem, pci, 1, 1, 1);
118MODULE_DEPEND(gem, ether, 1, 1, 1);
119
120struct gem_pci_dev {
121 u_int32_t gpd_devid;
122 int gpd_variant;
123 char *gpd_desc;
124} gem_pci_devlist[] = {
125 { 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" },
126 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" },
127 { 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" },
128 { 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" },
129 { 0, NULL }
130};
131
132/*
133 * Attach routines need to be split out to different bus-specific files.
134 */
135static int
136gem_pci_probe(dev)
137 device_t dev;
138{
139 int i;
140 u_int32_t devid;
141 struct gem_pci_softc *gsc;
142
143 devid = pci_get_devid(dev);
144 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
145 if (devid == gem_pci_devlist[i].gpd_devid) {
146 device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
147 gsc = device_get_softc(dev);
148 gsc->gsc_gem.sc_variant =
149 gem_pci_devlist[i].gpd_variant;
150 return (0);
151 }
152 }
153
154 return (ENXIO);
155}
156
157static int
158gem_pci_attach(dev)
159 device_t dev;
160{
161 struct gem_pci_softc *gsc = device_get_softc(dev);
162 struct gem_softc *sc = &gsc->gsc_gem;
163
164 pci_enable_busmaster(dev);
165
166 /*
167 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
168 * although it should be 1. correct that.
169 */
170 if (pci_get_intpin(dev) == 0)
171 pci_set_intpin(dev, 1);
172
173 sc->sc_dev = dev;
174 sc->sc_pci = 1; /* XXX */
175
176 gsc->gsc_srid = PCI_GEM_BASEADDR;
177 gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid,
178 0, ~0, 1, RF_ACTIVE);
179 if (gsc->gsc_sres == NULL) {
180 device_printf(dev, "failed to allocate bus space resource\n");
181 return (ENXIO);
182 }
183
184 gsc->gsc_irid = 0;
185 gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0,
186 ~0, 1, RF_SHAREABLE | RF_ACTIVE);
187 if (gsc->gsc_ires == NULL) {
188 device_printf(dev, "failed to allocate interrupt resource\n");
189 goto fail_sres;
190 }
191
192 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
193 sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
194
195 /* All platform that this driver is used on must provide this. */
196 OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr);
197
198 /*
199 * call the main configure
200 */
201 if (gem_attach(sc) != 0) {
202 device_printf(dev, "could not be configured\n");
203 goto fail_ires;
204 }
205
206 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc,
207 &gsc->gsc_ih) != 0) {
208 device_printf(dev, "failed to set up interrupt\n");
209 gem_detach(sc);
210 goto fail_ires;
211 }
212 return (0);
213
214fail_ires:
215 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
216fail_sres:
217 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
218 return (ENXIO);
219}
220
221static int
222gem_pci_detach(dev)
223 device_t dev;
224{
225 struct gem_pci_softc *gsc = device_get_softc(dev);
226 struct gem_softc *sc = &gsc->gsc_gem;
227
228 gem_detach(sc);
229
230 bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih);
231 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
232 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
233 return (0);
234}
235
236static int
237gem_pci_suspend(dev)
238 device_t dev;
239{
240 struct gem_pci_softc *gsc = device_get_softc(dev);
241 struct gem_softc *sc = &gsc->gsc_gem;
242
243 gem_suspend(sc);
244 return (0);
245}
246
247static int
248gem_pci_resume(dev)
249 device_t dev;
250{
251 struct gem_pci_softc *gsc = device_get_softc(dev);
252 struct gem_softc *sc = &gsc->gsc_gem;
253
254 gem_resume(sc);
255 return (0);
256}
|