if_gem.c (97240) | if_gem.c (99726) |
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1/* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
26 * from: NetBSD: gem.c,v 1.9 2001/10/21 20:45:15 thorpej Exp | 26 * from: NetBSD: gem.c,v 1.21 2002/06/01 23:50:58 lukem Exp |
27 * | 27 * |
28 * $FreeBSD: head/sys/dev/gem/if_gem.c 97240 2002-05-24 12:47:41Z tmm $ | 28 * $FreeBSD: head/sys/dev/gem/if_gem.c 99726 2002-07-10 10:24:23Z benno $ |
29 */ 30 31/* 32 * Driver for Sun GEM ethernet controllers. 33 */ 34 35#define GEM_DEBUG 36 --- 82 unchanged lines hidden (view full) --- 119 */ 120int 121gem_attach(sc) 122 struct gem_softc *sc; 123{ 124 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 125 struct mii_softc *child; 126 int i, error; | 29 */ 30 31/* 32 * Driver for Sun GEM ethernet controllers. 33 */ 34 35#define GEM_DEBUG 36 --- 82 unchanged lines hidden (view full) --- 119 */ 120int 121gem_attach(sc) 122 struct gem_softc *sc; 123{ 124 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 125 struct mii_softc *child; 126 int i, error; |
127 u_int32_t v; |
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127 128 /* Make sure the chip is stopped. */ 129 ifp->if_softc = sc; 130 gem_reset(sc); 131 132 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 133 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, GEM_NSEGS, 134 BUS_SPACE_MAXSIZE_32BIT, 0, &sc->sc_pdmatag); --- 88 unchanged lines hidden (view full) --- 223 * before this point releases all resources that may have been 224 * allocated. 225 */ 226 227 /* Announce ourselves. */ 228 device_printf(sc->sc_dev, "Ethernet address:"); 229 for (i = 0; i < 6; i++) 230 printf("%c%02x", i > 0 ? ':' : ' ', sc->sc_arpcom.ac_enaddr[i]); | 128 129 /* Make sure the chip is stopped. */ 130 ifp->if_softc = sc; 131 gem_reset(sc); 132 133 error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 134 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, GEM_NSEGS, 135 BUS_SPACE_MAXSIZE_32BIT, 0, &sc->sc_pdmatag); --- 88 unchanged lines hidden (view full) --- 224 * before this point releases all resources that may have been 225 * allocated. 226 */ 227 228 /* Announce ourselves. */ 229 device_printf(sc->sc_dev, "Ethernet address:"); 230 for (i = 0; i < 6; i++) 231 printf("%c%02x", i > 0 ? ':' : ' ', sc->sc_arpcom.ac_enaddr[i]); |
231 printf("\n"); | |
232 | 232 |
233 /* Get RX FIFO size */ 234 sc->sc_rxfifosize = 64 * 235 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_RX_FIFO_SIZE); 236 printf(", %uKB RX fifo", sc->sc_rxfifosize / 1024); 237 238 /* Get TX FIFO size */ 239 v = bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_FIFO_SIZE); 240 printf(", %uKB TX fifo\n", v / 16); 241 |
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233 /* Initialize ifnet structure. */ 234 ifp->if_softc = sc; 235 ifp->if_unit = device_get_unit(sc->sc_dev); 236 ifp->if_name = "gem"; 237 ifp->if_mtu = ETHERMTU; 238 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 239 ifp->if_start = gem_start; 240 ifp->if_ioctl = gem_ioctl; --- 170 unchanged lines hidden (view full) --- 411 */ 412 tx->txd_sc->sc_txdescs[tx->txd_nexttx].gd_addr = 413 GEM_DMA_WRITE(tx->txd_sc, segs[seg].ds_addr); 414 flags = segs[seg].ds_len & GEM_TD_BUFSIZE; 415 if ((tx->txd_flags & GTXD_FIRST) != 0 && seg == 0) { 416 CTR2(KTR_GEM, "txdma_cb: start of packet at seg %d, " 417 "tx %d", seg, tx->txd_nexttx); 418 flags |= GEM_TD_START_OF_PACKET; | 242 /* Initialize ifnet structure. */ 243 ifp->if_softc = sc; 244 ifp->if_unit = device_get_unit(sc->sc_dev); 245 ifp->if_name = "gem"; 246 ifp->if_mtu = ETHERMTU; 247 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 248 ifp->if_start = gem_start; 249 ifp->if_ioctl = gem_ioctl; --- 170 unchanged lines hidden (view full) --- 420 */ 421 tx->txd_sc->sc_txdescs[tx->txd_nexttx].gd_addr = 422 GEM_DMA_WRITE(tx->txd_sc, segs[seg].ds_addr); 423 flags = segs[seg].ds_len & GEM_TD_BUFSIZE; 424 if ((tx->txd_flags & GTXD_FIRST) != 0 && seg == 0) { 425 CTR2(KTR_GEM, "txdma_cb: start of packet at seg %d, " 426 "tx %d", seg, tx->txd_nexttx); 427 flags |= GEM_TD_START_OF_PACKET; |
428 if (++tx->txd_sc->sc_txwin > GEM_NTXSEGS * 2 / 3) { 429 tx->txd_sc->sc_txwin = 0; 430 flags |= GEM_TD_INTERRUPT_ME; 431 } |
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419 } 420 if ((tx->txd_flags & GTXD_LAST) != 0 && seg == nsegs - 1) { 421 CTR2(KTR_GEM, "txdma_cb: end of packet at seg %d, " 422 "tx %d", seg, tx->txd_nexttx); 423 flags |= GEM_TD_END_OF_PACKET; 424 } 425 tx->txd_sc->sc_txdescs[tx->txd_nexttx].gd_flags = 426 GEM_DMA_WRITE(tx->txd_sc, flags); --- 248 unchanged lines hidden (view full) --- 675 */ 676 memset((void *)sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 677 for (i = 0; i < GEM_NTXDESC; i++) { 678 sc->sc_txdescs[i].gd_flags = 0; 679 sc->sc_txdescs[i].gd_addr = 0; 680 } 681 GEM_CDTXSYNC(sc, 0, GEM_NTXDESC, 682 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); | 432 } 433 if ((tx->txd_flags & GTXD_LAST) != 0 && seg == nsegs - 1) { 434 CTR2(KTR_GEM, "txdma_cb: end of packet at seg %d, " 435 "tx %d", seg, tx->txd_nexttx); 436 flags |= GEM_TD_END_OF_PACKET; 437 } 438 tx->txd_sc->sc_txdescs[tx->txd_nexttx].gd_flags = 439 GEM_DMA_WRITE(tx->txd_sc, flags); --- 248 unchanged lines hidden (view full) --- 688 */ 689 memset((void *)sc->sc_txdescs, 0, sizeof(sc->sc_txdescs)); 690 for (i = 0; i < GEM_NTXDESC; i++) { 691 sc->sc_txdescs[i].gd_flags = 0; 692 sc->sc_txdescs[i].gd_addr = 0; 693 } 694 GEM_CDTXSYNC(sc, 0, GEM_NTXDESC, 695 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); |
683 sc->sc_txfree = GEM_NTXDESC; | 696 sc->sc_txfree = GEM_NTXDESC-1; |
684 sc->sc_txnext = 0; | 697 sc->sc_txnext = 0; |
698 sc->sc_txwin = 0; |
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685 686 /* 687 * Initialize the receive descriptor and receive job 688 * descriptor rings. 689 */ 690 for (i = 0; i < GEM_NRXDESC; i++) { 691 rxs = &sc->sc_rxsoft[i]; 692 if (rxs->rxs_mbuf == NULL) { --- 123 unchanged lines hidden (view full) --- 816 /* step 8. Global Configuration & Interrupt Mask */ 817 bus_space_write_4(t, h, GEM_INTMASK, 818 ~(GEM_INTR_TX_INTME| 819 GEM_INTR_TX_EMPTY| 820 GEM_INTR_RX_DONE|GEM_INTR_RX_NOBUF| 821 GEM_INTR_RX_TAG_ERR|GEM_INTR_PCS| 822 GEM_INTR_MAC_CONTROL|GEM_INTR_MIF| 823 GEM_INTR_BERR)); | 699 700 /* 701 * Initialize the receive descriptor and receive job 702 * descriptor rings. 703 */ 704 for (i = 0; i < GEM_NRXDESC; i++) { 705 rxs = &sc->sc_rxsoft[i]; 706 if (rxs->rxs_mbuf == NULL) { --- 123 unchanged lines hidden (view full) --- 830 /* step 8. Global Configuration & Interrupt Mask */ 831 bus_space_write_4(t, h, GEM_INTMASK, 832 ~(GEM_INTR_TX_INTME| 833 GEM_INTR_TX_EMPTY| 834 GEM_INTR_RX_DONE|GEM_INTR_RX_NOBUF| 835 GEM_INTR_RX_TAG_ERR|GEM_INTR_PCS| 836 GEM_INTR_MAC_CONTROL|GEM_INTR_MIF| 837 GEM_INTR_BERR)); |
824 bus_space_write_4(t, h, GEM_MAC_RX_MASK, 0); /* XXXX */ | 838 bus_space_write_4(t, h, GEM_MAC_RX_MASK, 839 GEM_MAC_RX_DONE|GEM_MAC_RX_FRAME_CNT); |
825 bus_space_write_4(t, h, GEM_MAC_TX_MASK, 0xffff); /* XXXX */ 826 bus_space_write_4(t, h, GEM_MAC_CONTROL_MASK, 0); /* XXXX */ 827 828 /* step 9. ETX Configuration: use mostly default values */ 829 830 /* Enable DMA */ 831 v = gem_ringsize(GEM_NTXDESC /*XXX*/); 832 bus_space_write_4(t, h, GEM_TX_CONFIG, --- 6 unchanged lines hidden (view full) --- 839 v = gem_ringsize(GEM_NRXDESC /*XXX*/); 840 841 /* Enable DMA */ 842 bus_space_write_4(t, h, GEM_RX_CONFIG, 843 v|(GEM_THRSH_1024<<GEM_RX_CONFIG_FIFO_THRS_SHIFT)| 844 (2<<GEM_RX_CONFIG_FBOFF_SHFT)|GEM_RX_CONFIG_RXDMA_EN| 845 (0<<GEM_RX_CONFIG_CXM_START_SHFT)); 846 /* | 840 bus_space_write_4(t, h, GEM_MAC_TX_MASK, 0xffff); /* XXXX */ 841 bus_space_write_4(t, h, GEM_MAC_CONTROL_MASK, 0); /* XXXX */ 842 843 /* step 9. ETX Configuration: use mostly default values */ 844 845 /* Enable DMA */ 846 v = gem_ringsize(GEM_NTXDESC /*XXX*/); 847 bus_space_write_4(t, h, GEM_TX_CONFIG, --- 6 unchanged lines hidden (view full) --- 854 v = gem_ringsize(GEM_NRXDESC /*XXX*/); 855 856 /* Enable DMA */ 857 bus_space_write_4(t, h, GEM_RX_CONFIG, 858 v|(GEM_THRSH_1024<<GEM_RX_CONFIG_FIFO_THRS_SHIFT)| 859 (2<<GEM_RX_CONFIG_FBOFF_SHFT)|GEM_RX_CONFIG_RXDMA_EN| 860 (0<<GEM_RX_CONFIG_CXM_START_SHFT)); 861 /* |
847 * The following value is for an OFF Threshold of about 15.5 Kbytes 848 * and an ON Threshold of 4K bytes. | 862 * The following value is for an OFF Threshold of about 3/4 full 863 * and an ON Threshold of 1/4 full. |
849 */ | 864 */ |
850 bus_space_write_4(t, h, GEM_RX_PAUSE_THRESH, 0xf8 | (0x40 << 12)); 851 bus_space_write_4(t, h, GEM_RX_BLANKING, (2<<12)|6); | 865 bus_space_write_4(t, h, GEM_RX_PAUSE_THRESH, 866 (3 * sc->sc_rxfifosize / 256) | 867 ( (sc->sc_rxfifosize / 256) << 12)); 868 bus_space_write_4(t, h, GEM_RX_BLANKING, (6<<12)|6); |
852 853 /* step 11. Configure Media */ | 869 870 /* step 11. Configure Media */ |
854 (void)gem_mii_statchg(sc->sc_dev); | 871 mii_mediachg(sc->sc_mii); |
855 856 /* step 12. RX_MAC Configuration Register */ 857 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG); 858 v |= GEM_MAC_RX_ENABLE; 859 bus_space_write_4(t, h, GEM_MAC_RX_CONFIG, v); 860 861 /* step 14. Issue Transmit Pending command */ 862 --- 5 unchanged lines hidden (view full) --- 868 bus_space_write_4(t, h, GEM_RX_KICK, GEM_NRXDESC-4); 869 870 /* Start the one second timer. */ 871 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); 872 873 ifp->if_flags |= IFF_RUNNING; 874 ifp->if_flags &= ~IFF_OACTIVE; 875 ifp->if_timer = 0; | 872 873 /* step 12. RX_MAC Configuration Register */ 874 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG); 875 v |= GEM_MAC_RX_ENABLE; 876 bus_space_write_4(t, h, GEM_MAC_RX_CONFIG, v); 877 878 /* step 14. Issue Transmit Pending command */ 879 --- 5 unchanged lines hidden (view full) --- 885 bus_space_write_4(t, h, GEM_RX_KICK, GEM_NRXDESC-4); 886 887 /* Start the one second timer. */ 888 callout_reset(&sc->sc_tick_ch, hz, gem_tick, sc); 889 890 ifp->if_flags |= IFF_RUNNING; 891 ifp->if_flags &= ~IFF_OACTIVE; 892 ifp->if_timer = 0; |
876 sc->sc_flags = ifp->if_flags; | 893 sc->sc_ifflags = ifp->if_flags; |
877 splx(s); 878} 879 880/* 881 * XXX: This is really a substitute for bus_dmamap_load_mbuf(), which FreeBSD 882 * does not yet have, with some adaptions for this driver. 883 * Some changes are mandated by the fact that multiple maps may needed to map 884 * a single mbuf. --- 115 unchanged lines hidden (view full) --- 1000 STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 1001 } 1002} 1003 1004static void 1005gem_init_regs(sc) 1006 struct gem_softc *sc; 1007{ | 894 splx(s); 895} 896 897/* 898 * XXX: This is really a substitute for bus_dmamap_load_mbuf(), which FreeBSD 899 * does not yet have, with some adaptions for this driver. 900 * Some changes are mandated by the fact that multiple maps may needed to map 901 * a single mbuf. --- 115 unchanged lines hidden (view full) --- 1017 STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); 1018 } 1019} 1020 1021static void 1022gem_init_regs(sc) 1023 struct gem_softc *sc; 1024{ |
1008 struct ifnet *ifp = &sc->sc_arpcom.ac_if; | |
1009 bus_space_tag_t t = sc->sc_bustag; 1010 bus_space_handle_t h = sc->sc_h; | 1025 bus_space_tag_t t = sc->sc_bustag; 1026 bus_space_handle_t h = sc->sc_h; |
1027 const u_char *laddr = sc->sc_arpcom.ac_enaddr; 1028 u_int32_t v; |
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1011 1012 /* These regs are not cleared on reset */ | 1029 1030 /* These regs are not cleared on reset */ |
1013 sc->sc_inited = 0; | |
1014 if (!sc->sc_inited) { 1015 1016 /* Wooo. Magic values. */ 1017 bus_space_write_4(t, h, GEM_MAC_IPG0, 0); 1018 bus_space_write_4(t, h, GEM_MAC_IPG1, 8); 1019 bus_space_write_4(t, h, GEM_MAC_IPG2, 4); 1020 1021 bus_space_write_4(t, h, GEM_MAC_MAC_MIN_FRAME, ETHER_MIN_LEN); 1022 /* Max frame and max burst size */ 1023 bus_space_write_4(t, h, GEM_MAC_MAC_MAX_FRAME, | 1031 if (!sc->sc_inited) { 1032 1033 /* Wooo. Magic values. */ 1034 bus_space_write_4(t, h, GEM_MAC_IPG0, 0); 1035 bus_space_write_4(t, h, GEM_MAC_IPG1, 8); 1036 bus_space_write_4(t, h, GEM_MAC_IPG2, 4); 1037 1038 bus_space_write_4(t, h, GEM_MAC_MAC_MIN_FRAME, ETHER_MIN_LEN); 1039 /* Max frame and max burst size */ 1040 bus_space_write_4(t, h, GEM_MAC_MAC_MAX_FRAME, |
1024 (ifp->if_mtu+18) | (0x2000<<16)/* Burst size */); | 1041 ETHER_MAX_LEN | (0x2000<<16)); 1042 |
1025 bus_space_write_4(t, h, GEM_MAC_PREAMBLE_LEN, 0x7); 1026 bus_space_write_4(t, h, GEM_MAC_JAM_SIZE, 0x4); 1027 bus_space_write_4(t, h, GEM_MAC_ATTEMPT_LIMIT, 0x10); 1028 /* Dunno.... */ 1029 bus_space_write_4(t, h, GEM_MAC_CONTROL_TYPE, 0x8088); 1030 bus_space_write_4(t, h, GEM_MAC_RANDOM_SEED, | 1043 bus_space_write_4(t, h, GEM_MAC_PREAMBLE_LEN, 0x7); 1044 bus_space_write_4(t, h, GEM_MAC_JAM_SIZE, 0x4); 1045 bus_space_write_4(t, h, GEM_MAC_ATTEMPT_LIMIT, 0x10); 1046 /* Dunno.... */ 1047 bus_space_write_4(t, h, GEM_MAC_CONTROL_TYPE, 0x8088); 1048 bus_space_write_4(t, h, GEM_MAC_RANDOM_SEED, |
1031 ((sc->sc_arpcom.ac_enaddr[5]<<8)| 1032 sc->sc_arpcom.ac_enaddr[4])&0x3ff); | 1049 ((laddr[5]<<8)|laddr[4])&0x3ff); 1050 |
1033 /* Secondary MAC addr set to 0:0:0:0:0:0 */ 1034 bus_space_write_4(t, h, GEM_MAC_ADDR3, 0); 1035 bus_space_write_4(t, h, GEM_MAC_ADDR4, 0); 1036 bus_space_write_4(t, h, GEM_MAC_ADDR5, 0); | 1051 /* Secondary MAC addr set to 0:0:0:0:0:0 */ 1052 bus_space_write_4(t, h, GEM_MAC_ADDR3, 0); 1053 bus_space_write_4(t, h, GEM_MAC_ADDR4, 0); 1054 bus_space_write_4(t, h, GEM_MAC_ADDR5, 0); |
1037 /* MAC control addr set to 0:1:c2:0:1:80 */ | 1055 1056 /* MAC control addr set to 01:80:c2:00:00:01 */ |
1038 bus_space_write_4(t, h, GEM_MAC_ADDR6, 0x0001); 1039 bus_space_write_4(t, h, GEM_MAC_ADDR7, 0xc200); 1040 bus_space_write_4(t, h, GEM_MAC_ADDR8, 0x0180); 1041 1042 /* MAC filter addr set to 0:0:0:0:0:0 */ 1043 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER0, 0); 1044 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER1, 0); 1045 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER2, 0); --- 22 unchanged lines hidden (view full) --- 1068 bus_space_write_4(t, h, GEM_MAC_SEND_PAUSE_CMD, 0x1BF0); 1069#else 1070 bus_space_write_4(t, h, GEM_MAC_SEND_PAUSE_CMD, 0); 1071#endif 1072 1073 /* 1074 * Set the station address. 1075 */ | 1057 bus_space_write_4(t, h, GEM_MAC_ADDR6, 0x0001); 1058 bus_space_write_4(t, h, GEM_MAC_ADDR7, 0xc200); 1059 bus_space_write_4(t, h, GEM_MAC_ADDR8, 0x0180); 1060 1061 /* MAC filter addr set to 0:0:0:0:0:0 */ 1062 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER0, 0); 1063 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER1, 0); 1064 bus_space_write_4(t, h, GEM_MAC_ADDR_FILTER2, 0); --- 22 unchanged lines hidden (view full) --- 1087 bus_space_write_4(t, h, GEM_MAC_SEND_PAUSE_CMD, 0x1BF0); 1088#else 1089 bus_space_write_4(t, h, GEM_MAC_SEND_PAUSE_CMD, 0); 1090#endif 1091 1092 /* 1093 * Set the station address. 1094 */ |
1076 bus_space_write_4(t, h, GEM_MAC_ADDR0, 1077 (sc->sc_arpcom.ac_enaddr[4]<<8) | sc->sc_arpcom.ac_enaddr[5]); 1078 bus_space_write_4(t, h, GEM_MAC_ADDR1, 1079 (sc->sc_arpcom.ac_enaddr[2]<<8) | sc->sc_arpcom.ac_enaddr[3]); 1080 bus_space_write_4(t, h, GEM_MAC_ADDR2, 1081 (sc->sc_arpcom.ac_enaddr[0]<<8) | sc->sc_arpcom.ac_enaddr[1]); | 1095 bus_space_write_4(t, h, GEM_MAC_ADDR0, (laddr[4]<<8)|laddr[5]); 1096 bus_space_write_4(t, h, GEM_MAC_ADDR1, (laddr[2]<<8)|laddr[3]); 1097 bus_space_write_4(t, h, GEM_MAC_ADDR2, (laddr[0]<<8)|laddr[1]); 1098 1099 /* 1100 * Enable MII outputs. Enable GMII if there is a gigabit PHY. 1101 */ 1102 sc->sc_mif_config = bus_space_read_4(t, h, GEM_MIF_CONFIG); 1103 v = GEM_MAC_XIF_TX_MII_ENA; 1104 if (sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) { 1105 v |= GEM_MAC_XIF_FDPLX_LED; 1106 if (sc->sc_flags & GEM_GIGABIT) 1107 v |= GEM_MAC_XIF_GMII_MODE; 1108 } 1109 bus_space_write_4(t, h, GEM_MAC_XIF_CONFIG, v); |
1082} 1083 1084static void 1085gem_start(ifp) 1086 struct ifnet *ifp; 1087{ 1088 struct gem_softc *sc = (struct gem_softc *)ifp->if_softc; 1089 struct mbuf *m0 = NULL, *m; --- 176 unchanged lines hidden (view full) --- 1266gem_tint(sc) 1267 struct gem_softc *sc; 1268{ 1269 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1270 bus_space_tag_t t = sc->sc_bustag; 1271 bus_space_handle_t mac = sc->sc_h; 1272 struct gem_txsoft *txs; 1273 int txlast; | 1110} 1111 1112static void 1113gem_start(ifp) 1114 struct ifnet *ifp; 1115{ 1116 struct gem_softc *sc = (struct gem_softc *)ifp->if_softc; 1117 struct mbuf *m0 = NULL, *m; --- 176 unchanged lines hidden (view full) --- 1294gem_tint(sc) 1295 struct gem_softc *sc; 1296{ 1297 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1298 bus_space_tag_t t = sc->sc_bustag; 1299 bus_space_handle_t mac = sc->sc_h; 1300 struct gem_txsoft *txs; 1301 int txlast; |
1302 int progress = 0; |
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1274 1275 1276 DPRINTF(sc, ("%s: gem_tint\n", device_get_name(sc->sc_dev))); 1277 CTR1(KTR_GEM, "%s: gem_tint", device_get_name(sc->sc_dev)); 1278 1279 /* 1280 * Unload collision counters 1281 */ --- 73 unchanged lines hidden (view full) --- 1355 if (txs->txs_mbuf != NULL) { 1356 m_freem(txs->txs_mbuf); 1357 txs->txs_mbuf = NULL; 1358 } 1359 1360 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1361 1362 ifp->if_opackets++; | 1303 1304 1305 DPRINTF(sc, ("%s: gem_tint\n", device_get_name(sc->sc_dev))); 1306 CTR1(KTR_GEM, "%s: gem_tint", device_get_name(sc->sc_dev)); 1307 1308 /* 1309 * Unload collision counters 1310 */ --- 73 unchanged lines hidden (view full) --- 1384 if (txs->txs_mbuf != NULL) { 1385 m_freem(txs->txs_mbuf); 1386 txs->txs_mbuf = NULL; 1387 } 1388 1389 STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); 1390 1391 ifp->if_opackets++; |
1392 progress = 1; |
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1363 } 1364 1365 DPRINTF(sc, ("gem_tint: GEM_TX_STATE_MACHINE %x " 1366 "GEM_TX_DATA_PTR %llx " 1367 "GEM_TX_COMPLETION %x\n", 1368 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_STATE_MACHINE), 1369 ((long long) bus_space_read_4(sc->sc_bustag, sc->sc_h, 1370 GEM_TX_DATA_PTR_HI) << 32) | --- 5 unchanged lines hidden (view full) --- 1376 "GEM_TX_COMPLETION %x", 1377 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_STATE_MACHINE), 1378 ((long long) bus_space_read_4(sc->sc_bustag, sc->sc_h, 1379 GEM_TX_DATA_PTR_HI) << 32) | 1380 bus_space_read_4(sc->sc_bustag, sc->sc_h, 1381 GEM_TX_DATA_PTR_LO), 1382 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_COMPLETION)); 1383 | 1393 } 1394 1395 DPRINTF(sc, ("gem_tint: GEM_TX_STATE_MACHINE %x " 1396 "GEM_TX_DATA_PTR %llx " 1397 "GEM_TX_COMPLETION %x\n", 1398 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_STATE_MACHINE), 1399 ((long long) bus_space_read_4(sc->sc_bustag, sc->sc_h, 1400 GEM_TX_DATA_PTR_HI) << 32) | --- 5 unchanged lines hidden (view full) --- 1406 "GEM_TX_COMPLETION %x", 1407 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_STATE_MACHINE), 1408 ((long long) bus_space_read_4(sc->sc_bustag, sc->sc_h, 1409 GEM_TX_DATA_PTR_HI) << 32) | 1410 bus_space_read_4(sc->sc_bustag, sc->sc_h, 1411 GEM_TX_DATA_PTR_LO), 1412 bus_space_read_4(sc->sc_bustag, sc->sc_h, GEM_TX_COMPLETION)); 1413 |
1384 if (STAILQ_FIRST(&sc->sc_txdirtyq) == NULL) 1385 ifp->if_timer = 0; | 1414 if (progress) { 1415 if (sc->sc_txfree == GEM_NTXDESC - 1) 1416 sc->sc_txwin = 0; |
1386 | 1417 |
1418 /* Freed some descriptors, so reset IFF_OACTIVE and restart. */ 1419 ifp->if_flags &= ~IFF_OACTIVE; 1420 gem_start(ifp); |
|
1387 | 1421 |
1422 if (STAILQ_EMPTY(&sc->sc_txdirtyq)) 1423 ifp->if_timer = 0; 1424 } 1425 |
|
1388 DPRINTF(sc, ("%s: gem_tint: watchdog %d\n", 1389 device_get_name(sc->sc_dev), ifp->if_timer)); 1390 CTR2(KTR_GEM, "%s: gem_tint: watchdog %d", 1391 device_get_name(sc->sc_dev), ifp->if_timer); | 1426 DPRINTF(sc, ("%s: gem_tint: watchdog %d\n", 1427 device_get_name(sc->sc_dev), ifp->if_timer)); 1428 CTR2(KTR_GEM, "%s: gem_tint: watchdog %d", 1429 device_get_name(sc->sc_dev), ifp->if_timer); |
1392 1393 /* Freed some descriptors, so reset IFF_OACTIVE and restart. */ 1394 ifp->if_flags &= ~IFF_OACTIVE; 1395 gem_start(ifp); | |
1396} 1397 1398static void 1399gem_rint_timeout(arg) 1400 void *arg; 1401{ 1402 1403 gem_rint((struct gem_softc *)arg); --- 8 unchanged lines hidden (view full) --- 1412{ 1413 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1414 bus_space_tag_t t = sc->sc_bustag; 1415 bus_space_handle_t h = sc->sc_h; 1416 struct ether_header *eh; 1417 struct gem_rxsoft *rxs; 1418 struct mbuf *m; 1419 u_int64_t rxstat; | 1430} 1431 1432static void 1433gem_rint_timeout(arg) 1434 void *arg; 1435{ 1436 1437 gem_rint((struct gem_softc *)arg); --- 8 unchanged lines hidden (view full) --- 1446{ 1447 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 1448 bus_space_tag_t t = sc->sc_bustag; 1449 bus_space_handle_t h = sc->sc_h; 1450 struct ether_header *eh; 1451 struct gem_rxsoft *rxs; 1452 struct mbuf *m; 1453 u_int64_t rxstat; |
1420 int i, len; | 1454 u_int32_t rxcomp; 1455 int i, len, progress = 0; |
1421 1422 callout_stop(&sc->sc_rx_ch); 1423 DPRINTF(sc, ("%s: gem_rint\n", device_get_name(sc->sc_dev))); 1424 CTR1(KTR_GEM, "%s: gem_rint", device_get_name(sc->sc_dev)); | 1456 1457 callout_stop(&sc->sc_rx_ch); 1458 DPRINTF(sc, ("%s: gem_rint\n", device_get_name(sc->sc_dev))); 1459 CTR1(KTR_GEM, "%s: gem_rint", device_get_name(sc->sc_dev)); |
1460 |
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1425 /* | 1461 /* |
1462 * Read the completion register once. This limits 1463 * how long the following loop can execute. 1464 */ 1465 rxcomp = bus_space_read_4(t, h, GEM_RX_COMPLETION); 1466 1467 /* |
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1426 * XXXX Read the lastrx only once at the top for speed. 1427 */ 1428 DPRINTF(sc, ("gem_rint: sc->rxptr %d, complete %d\n", | 1468 * XXXX Read the lastrx only once at the top for speed. 1469 */ 1470 DPRINTF(sc, ("gem_rint: sc->rxptr %d, complete %d\n", |
1429 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION))); | 1471 sc->sc_rxptr, rxcomp)); |
1430 CTR2(KTR_GEM, "gem_rint: sc->rxptr %d, complete %d", | 1472 CTR2(KTR_GEM, "gem_rint: sc->rxptr %d, complete %d", |
1431 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION)); 1432 for (i = sc->sc_rxptr; i != bus_space_read_4(t, h, GEM_RX_COMPLETION); | 1473 sc->sc_rxptr, rxcomp); 1474 for (i = sc->sc_rxptr; i != rxcomp; |
1433 i = GEM_NEXTRX(i)) { 1434 rxs = &sc->sc_rxsoft[i]; 1435 1436 GEM_CDRXSYNC(sc, i, 1437 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1438 1439 rxstat = GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_flags); 1440 1441 if (rxstat & GEM_RD_OWN) { | 1475 i = GEM_NEXTRX(i)) { 1476 rxs = &sc->sc_rxsoft[i]; 1477 1478 GEM_CDRXSYNC(sc, i, 1479 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1480 1481 rxstat = GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_flags); 1482 1483 if (rxstat & GEM_RD_OWN) { |
1484#if 0 /* XXX: In case of emergency, re-enable this. */ |
|
1442 /* 1443 * The descriptor is still marked as owned, although 1444 * it is supposed to have completed. This has been 1445 * observed on some machines. Just exiting here 1446 * might leave the packet sitting around until another 1447 * one arrives to trigger a new interrupt, which is 1448 * generally undesirable, so set up a timeout. 1449 */ 1450 callout_reset(&sc->sc_rx_ch, GEM_RXOWN_TICKS, 1451 gem_rint_timeout, sc); | 1485 /* 1486 * The descriptor is still marked as owned, although 1487 * it is supposed to have completed. This has been 1488 * observed on some machines. Just exiting here 1489 * might leave the packet sitting around until another 1490 * one arrives to trigger a new interrupt, which is 1491 * generally undesirable, so set up a timeout. 1492 */ 1493 callout_reset(&sc->sc_rx_ch, GEM_RXOWN_TICKS, 1494 gem_rint_timeout, sc); |
1495#endif |
|
1452 break; 1453 } 1454 | 1496 break; 1497 } 1498 |
1499 progress++; 1500 ifp->if_ipackets++; 1501 |
|
1455 if (rxstat & GEM_RD_BAD_CRC) { | 1502 if (rxstat & GEM_RD_BAD_CRC) { |
1503 ifp->if_ierrors++; |
|
1456 device_printf(sc->sc_dev, "receive error: CRC error\n"); 1457 GEM_INIT_RXDESC(sc, i); 1458 continue; 1459 } 1460 1461 bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 1462 BUS_DMASYNC_POSTREAD); 1463#ifdef GEM_DEBUG --- 22 unchanged lines hidden (view full) --- 1486 ifp->if_ierrors++; 1487 GEM_INIT_RXDESC(sc, i); 1488 bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 1489 BUS_DMASYNC_PREREAD); 1490 continue; 1491 } 1492 m->m_data += 2; /* We're already off by two */ 1493 | 1504 device_printf(sc->sc_dev, "receive error: CRC error\n"); 1505 GEM_INIT_RXDESC(sc, i); 1506 continue; 1507 } 1508 1509 bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 1510 BUS_DMASYNC_POSTREAD); 1511#ifdef GEM_DEBUG --- 22 unchanged lines hidden (view full) --- 1534 ifp->if_ierrors++; 1535 GEM_INIT_RXDESC(sc, i); 1536 bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 1537 BUS_DMASYNC_PREREAD); 1538 continue; 1539 } 1540 m->m_data += 2; /* We're already off by two */ 1541 |
1494 ifp->if_ipackets++; | |
1495 eh = mtod(m, struct ether_header *); 1496 m->m_pkthdr.rcvif = ifp; 1497 m->m_pkthdr.len = m->m_len = len - ETHER_CRC_LEN; 1498 m_adj(m, sizeof(struct ether_header)); 1499 1500 /* Pass it on. */ 1501 ether_input(ifp, eh, m); 1502 } 1503 | 1542 eh = mtod(m, struct ether_header *); 1543 m->m_pkthdr.rcvif = ifp; 1544 m->m_pkthdr.len = m->m_len = len - ETHER_CRC_LEN; 1545 m_adj(m, sizeof(struct ether_header)); 1546 1547 /* Pass it on. */ 1548 ether_input(ifp, eh, m); 1549 } 1550 |
1504 /* Update the receive pointer. */ 1505 sc->sc_rxptr = i; 1506 bus_space_write_4(t, h, GEM_RX_KICK, i); | 1551 if (progress) { 1552 /* Update the receive pointer. */ 1553 if (i == sc->sc_rxptr) { 1554 device_printf(sc->sc_dev, "rint: ring wrap\n"); 1555 } 1556 sc->sc_rxptr = i; 1557 bus_space_write_4(t, h, GEM_RX_KICK, GEM_PREVRX(i)); 1558 } |
1507 1508 DPRINTF(sc, ("gem_rint: done sc->rxptr %d, complete %d\n", 1509 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION))); 1510 CTR2(KTR_GEM, "gem_rint: done sc->rxptr %d, complete %d", 1511 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION)); 1512 1513} 1514 --- 89 unchanged lines hidden (view full) --- 1604 1605 if ((status & (GEM_INTR_RX_DONE | GEM_INTR_RX_NOBUF)) != 0) 1606 gem_rint(sc); 1607 1608 /* We should eventually do more than just print out error stats. */ 1609 if (status & GEM_INTR_TX_MAC) { 1610 int txstat = bus_space_read_4(t, seb, GEM_MAC_TX_STATUS); 1611 if (txstat & ~GEM_MAC_TX_XMIT_DONE) | 1559 1560 DPRINTF(sc, ("gem_rint: done sc->rxptr %d, complete %d\n", 1561 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION))); 1562 CTR2(KTR_GEM, "gem_rint: done sc->rxptr %d, complete %d", 1563 sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION)); 1564 1565} 1566 --- 89 unchanged lines hidden (view full) --- 1656 1657 if ((status & (GEM_INTR_RX_DONE | GEM_INTR_RX_NOBUF)) != 0) 1658 gem_rint(sc); 1659 1660 /* We should eventually do more than just print out error stats. */ 1661 if (status & GEM_INTR_TX_MAC) { 1662 int txstat = bus_space_read_4(t, seb, GEM_MAC_TX_STATUS); 1663 if (txstat & ~GEM_MAC_TX_XMIT_DONE) |
1612 printf("MAC tx fault, status %x\n", txstat); | 1664 device_printf(sc->sc_dev, "MAC tx fault, status %x\n", 1665 txstat); |
1613 if (txstat & (GEM_MAC_TX_UNDERRUN | GEM_MAC_TX_PKT_TOO_LONG)) 1614 gem_init(sc); 1615 } 1616 if (status & GEM_INTR_RX_MAC) { 1617 int rxstat = bus_space_read_4(t, seb, GEM_MAC_RX_STATUS); 1618 if (rxstat & ~(GEM_MAC_RX_DONE | GEM_MAC_RX_FRAME_CNT)) | 1666 if (txstat & (GEM_MAC_TX_UNDERRUN | GEM_MAC_TX_PKT_TOO_LONG)) 1667 gem_init(sc); 1668 } 1669 if (status & GEM_INTR_RX_MAC) { 1670 int rxstat = bus_space_read_4(t, seb, GEM_MAC_RX_STATUS); 1671 if (rxstat & ~(GEM_MAC_RX_DONE | GEM_MAC_RX_FRAME_CNT)) |
1619 printf("MAC rx fault, status %x\n", rxstat); | 1672 device_printf(sc->sc_dev, "MAC rx fault, status %x\n", 1673 rxstat); |
1620 if ((rxstat & GEM_MAC_RX_OVERFLOW) != 0) 1621 gem_init(sc); 1622 } 1623} 1624 1625 1626static void 1627gem_watchdog(ifp) --- 167 unchanged lines hidden (view full) --- 1795 } 1796 bus_space_write_4(t, mac, GEM_MAC_TX_CONFIG, v); 1797 1798 /* XIF Configuration */ 1799 /* We should really calculate all this rather than rely on defaults */ 1800 v = bus_space_read_4(t, mac, GEM_MAC_XIF_CONFIG); 1801 v = GEM_MAC_XIF_LINK_LED; 1802 v |= GEM_MAC_XIF_TX_MII_ENA; | 1674 if ((rxstat & GEM_MAC_RX_OVERFLOW) != 0) 1675 gem_init(sc); 1676 } 1677} 1678 1679 1680static void 1681gem_watchdog(ifp) --- 167 unchanged lines hidden (view full) --- 1849 } 1850 bus_space_write_4(t, mac, GEM_MAC_TX_CONFIG, v); 1851 1852 /* XIF Configuration */ 1853 /* We should really calculate all this rather than rely on defaults */ 1854 v = bus_space_read_4(t, mac, GEM_MAC_XIF_CONFIG); 1855 v = GEM_MAC_XIF_LINK_LED; 1856 v |= GEM_MAC_XIF_TX_MII_ENA; |
1857 |
|
1803 /* If an external transceiver is connected, enable its MII drivers */ 1804 sc->sc_mif_config = bus_space_read_4(t, mac, GEM_MIF_CONFIG); 1805 if ((sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) != 0) { 1806 /* External MII needs echo disable if half duplex. */ 1807 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) 1808 /* turn on full duplex LED */ 1809 v |= GEM_MAC_XIF_FDPLX_LED; | 1858 /* If an external transceiver is connected, enable its MII drivers */ 1859 sc->sc_mif_config = bus_space_read_4(t, mac, GEM_MIF_CONFIG); 1860 if ((sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) != 0) { 1861 /* External MII needs echo disable if half duplex. */ 1862 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) & IFM_FDX) != 0) 1863 /* turn on full duplex LED */ 1864 v |= GEM_MAC_XIF_FDPLX_LED; |
1810 else 1811 /* half duplex -- disable echo */ 1812 v |= GEM_MAC_XIF_ECHO_DISABL; | 1865 else 1866 /* half duplex -- disable echo */ 1867 v |= GEM_MAC_XIF_ECHO_DISABL; 1868 1869 if (IFM_SUBTYPE(sc->sc_mii->mii_media_active) == IFM_1000_T) 1870 v |= GEM_MAC_XIF_GMII_MODE; 1871 else 1872 v &= ~GEM_MAC_XIF_GMII_MODE; |
1813 } else { 1814 /* Internal MII needs buf enable */ 1815 v |= GEM_MAC_XIF_MII_BUF_ENA; 1816 } 1817 bus_space_write_4(t, mac, GEM_MAC_XIF_CONFIG, v); 1818} 1819 1820int --- 38 unchanged lines hidden (view full) --- 1859 switch (cmd) { 1860 case SIOCSIFADDR: 1861 case SIOCGIFADDR: 1862 case SIOCSIFMTU: 1863 error = ether_ioctl(ifp, cmd, data); 1864 break; 1865 case SIOCSIFFLAGS: 1866 if (ifp->if_flags & IFF_UP) { | 1873 } else { 1874 /* Internal MII needs buf enable */ 1875 v |= GEM_MAC_XIF_MII_BUF_ENA; 1876 } 1877 bus_space_write_4(t, mac, GEM_MAC_XIF_CONFIG, v); 1878} 1879 1880int --- 38 unchanged lines hidden (view full) --- 1919 switch (cmd) { 1920 case SIOCSIFADDR: 1921 case SIOCGIFADDR: 1922 case SIOCSIFMTU: 1923 error = ether_ioctl(ifp, cmd, data); 1924 break; 1925 case SIOCSIFFLAGS: 1926 if (ifp->if_flags & IFF_UP) { |
1867 if ((sc->sc_flags ^ ifp->if_flags) == IFF_PROMISC) | 1927 if ((sc->sc_ifflags ^ ifp->if_flags) == IFF_PROMISC) |
1868 gem_setladrf(sc); 1869 else 1870 gem_init(sc); 1871 } else { 1872 if (ifp->if_flags & IFF_RUNNING) 1873 gem_stop(ifp, 0); 1874 } | 1928 gem_setladrf(sc); 1929 else 1930 gem_init(sc); 1931 } else { 1932 if (ifp->if_flags & IFF_RUNNING) 1933 gem_stop(ifp, 0); 1934 } |
1875 sc->sc_flags = ifp->if_flags; | 1935 sc->sc_ifflags = ifp->if_flags; |
1876 error = 0; 1877 break; 1878 case SIOCADDMULTI: 1879 case SIOCDELMULTI: 1880 gem_setladrf(sc); 1881 error = 0; 1882 break; 1883 case SIOCGIFMEDIA: --- 24 unchanged lines hidden (view full) --- 1908 struct sockaddr_dl *sdl; 1909 bus_space_tag_t t = sc->sc_bustag; 1910 bus_space_handle_t h = sc->sc_h; 1911 u_char *cp; 1912 u_int32_t crc; 1913 u_int32_t hash[16]; 1914 u_int32_t v; 1915 int len; | 1936 error = 0; 1937 break; 1938 case SIOCADDMULTI: 1939 case SIOCDELMULTI: 1940 gem_setladrf(sc); 1941 error = 0; 1942 break; 1943 case SIOCGIFMEDIA: --- 24 unchanged lines hidden (view full) --- 1968 struct sockaddr_dl *sdl; 1969 bus_space_tag_t t = sc->sc_bustag; 1970 bus_space_handle_t h = sc->sc_h; 1971 u_char *cp; 1972 u_int32_t crc; 1973 u_int32_t hash[16]; 1974 u_int32_t v; 1975 int len; |
1976 int i; |
|
1916 | 1977 |
1917 /* Clear hash table */ 1918 memset(hash, 0, sizeof(hash)); 1919 | |
1920 /* Get current RX configuration */ 1921 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG); 1922 | 1978 /* Get current RX configuration */ 1979 v = bus_space_read_4(t, h, GEM_MAC_RX_CONFIG); 1980 |
1981 /* 1982 * Turn off promiscuous mode, promiscuous group mode (all multicast), 1983 * and hash filter. Depending on the case, the right bit will be 1984 * enabled. 1985 */ 1986 v &= ~(GEM_MAC_RX_PROMISCUOUS|GEM_MAC_RX_HASH_FILTER| 1987 GEM_MAC_RX_PROMISC_GRP); 1988 |
|
1923 if ((ifp->if_flags & IFF_PROMISC) != 0) { | 1989 if ((ifp->if_flags & IFF_PROMISC) != 0) { |
1924 /* Turn on promiscuous mode; turn off the hash filter */ | 1990 /* Turn on promiscuous mode */ |
1925 v |= GEM_MAC_RX_PROMISCUOUS; | 1991 v |= GEM_MAC_RX_PROMISCUOUS; |
1926 v &= ~GEM_MAC_RX_HASH_FILTER; 1927 ; | |
1928 goto chipit; 1929 } 1930 if ((ifp->if_flags & IFF_ALLMULTI) != 0) { 1931 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 1932 ifp->if_flags |= IFF_ALLMULTI; | 1992 goto chipit; 1993 } 1994 if ((ifp->if_flags & IFF_ALLMULTI) != 0) { 1995 hash[3] = hash[2] = hash[1] = hash[0] = 0xffff; 1996 ifp->if_flags |= IFF_ALLMULTI; |
1997 v |= GEM_MAC_RX_PROMISC_GRP; |
|
1933 goto chipit; 1934 } 1935 | 1998 goto chipit; 1999 } 2000 |
1936 /* Turn off promiscuous mode; turn on the hash filter */ 1937 v &= ~GEM_MAC_RX_PROMISCUOUS; 1938 v |= GEM_MAC_RX_HASH_FILTER; 1939 | |
1940 /* 1941 * Set up multicast address filter by passing all multicast addresses | 2001 /* 2002 * Set up multicast address filter by passing all multicast addresses |
1942 * through a crc generator, and then using the high order 6 bits as an 1943 * index into the 256 bit logical address filter. The high order bit 1944 * selects the word, while the rest of the bits select the bit within 1945 * the word. | 2003 * through a crc generator, and then using the high order 8 bits as an 2004 * index into the 256 bit logical address filter. The high order 4 2005 * bits selects the word, while the other 4 bits select the bit within 2006 * the word (where bit 0 is the MSB). |
1946 */ 1947 | 2007 */ 2008 |
2009 /* Clear hash table */ 2010 memset(hash, 0, sizeof(hash)); 2011 |
|
1948 TAILQ_FOREACH(inm, &sc->sc_arpcom.ac_if.if_multiaddrs, ifma_link) { 1949 if (inm->ifma_addr->sa_family != AF_LINK) 1950 continue; 1951 sdl = (struct sockaddr_dl *)inm->ifma_addr; 1952 cp = LLADDR(sdl); 1953 crc = 0xffffffff; 1954 for (len = sdl->sdl_alen; --len >= 0;) { 1955 int octet = *cp++; --- 9 unchanged lines hidden (view full) --- 1965 } 1966 octet >>= 1; 1967 } 1968 } 1969 /* Just want the 8 most significant bits. */ 1970 crc >>= 24; 1971 1972 /* Set the corresponding bit in the filter. */ | 2012 TAILQ_FOREACH(inm, &sc->sc_arpcom.ac_if.if_multiaddrs, ifma_link) { 2013 if (inm->ifma_addr->sa_family != AF_LINK) 2014 continue; 2015 sdl = (struct sockaddr_dl *)inm->ifma_addr; 2016 cp = LLADDR(sdl); 2017 crc = 0xffffffff; 2018 for (len = sdl->sdl_alen; --len >= 0;) { 2019 int octet = *cp++; --- 9 unchanged lines hidden (view full) --- 2029 } 2030 octet >>= 1; 2031 } 2032 } 2033 /* Just want the 8 most significant bits. */ 2034 crc >>= 24; 2035 2036 /* Set the corresponding bit in the filter. */ |
1973 hash[crc >> 4] |= 1 << (crc & 0xf); | 2037 hash[crc >> 4] |= 1 << (15 - (crc & 15)); |
1974 } 1975 | 2038 } 2039 |
1976chipit: 1977 /* Now load the hash table into the chip */ 1978 bus_space_write_4(t, h, GEM_MAC_HASH0, hash[0]); 1979 bus_space_write_4(t, h, GEM_MAC_HASH1, hash[1]); 1980 bus_space_write_4(t, h, GEM_MAC_HASH2, hash[2]); 1981 bus_space_write_4(t, h, GEM_MAC_HASH3, hash[3]); 1982 bus_space_write_4(t, h, GEM_MAC_HASH4, hash[4]); 1983 bus_space_write_4(t, h, GEM_MAC_HASH5, hash[5]); 1984 bus_space_write_4(t, h, GEM_MAC_HASH6, hash[6]); 1985 bus_space_write_4(t, h, GEM_MAC_HASH7, hash[7]); 1986 bus_space_write_4(t, h, GEM_MAC_HASH8, hash[8]); 1987 bus_space_write_4(t, h, GEM_MAC_HASH9, hash[9]); 1988 bus_space_write_4(t, h, GEM_MAC_HASH10, hash[10]); 1989 bus_space_write_4(t, h, GEM_MAC_HASH11, hash[11]); 1990 bus_space_write_4(t, h, GEM_MAC_HASH12, hash[12]); 1991 bus_space_write_4(t, h, GEM_MAC_HASH13, hash[13]); 1992 bus_space_write_4(t, h, GEM_MAC_HASH14, hash[14]); 1993 bus_space_write_4(t, h, GEM_MAC_HASH15, hash[15]); | 2040 v |= GEM_MAC_RX_HASH_FILTER; 2041 ifp->if_flags &= ~IFF_ALLMULTI; |
1994 | 2042 |
2043 /* Now load the hash table into the chip (if we are using it) */ 2044 for (i = 0; i < 16; i++) { 2045 bus_space_write_4(t, h, 2046 GEM_MAC_HASH0 + i * (GEM_MAC_HASH1-GEM_MAC_HASH0), 2047 hash[i]); 2048 } 2049 2050chipit: |
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1995 bus_space_write_4(t, h, GEM_MAC_RX_CONFIG, v); 1996} 1997 1998#if notyet 1999 2000/* 2001 * gem_power: 2002 * --- 34 unchanged lines hidden --- | 2051 bus_space_write_4(t, h, GEM_MAC_RX_CONFIG, v); 2052} 2053 2054#if notyet 2055 2056/* 2057 * gem_power: 2058 * --- 34 unchanged lines hidden --- |