if_fxpreg.h (113026) | if_fxpreg.h (113151) |
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1/* 2 * Copyright (c) 1995, David Greenman 3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 11 unchanged lines hidden (view full) --- 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * | 1/* 2 * Copyright (c) 1995, David Greenman 3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 11 unchanged lines hidden (view full) --- 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * |
28 * $FreeBSD: head/sys/dev/fxp/if_fxpreg.h 113026 2003-04-03 18:39:48Z mux $ | 28 * $FreeBSD: head/sys/dev/fxp/if_fxpreg.h 113151 2003-04-05 23:46:58Z mux $ |
29 */ 30 31#define FXP_VENDORID_INTEL 0x8086 32 33#define FXP_PCI_MMBA 0x10 34#define FXP_PCI_IOBA 0x14 35 36/* --- 79 unchanged lines hidden (view full) --- 116 u_int32_t link_addr; 117}; 118struct fxp_cb_ias { 119 u_int16_t cb_status; 120 u_int16_t cb_command; 121 u_int32_t link_addr; 122 u_int8_t macaddr[6]; 123}; | 29 */ 30 31#define FXP_VENDORID_INTEL 0x8086 32 33#define FXP_PCI_MMBA 0x10 34#define FXP_PCI_IOBA 0x14 35 36/* --- 79 unchanged lines hidden (view full) --- 116 u_int32_t link_addr; 117}; 118struct fxp_cb_ias { 119 u_int16_t cb_status; 120 u_int16_t cb_command; 121 u_int32_t link_addr; 122 u_int8_t macaddr[6]; 123}; |
124 |
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124/* I hate bit-fields :-( */ | 125/* I hate bit-fields :-( */ |
126#if BYTE_ORDER == LITTLE_ENDIAN 127#define __FXP_BITFIELD2(a, b) a, b 128#define __FXP_BITFIELD3(a, b, c) a, b, c 129#define __FXP_BITFIELD4(a, b, c, d) a, b, c, d 130#define __FXP_BITFIELD5(a, b, c, d, e) a, b, c, d, e 131#define __FXP_BITFIELD6(a, b, c, d, e, f) a, b, c, d, e, f 132#define __FXP_BITFIELD7(a, b, c, d, e, f, g) a, b, c, d, e, f, g 133#define __FXP_BITFIELD8(a, b, c, d, e, f, g, h) a, b, c, d, e, f, g, h 134#else 135#define __FXP_BITFIELD2(a, b) b, a 136#define __FXP_BITFIELD3(a, b, c) c, b, a 137#define __FXP_BITFIELD4(a, b, c, d) d, c, b, a 138#define __FXP_BITFIELD5(a, b, c, d, e) e, d, c, b, a 139#define __FXP_BITFIELD6(a, b, c, d, e, f) f, e, d, c, b, a 140#define __FXP_BITFIELD7(a, b, c, d, e, f, g) g, f, e, d, c, b, a 141#define __FXP_BITFIELD8(a, b, c, d, e, f, g, h) h, g, f, e, d, c, b, a 142#endif 143 |
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125struct fxp_cb_config { 126 u_int16_t cb_status; 127 u_int16_t cb_command; 128 u_int32_t link_addr; | 144struct fxp_cb_config { 145 u_int16_t cb_status; 146 u_int16_t cb_command; 147 u_int32_t link_addr; |
129 u_int byte_count:6, 130 :2; 131 u_int rx_fifo_limit:4, 132 tx_fifo_limit:3, 133 :1; | 148 149 /* Bytes 0 - 21 -- common to all i8255x */ 150 u_int8_t __FXP_BITFIELD2(byte_count:6, :2); 151 u_int8_t __FXP_BITFIELD3(rx_fifo_limit:4, tx_fifo_limit:3, :1); |
134 u_int8_t adaptive_ifs; | 152 u_int8_t adaptive_ifs; |
135 u_int mwi_enable:1, /* 8,9 */ 136 type_enable:1, /* 8,9 */ 137 read_align_en:1, /* 8,9 */ 138 end_wr_on_cl:1, /* 8,9 */ 139 :4; 140 u_int rx_dma_bytecount:7, 141 :1; 142 u_int tx_dma_bytecount:7, 143 dma_mbce:1; 144 u_int late_scb:1, /* 7 */ 145 direct_dma_dis:1, /* 8,9 */ 146 tno_int_or_tco_en:1, /* 7,9 */ 147 ci_int:1, 148 ext_txcb_dis:1, /* 8,9 */ 149 ext_stats_dis:1, /* 8,9 */ 150 keep_overrun_rx:1, 151 save_bf:1; 152 u_int disc_short_rx:1, 153 underrun_retry:2, 154 :2, 155 ext_rfa:1, /* 550 */ 156 two_frames:1, /* 8,9 */ 157 dyn_tbd:1; /* 8,9 */ 158 u_int mediatype:1, /* 7 */ 159 :6, 160 csma_dis:1; /* 8,9 */ 161 u_int tcp_udp_cksum:1, /* 9 */ 162 :3, 163 vlan_tco:1, /* 8,9 */ 164 link_wake_en:1, /* 8,9 */ 165 arp_wake_en:1, /* 8 */ 166 mc_wake_en:1; /* 8 */ 167 u_int :3, 168 nsai:1, 169 preamble_length:2, 170 loopback:2; 171 u_int linear_priority:3, /* 7 */ 172 :5; 173 u_int linear_pri_mode:1, /* 7 */ 174 :3, 175 interfrm_spacing:4; 176 u_int :8; 177 u_int :8; 178 u_int promiscuous:1, 179 bcast_disable:1, 180 wait_after_win:1, /* 8,9 */ 181 :1, 182 ignore_ul:1, /* 8,9 */ 183 crc16_en:1, /* 9 */ 184 :1, 185 crscdt:1; 186 u_int fc_delay_lsb:8; /* 8,9 */ 187 u_int fc_delay_msb:8; /* 8,9 */ 188 u_int stripping:1, 189 padding:1, 190 rcv_crc_xfer:1, 191 long_rx_en:1, /* 8,9 */ 192 pri_fc_thresh:3, /* 8,9 */ 193 :1; 194 u_int ia_wake_en:1, /* 8 */ 195 magic_pkt_dis:1, /* 8,9,!9ER */ 196 tx_fc_dis:1, /* 8,9 */ 197 rx_fc_restop:1, /* 8,9 */ 198 rx_fc_restart:1, /* 8,9 */ 199 fc_filter:1, /* 8,9 */ 200 force_fdx:1, 201 fdx_pin_en:1; 202 u_int :5, 203 pri_fc_loc:1, /* 8,9 */ 204 multi_ia:1, 205 :1; 206 u_int :3, 207 mc_all:1, 208 :4; 209 u_int8_t gamla_rx:1; /* 550 */ 210 u_int8_t pad[9]; /* 550 */ | 153 u_int8_t __FXP_BITFIELD5(mwi_enable:1, /* 8,9 */ 154 type_enable:1, /* 8,9 */ 155 read_align_en:1, /* 8,9 */ 156 end_wr_on_cl:1, /* 8,9 */ 157 :4); 158 u_int8_t __FXP_BITFIELD2(rx_dma_bytecount:7, :1); 159 u_int8_t __FXP_BITFIELD2(tx_dma_bytecount:7, dma_mbce:1); 160 u_int8_t __FXP_BITFIELD8(late_scb:1, /* 7 */ 161 direct_dma_dis:1, /* 8,9 */ 162 tno_int_or_tco_en:1, /* 7,9 */ 163 ci_int:1, 164 ext_txcb_dis:1, /* 8,9 */ 165 ext_stats_dis:1, /* 8,9 */ 166 keep_overrun_rx:1, 167 save_bf:1); 168 u_int8_t __FXP_BITFIELD6(disc_short_rx:1, 169 underrun_retry:2, 170 :2, 171 ext_rfa:1, /* 550 */ 172 two_frames:1, /* 8,9 */ 173 dyn_tbd:1); /* 8,9 */ 174 u_int8_t __FXP_BITFIELD3(mediatype:1, /* 7 */ 175 :6, 176 csma_dis:1); /* 8,9 */ 177 u_int8_t __FXP_BITFIELD6(tcp_udp_cksum:1, /* 9 */ 178 :3, 179 vlan_tco:1, /* 8,9 */ 180 link_wake_en:1, /* 8,9 */ 181 arp_wake_en:1, /* 8 */ 182 mc_wake_en:1); /* 8 */ 183 u_int8_t __FXP_BITFIELD4(:3, 184 nsai:1, 185 preamble_length:2, 186 loopback:2); 187 u_int8_t __FXP_BITFIELD2(linear_priority:3, /* 7 */ 188 :5); 189 u_int8_t __FXP_BITFIELD3(linear_pri_mode:1, /* 7 */ 190 :3, 191 interfrm_spacing:4); 192 u_int8_t :8; 193 u_int8_t :8; 194 u_int8_t __FXP_BITFIELD8(promiscuous:1, 195 bcast_disable:1, 196 wait_after_win:1, /* 8,9 */ 197 :1, 198 ignore_ul:1, /* 8,9 */ 199 crc16_en:1, /* 9 */ 200 :1, 201 crscdt:1); 202 u_int8_t fc_delay_lsb:8; /* 8,9 */ 203 u_int8_t fc_delay_msb:8; /* 8,9 */ 204 u_int8_t __FXP_BITFIELD6(stripping:1, 205 padding:1, 206 rcv_crc_xfer:1, 207 long_rx_en:1, /* 8,9 */ 208 pri_fc_thresh:3, /* 8,9 */ 209 :1); 210 u_int8_t __FXP_BITFIELD8(ia_wake_en:1, /* 8 */ 211 magic_pkt_dis:1, /* 8,9,!9ER */ 212 tx_fc_dis:1, /* 8,9 */ 213 rx_fc_restop:1, /* 8,9 */ 214 rx_fc_restart:1, /* 8,9 */ 215 fc_filter:1, /* 8,9 */ 216 force_fdx:1, 217 fdx_pin_en:1); 218 u_int8_t __FXP_BITFIELD4(:5, 219 pri_fc_loc:1, /* 8,9 */ 220 multi_ia:1, 221 :1); 222 u_int8_t __FXP_BITFIELD3(:3, mc_all:1, :4); 223 224 /* Bytes 22 - 31 -- i82550 only */ 225 u_int8_t __FXP_BITFIELD3(gamla_rx:1, 226 vlan_drop_en:1, 227 :6); 228 u_int8_t pad[9]; |
211}; 212 213#define MAXMCADDR 80 214struct fxp_cb_mcs { 215 u_int16_t cb_status; 216 u_int16_t cb_command; 217 u_int32_t link_addr; 218 u_int16_t mc_cnt; --- 234 unchanged lines hidden --- | 229}; 230 231#define MAXMCADDR 80 232struct fxp_cb_mcs { 233 u_int16_t cb_status; 234 u_int16_t cb_command; 235 u_int32_t link_addr; 236 u_int16_t mc_cnt; --- 234 unchanged lines hidden --- |