1/*
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/fxp/if_fxpreg.h 113026 2003-04-03 18:39:48Z mux $
29 */
30
31#define FXP_VENDORID_INTEL 0x8086
32
33#define FXP_PCI_MMBA 0x10
34#define FXP_PCI_IOBA 0x14
35
36/*

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116 u_int32_t link_addr;
117};
118struct fxp_cb_ias {
119 u_int16_t cb_status;
120 u_int16_t cb_command;
121 u_int32_t link_addr;
122 u_int8_t macaddr[6];
123};
124/* I hate bit-fields :-( */
125struct fxp_cb_config {
126 u_int16_t cb_status;
127 u_int16_t cb_command;
128 u_int32_t link_addr;
129 u_int byte_count:6,
130 :2;
131 u_int rx_fifo_limit:4,
132 tx_fifo_limit:3,
133 :1;
134 u_int8_t adaptive_ifs;
135 u_int mwi_enable:1, /* 8,9 */
136 type_enable:1, /* 8,9 */
137 read_align_en:1, /* 8,9 */
138 end_wr_on_cl:1, /* 8,9 */
139 :4;
140 u_int rx_dma_bytecount:7,
141 :1;
142 u_int tx_dma_bytecount:7,
143 dma_mbce:1;
144 u_int late_scb:1, /* 7 */
145 direct_dma_dis:1, /* 8,9 */
146 tno_int_or_tco_en:1, /* 7,9 */
147 ci_int:1,
148 ext_txcb_dis:1, /* 8,9 */
149 ext_stats_dis:1, /* 8,9 */
150 keep_overrun_rx:1,
151 save_bf:1;
152 u_int disc_short_rx:1,
153 underrun_retry:2,
154 :2,
155 ext_rfa:1, /* 550 */
156 two_frames:1, /* 8,9 */
157 dyn_tbd:1; /* 8,9 */
158 u_int mediatype:1, /* 7 */
159 :6,
160 csma_dis:1; /* 8,9 */
161 u_int tcp_udp_cksum:1, /* 9 */
162 :3,
163 vlan_tco:1, /* 8,9 */
164 link_wake_en:1, /* 8,9 */
165 arp_wake_en:1, /* 8 */
166 mc_wake_en:1; /* 8 */
167 u_int :3,
168 nsai:1,
169 preamble_length:2,
170 loopback:2;
171 u_int linear_priority:3, /* 7 */
172 :5;
173 u_int linear_pri_mode:1, /* 7 */
174 :3,
175 interfrm_spacing:4;
176 u_int :8;
177 u_int :8;
178 u_int promiscuous:1,
179 bcast_disable:1,
180 wait_after_win:1, /* 8,9 */
181 :1,
182 ignore_ul:1, /* 8,9 */
183 crc16_en:1, /* 9 */
184 :1,
185 crscdt:1;
186 u_int fc_delay_lsb:8; /* 8,9 */
187 u_int fc_delay_msb:8; /* 8,9 */
188 u_int stripping:1,
189 padding:1,
190 rcv_crc_xfer:1,
191 long_rx_en:1, /* 8,9 */
192 pri_fc_thresh:3, /* 8,9 */
193 :1;
194 u_int ia_wake_en:1, /* 8 */
195 magic_pkt_dis:1, /* 8,9,!9ER */
196 tx_fc_dis:1, /* 8,9 */
197 rx_fc_restop:1, /* 8,9 */
198 rx_fc_restart:1, /* 8,9 */
199 fc_filter:1, /* 8,9 */
200 force_fdx:1,
201 fdx_pin_en:1;
202 u_int :5,
203 pri_fc_loc:1, /* 8,9 */
204 multi_ia:1,
205 :1;
206 u_int :3,
207 mc_all:1,
208 :4;
209 u_int8_t gamla_rx:1; /* 550 */
210 u_int8_t pad[9]; /* 550 */
211};
212
213#define MAXMCADDR 80
214struct fxp_cb_mcs {
215 u_int16_t cb_status;
216 u_int16_t cb_command;
217 u_int32_t link_addr;
218 u_int16_t mc_cnt;

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