Deleted Added
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if_fxp.c (74180) if_fxp.c (74259)
1/*-
1/*-
2 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
3 * Copyright (c) 1995, David Greenman
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.

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20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.

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20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 74180 2001-03-12 21:42:45Z jlemon $
28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 74259 2001-03-14 19:50:35Z jlemon $
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>

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427 }
428
429 /*
430 * Find out how large of an SEEPROM we have.
431 */
432 fxp_autosize_eeprom(sc);
433
434 /*
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>

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427 }
428
429 /*
430 * Find out how large of an SEEPROM we have.
431 */
432 fxp_autosize_eeprom(sc);
433
434 /*
435 * Determine in whether we must use the 503 serial interface.
435 * Determine whether we must use the 503 serial interface.
436 */
437 fxp_read_eeprom(sc, &data, 6, 1);
438 if ((data & FXP_PHY_DEVICE_MASK) != 0 &&
439 (data & FXP_PHY_SERIAL_ONLY))
440 sc->flags &= FXP_FLAG_SERIAL_MEDIA;
441
442 /*
436 */
437 fxp_read_eeprom(sc, &data, 6, 1);
438 if ((data & FXP_PHY_DEVICE_MASK) != 0 &&
439 (data & FXP_PHY_SERIAL_ONLY))
440 sc->flags &= FXP_FLAG_SERIAL_MEDIA;
441
442 /*
443 * Find out the basic controller type; we currently only
444 * differentiate between a 82557 and greater.
445 */
446 fxp_read_eeprom(sc, &data, 5, 1);
447 if ((data >> 8) == 1)
448 sc->chip = FXP_CHIP_82557;
449
450 /*
451 * If we are not a 82557 chip, we can enable extended features.
452 */
453 if (sc->chip != FXP_CHIP_82557) {
454 /*
455 * If there is a valid cacheline size (8 or 16 dwords),
456 * then turn on MWI.
457 */
458 if (pci_read_config(dev, PCIR_CACHELNSZ, 1) != 0)
459 sc->flags |= FXP_FLAG_MWI_ENABLE;
460
461 /* turn on the extended TxCB feature */
462 sc->flags |= FXP_FLAG_EXT_TXCB;
463 }
464
465 /*
443 * Read MAC address.
444 */
445 fxp_read_eeprom(sc, (u_int16_t *)sc->arpcom.ac_enaddr, 0, 3);
446 device_printf(dev, "Ethernet address %6D%s\n",
447 sc->arpcom.ac_enaddr, ":",
448 sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : "");
449 if (bootverbose) {
450 device_printf(dev, "PCI IDs: %04x %04x %04x %04x\n",

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512
513/*
514 * release all resources
515 */
516static void
517fxp_release(struct fxp_softc *sc)
518{
519
466 * Read MAC address.
467 */
468 fxp_read_eeprom(sc, (u_int16_t *)sc->arpcom.ac_enaddr, 0, 3);
469 device_printf(dev, "Ethernet address %6D%s\n",
470 sc->arpcom.ac_enaddr, ":",
471 sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : "");
472 if (bootverbose) {
473 device_printf(dev, "PCI IDs: %04x %04x %04x %04x\n",

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535
536/*
537 * release all resources
538 */
539static void
540fxp_release(struct fxp_softc *sc)
541{
542
520 if (sc->miibus) {
521 bus_generic_detach(sc->dev);
543 bus_generic_detach(sc->dev);
544 if (sc->miibus)
522 device_delete_child(sc->dev, sc->miibus);
545 device_delete_child(sc->dev, sc->miibus);
523 }
524
525 if (sc->cbl_base)
526 free(sc->cbl_base, M_DEVBUF);
527 if (sc->fxp_stats)
528 free(sc->fxp_stats, M_DEVBUF);
529 if (sc->mcsp)
530 free(sc->mcsp, M_DEVBUF);
531 if (sc->rfa_headm)

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833 txp->tbd[segment].tb_size = m->m_len;
834 segment++;
835 }
836 }
837 if (m != NULL) {
838 struct mbuf *mn;
839
840 /*
546
547 if (sc->cbl_base)
548 free(sc->cbl_base, M_DEVBUF);
549 if (sc->fxp_stats)
550 free(sc->fxp_stats, M_DEVBUF);
551 if (sc->mcsp)
552 free(sc->mcsp, M_DEVBUF);
553 if (sc->rfa_headm)

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855 txp->tbd[segment].tb_size = m->m_len;
856 segment++;
857 }
858 }
859 if (m != NULL) {
860 struct mbuf *mn;
861
862 /*
841 * We ran out of segments. We have to recopy this mbuf
842 * chain first. Bail out if we can't get the new buffers.
863 * We ran out of segments. We have to recopy this
864 * mbuf chain first. Bail out if we can't get the
865 * new buffers.
843 */
844 MGETHDR(mn, M_DONTWAIT, MT_DATA);
845 if (mn == NULL) {
846 m_freem(mb_head);
847 break;
848 }
849 if (mb_head->m_pkthdr.len > MHLEN) {
850 MCLGET(mn, M_DONTWAIT);

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862 goto tbdinit;
863 }
864
865 txp->tbd_number = segment;
866 txp->mb_head = mb_head;
867 txp->cb_status = 0;
868 if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
869 txp->cb_command =
866 */
867 MGETHDR(mn, M_DONTWAIT, MT_DATA);
868 if (mn == NULL) {
869 m_freem(mb_head);
870 break;
871 }
872 if (mb_head->m_pkthdr.len > MHLEN) {
873 MCLGET(mn, M_DONTWAIT);

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885 goto tbdinit;
886 }
887
888 txp->tbd_number = segment;
889 txp->mb_head = mb_head;
890 txp->cb_status = 0;
891 if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
892 txp->cb_command =
870 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
893 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
894 FXP_CB_COMMAND_S;
871 } else {
872 txp->cb_command =
895 } else {
896 txp->cb_command =
873 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
897 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
898 FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
874 /*
899 /*
875 * Set a 5 second timer just in case we don't hear from the
876 * card again.
900 * Set a 5 second timer just in case we don't hear
901 * from the card again.
877 */
878 ifp->if_timer = 5;
879 }
880 txp->tx_threshold = tx_threshold;
881
882 /*
883 * Advance the end of list forward.
884 */

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1323 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
1324 cbp->promiscuous = prm; /* promiscuous mode */
1325 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
1326 cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/
1327 cbp->ignore_ul = 0; /* consider U/L bit in IA matching */
1328 cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */
1329 cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0;
1330
902 */
903 ifp->if_timer = 5;
904 }
905 txp->tx_threshold = tx_threshold;
906
907 /*
908 * Advance the end of list forward.
909 */

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1348 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
1349 cbp->promiscuous = prm; /* promiscuous mode */
1350 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
1351 cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/
1352 cbp->ignore_ul = 0; /* consider U/L bit in IA matching */
1353 cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */
1354 cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0;
1355
1331 /*
1332 * we may want to move all FC stuff to a separate section.
1333 * the values here are 82557 compatible.
1334 */
1335 cbp->fc_delay_lsb = 0;
1336 cbp->fc_delay_msb = 0x40;
1337 cbp->pri_fc_thresh = 0x03;
1338 cbp->tx_fc_dis = 0; /* (don't) disable transmit FC */
1339 cbp->rx_fc_restop = 0; /* (don't) enable FC stop frame */
1340 cbp->rx_fc_restart = 0; /* (don't) enable FC start frame */
1341 cbp->fc_filter = 0; /* (do) pass FC frames to host */
1342 cbp->pri_fc_loc = 1; /* location of priority in FC frame */
1343
1344 cbp->stripping = !prm; /* truncate rx packet to byte count */
1345 cbp->padding = 1; /* (do) pad short tx packets */
1346 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
1347 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0;
1348 cbp->ia_wake_en = 0; /* (don't) wake up on address match */
1349 cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */
1350 /* must set wake_en in PMCSR also */
1351 cbp->force_fdx = 0; /* (don't) force full duplex */
1352 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
1353 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
1354 cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0;
1355
1356 cbp->stripping = !prm; /* truncate rx packet to byte count */
1357 cbp->padding = 1; /* (do) pad short tx packets */
1358 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
1359 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0;
1360 cbp->ia_wake_en = 0; /* (don't) wake up on address match */
1361 cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */
1362 /* must set wake_en in PMCSR also */
1363 cbp->force_fdx = 0; /* (don't) force full duplex */
1364 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
1365 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
1366 cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0;
1367
1368 if (sc->chip == FXP_CHIP_82557) {
1369 /*
1370 * The 82557 has no hardware flow control, the values
1371 * below are the defaults for the chip.
1372 */
1373 cbp->fc_delay_lsb = 0;
1374 cbp->fc_delay_msb = 0x40;
1375 cbp->pri_fc_thresh = 3;
1376 cbp->tx_fc_dis = 0;
1377 cbp->rx_fc_restop = 0;
1378 cbp->rx_fc_restart = 0;
1379 cbp->fc_filter = 0;
1380 cbp->pri_fc_loc = 1;
1381 } else {
1382 cbp->fc_delay_lsb = 0x1f;
1383 cbp->fc_delay_msb = 0x01;
1384 cbp->pri_fc_thresh = 3;
1385 cbp->tx_fc_dis = 0; /* enable transmit FC */
1386 cbp->rx_fc_restop = 1; /* enable FC restop frames */
1387 cbp->rx_fc_restart = 1; /* enable FC restart frames */
1388 cbp->fc_filter = !prm; /* drop FC frames to host */
1389 cbp->pri_fc_loc = 1; /* FC pri location (byte31) */
1390 }
1391
1356 /*
1357 * Start the config command/DMA.
1358 */
1359 fxp_scb_wait(sc);
1360 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1361 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1362 /* ...and wait for it to complete. */
1363 fxp_dma_wait(&cbp->cb_status, sc);

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1386 * Initialize transmit control block (TxCB) list.
1387 */
1388
1389 txp = sc->cbl_base;
1390 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1391 for (i = 0; i < FXP_NTXCB; i++) {
1392 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1393 txp[i].cb_command = FXP_CB_COMMAND_NOP;
1392 /*
1393 * Start the config command/DMA.
1394 */
1395 fxp_scb_wait(sc);
1396 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1397 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
1398 /* ...and wait for it to complete. */
1399 fxp_dma_wait(&cbp->cb_status, sc);

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1422 * Initialize transmit control block (TxCB) list.
1423 */
1424
1425 txp = sc->cbl_base;
1426 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1427 for (i = 0; i < FXP_NTXCB; i++) {
1428 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1429 txp[i].cb_command = FXP_CB_COMMAND_NOP;
1394 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1395 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1430 txp[i].link_addr =
1431 vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1432 if (sc->flags & FXP_FLAG_EXT_TXCB)
1433 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[2]);
1434 else
1435 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1396 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1397 }
1398 /*
1399 * Set the suspend flag on the first TxCB and start the control
1400 * unit. It will execute the NOP and then suspend.
1401 */
1402 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1403 sc->cbl_first = sc->cbl_last = txp;

--- 391 unchanged lines hidden ---
1436 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1437 }
1438 /*
1439 * Set the suspend flag on the first TxCB and start the control
1440 * unit. It will execute the NOP and then suspend.
1441 */
1442 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1443 sc->cbl_first = sc->cbl_last = txp;

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