1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 *
| 1/* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 *
|
| 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 *
|
5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 *
| 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 *
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27 * $Id: if_fxp.c,v 1.37 1997/07/25 23:41:12 davidg Exp $
| 30 * $Id$
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28 */ 29 30/* 31 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 32 */ 33 34#include "bpfilter.h" 35 36#include <sys/param.h> 37#include <sys/systm.h>
| 31 */ 32 33/* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37#include "bpfilter.h" 38 39#include <sys/param.h> 40#include <sys/systm.h>
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38#include <sys/sockio.h>
| |
39#include <sys/mbuf.h> 40#include <sys/malloc.h> 41#include <sys/kernel.h> 42#include <sys/socket.h> 43#include <sys/syslog.h> 44 45#include <net/if.h>
| 41#include <sys/mbuf.h> 42#include <sys/malloc.h> 43#include <sys/kernel.h> 44#include <sys/socket.h> 45#include <sys/syslog.h> 46 47#include <net/if.h>
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| 48#include <net/if_media.h>
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46 47#ifdef INET 48#include <netinet/in.h>
| 49 50#ifdef INET 51#include <netinet/in.h>
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49#include <netinet/if_ether.h>
| |
50#endif 51 52#ifdef NS 53#include <netns/ns.h> 54#include <netns/ns_if.h> 55#endif 56 57#if NBPFILTER > 0 58#include <net/bpf.h> 59#endif 60
| 52#endif 53 54#ifdef NS 55#include <netns/ns.h> 56#include <netns/ns_if.h> 57#endif 58 59#if NBPFILTER > 0 60#include <net/bpf.h> 61#endif 62
|
| 63#if defined(__NetBSD__) 64 65#include <sys/ioctl.h> 66#include <sys/errno.h> 67#include <sys/device.h> 68 69#include <net/if_dl.h> 70#include <net/if_ether.h> 71 72#include <netinet/if_inarp.h> 73 74#include <vm/vm.h> 75 76#include <machine/cpu.h> 77#include <machine/bus.h> 78#include <machine/intr.h> 79 80#include <dev/pci/if_fxpreg.h> 81#include <dev/pci/if_fxpvar.h> 82 83#include <dev/pci/pcivar.h> 84#include <dev/pci/pcireg.h> 85#include <dev/pci/pcidevs.h> 86 87#ifdef __alpha__ /* XXX */ 88/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 89#undef vtophys 90#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 91#endif /* __alpha__ */ 92 93#else /* __FreeBSD__ */ 94 95#include <sys/sockio.h> 96 97#include <netinet/if_ether.h> 98
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61#include <vm/vm.h> /* for vtophys */ 62#include <vm/pmap.h> /* for vtophys */ 63#include <machine/clock.h> /* for DELAY */ 64 65#include <pci/pcivar.h> 66#include <pci/if_fxpreg.h>
| 99#include <vm/vm.h> /* for vtophys */ 100#include <vm/pmap.h> /* for vtophys */ 101#include <machine/clock.h> /* for DELAY */ 102 103#include <pci/pcivar.h> 104#include <pci/if_fxpreg.h>
|
| 105#include <pci/if_fxpvar.h>
|
67
| 106
|
68struct fxp_softc { 69 struct arpcom arpcom; /* per-interface network data */ 70 struct fxp_csr *csr; /* control/status registers */ 71 struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 72 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 73 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 74 struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 75 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 76 struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 77 int tx_queued; /* # of active TxCB's */ 78 int promisc_mode; /* promiscuous mode enabled */ 79 int phy_primary_addr; /* address of primary PHY */ 80 int phy_primary_device; /* device type of primary PHY */ 81 int phy_10Mbps_only; /* PHY is 10Mbps-only device */ 82};
| 107#endif /* __NetBSD__ */
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83
| 108
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84static u_long fxp_count;
| 109/* 110 * NOTE! On the Alpha, we have an alignment constraint. The 111 * card DMAs the packet immediately following the RFA. However, 112 * the first thing in the packet is a 14-byte Ethernet header. 113 * This means that the packet is misaligned. To compensate, 114 * we actually offset the RFA 2 bytes into the cluster. This 115 * alignes the packet after the Ethernet header at a 32-bit 116 * boundary. HOWEVER! This means that the RFA is misaligned! 117 */ 118#define RFA_ALIGNMENT_FUDGE 2
|
85 86/*
| 119 120/*
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| 121 * Inline function to copy a 16-bit aligned 32-bit quantity. 122 */ 123static __inline void fxp_lwcopy __P((volatile u_int32_t *, 124 volatile u_int32_t *)); 125static __inline void 126fxp_lwcopy(src, dst) 127 volatile u_int32_t *src, *dst; 128{ 129 volatile u_int16_t *a = (u_int16_t *)src; 130 volatile u_int16_t *b = (u_int16_t *)dst; 131 132 b[0] = a[0]; 133 b[1] = a[1]; 134} 135 136/*
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87 * Template for default configuration parameters. 88 * See struct fxp_cb_config for the bit definitions. 89 */ 90static u_char fxp_cb_config_template[] = { 91 0x0, 0x0, /* cb_status */ 92 0x80, 0x2, /* cb_command */ 93 0xff, 0xff, 0xff, 0xff, /* link_addr */ 94 0x16, /* 0 */ 95 0x8, /* 1 */ 96 0x0, /* 2 */ 97 0x0, /* 3 */ 98 0x0, /* 4 */ 99 0x80, /* 5 */ 100 0xb2, /* 6 */ 101 0x3, /* 7 */ 102 0x1, /* 8 */ 103 0x0, /* 9 */ 104 0x26, /* 10 */ 105 0x0, /* 11 */ 106 0x60, /* 12 */ 107 0x0, /* 13 */ 108 0xf2, /* 14 */ 109 0x48, /* 15 */ 110 0x0, /* 16 */ 111 0x40, /* 17 */ 112 0xf3, /* 18 */ 113 0x0, /* 19 */ 114 0x3f, /* 20 */ 115 0x5, /* 21 */ 116 0x0, 0x0 117}; 118
| 137 * Template for default configuration parameters. 138 * See struct fxp_cb_config for the bit definitions. 139 */ 140static u_char fxp_cb_config_template[] = { 141 0x0, 0x0, /* cb_status */ 142 0x80, 0x2, /* cb_command */ 143 0xff, 0xff, 0xff, 0xff, /* link_addr */ 144 0x16, /* 0 */ 145 0x8, /* 1 */ 146 0x0, /* 2 */ 147 0x0, /* 3 */ 148 0x0, /* 4 */ 149 0x80, /* 5 */ 150 0xb2, /* 6 */ 151 0x3, /* 7 */ 152 0x1, /* 8 */ 153 0x0, /* 9 */ 154 0x26, /* 10 */ 155 0x0, /* 11 */ 156 0x60, /* 12 */ 157 0x0, /* 13 */ 158 0xf2, /* 14 */ 159 0x48, /* 15 */ 160 0x0, /* 16 */ 161 0x40, /* 17 */ 162 0xf3, /* 18 */ 163 0x0, /* 19 */ 164 0x3f, /* 20 */ 165 0x5, /* 21 */ 166 0x0, 0x0 167}; 168
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119static inline void fxp_scb_wait __P((struct fxp_csr *)); 120static char *fxp_probe __P((pcici_t, pcidi_t)); 121static void fxp_attach __P((pcici_t, int)); 122static void fxp_intr __P((void *));
| 169/* Supported media types. */ 170struct fxp_supported_media { 171 const int fsm_phy; /* PHY type */ 172 const int *fsm_media; /* the media array */ 173 const int fsm_nmedia; /* the number of supported media */ 174 const int fsm_defmedia; /* default media for this PHY */ 175}; 176 177const int fxp_media_standard[] = { 178 IFM_ETHER|IFM_10_T, 179 IFM_ETHER|IFM_10_T|IFM_FDX, 180 IFM_ETHER|IFM_100_TX, 181 IFM_ETHER|IFM_100_TX|IFM_FDX, 182 IFM_ETHER|IFM_AUTO, 183}; 184#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 185 186const int fxp_media_default[] = { 187 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 188}; 189#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 190 191const struct fxp_supported_media fxp_media[] = { 192 { FXP_PHY_DP83840, fxp_media_standard, 193 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 194 FXP_MEDIA_STANDARD_DEFMEDIA }, 195 { FXP_PHY_DP83840A, fxp_media_standard, 196 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 197 FXP_MEDIA_STANDARD_DEFMEDIA }, 198 { FXP_PHY_82555, fxp_media_standard, 199 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 200 FXP_MEDIA_STANDARD_DEFMEDIA }, 201 { FXP_PHY_80C24, fxp_media_default, 202 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 203 FXP_MEDIA_DEFAULT_DEFMEDIA }, 204}; 205#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 206 207static int fxp_mediachange __P((struct ifnet *)); 208static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 209 210void fxp_set_media __P((struct fxp_softc *, int)); 211 212static inline void fxp_scb_wait __P((struct fxp_softc *)); 213static FXP_INTR_TYPE fxp_intr __P((void *));
|
123static void fxp_start __P((struct ifnet *));
| 214static void fxp_start __P((struct ifnet *));
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124static int fxp_ioctl __P((struct ifnet *, int, caddr_t));
| 215static int fxp_ioctl __P((struct ifnet *, 216 FXP_IOCTLCMD_TYPE, caddr_t));
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125static void fxp_init __P((void *)); 126static void fxp_stop __P((struct fxp_softc *)); 127static void fxp_watchdog __P((struct ifnet *)); 128static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
| 217static void fxp_init __P((void *)); 218static void fxp_stop __P((struct fxp_softc *)); 219static void fxp_watchdog __P((struct ifnet *)); 220static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
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129static void fxp_shutdown __P((int, void *)); 130static int fxp_mdi_read __P((struct fxp_csr *, int, int)); 131static void fxp_mdi_write __P((struct fxp_csr *, int, int, int)); 132static void fxp_read_eeprom __P((struct fxp_csr *, u_short *, int, int));
| 221static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 222static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 223static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 224 int, int)); 225static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *));
|
133
| 226
|
| 227void fxp_stats_update __P((void *));
|
134
| 228
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135timeout_t fxp_stats_update; 136 137static struct pci_device fxp_device = { 138 "fxp", 139 fxp_probe, 140 fxp_attach, 141 &fxp_count, 142 NULL 143}; 144DATA_SET(pcidevice_set, fxp_device); 145
| |
146/* 147 * Set initial transmit threshold at 64 (512 bytes). This is 148 * increased by 64 (512 bytes) at a time, to maximum of 192 149 * (1536 bytes), if an underrun occurs. 150 */ 151static int tx_threshold = 64; 152 153/* 154 * Number of transmit control blocks. This determines the number 155 * of transmit buffers that can be chained in the CB list. 156 * This must be a power of two. 157 */ 158#define FXP_NTXCB 128 159 160/* 161 * TxCB list index mask. This is used to do list wrap-around. 162 */ 163#define FXP_TXCB_MASK (FXP_NTXCB - 1) 164 165/* 166 * Number of DMA segments in a TxCB. Note that this is carefully 167 * chosen to make the total struct size an even power of two. It's 168 * critical that no TxCB be split across a page boundry since 169 * no attempt is made to allocate physically contiguous memory. 170 * 171 * XXX - don't forget to change the hard-coded constant in the 172 * fxp_cb_tx struct (defined in if_fxpreg.h), too! 173 */ 174#define FXP_NTXSEG 29 175 176/* 177 * Number of receive frame area buffers. These are large so chose 178 * wisely. 179 */ 180#define FXP_NRFABUFS 32 181 182/* 183 * Wait for the previous command to be accepted (but not necessarily 184 * completed). 185 */ 186static inline void
| 229/* 230 * Set initial transmit threshold at 64 (512 bytes). This is 231 * increased by 64 (512 bytes) at a time, to maximum of 192 232 * (1536 bytes), if an underrun occurs. 233 */ 234static int tx_threshold = 64; 235 236/* 237 * Number of transmit control blocks. This determines the number 238 * of transmit buffers that can be chained in the CB list. 239 * This must be a power of two. 240 */ 241#define FXP_NTXCB 128 242 243/* 244 * TxCB list index mask. This is used to do list wrap-around. 245 */ 246#define FXP_TXCB_MASK (FXP_NTXCB - 1) 247 248/* 249 * Number of DMA segments in a TxCB. Note that this is carefully 250 * chosen to make the total struct size an even power of two. It's 251 * critical that no TxCB be split across a page boundry since 252 * no attempt is made to allocate physically contiguous memory. 253 * 254 * XXX - don't forget to change the hard-coded constant in the 255 * fxp_cb_tx struct (defined in if_fxpreg.h), too! 256 */ 257#define FXP_NTXSEG 29 258 259/* 260 * Number of receive frame area buffers. These are large so chose 261 * wisely. 262 */ 263#define FXP_NRFABUFS 32 264 265/* 266 * Wait for the previous command to be accepted (but not necessarily 267 * completed). 268 */ 269static inline void
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187fxp_scb_wait(csr) 188 struct fxp_csr *csr;
| 270fxp_scb_wait(sc) 271 struct fxp_softc *sc;
|
189{ 190 int i = 10000; 191
| 272{ 273 int i = 10000; 274
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192 while ((csr->scb_command & FXP_SCB_COMMAND_MASK) && --i);
| 275 while ((CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) & FXP_SCB_COMMAND_MASK) 276 && --i);
|
193} 194
| 277} 278
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| 279/************************************************************* 280 * Operating system-specific autoconfiguration glue 281 *************************************************************/ 282 283#if defined(__NetBSD__) 284 285#ifdef __BROKEN_INDIRECT_CONFIG 286static int fxp_match __P((struct device *, void *, void *)); 287#else 288static int fxp_match __P((struct device *, struct cfdata *, void *)); 289#endif 290static void fxp_attach __P((struct device *, struct device *, void *)); 291 292static void fxp_shutdown __P((void *)); 293 294/* Compensate for lack of a generic ether_ioctl() */ 295static int fxp_ether_ioctl __P((struct ifnet *, 296 FXP_IOCTLCMD_TYPE, caddr_t)); 297#define ether_ioctl fxp_ether_ioctl 298 299struct cfattach fxp_ca = { 300 sizeof(struct fxp_softc), fxp_match, fxp_attach 301}; 302 303struct cfdriver fxp_cd = { 304 NULL, "fxp", DV_IFNET 305}; 306
|
195/*
| 307/*
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| 308 * Check if a device is an 82557. 309 */ 310static int 311fxp_match(parent, match, aux) 312 struct device *parent; 313#ifdef __BROKEN_INDIRECT_CONFIG 314 void *match; 315#else 316 struct cfdata *match; 317#endif 318 void *aux; 319{ 320 struct pci_attach_args *pa = aux; 321 322 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 323 return (0); 324 325 switch (PCI_PRODUCT(pa->pa_id)) { 326 case PCI_PRODUCT_INTEL_82557: 327 return (1); 328 } 329 330 return (0); 331} 332 333static void 334fxp_attach(parent, self, aux) 335 struct device *parent, *self; 336 void *aux; 337{ 338 struct fxp_softc *sc = (struct fxp_softc *)self; 339 struct pci_attach_args *pa = aux; 340 pci_chipset_tag_t pc = pa->pa_pc; 341 pci_intr_handle_t ih; 342 const char *intrstr = NULL; 343 u_int8_t enaddr[6]; 344 struct ifnet *ifp; 345 346 /* 347 * Map control/status registers. 348 */ 349 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 350 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 351 printf(": can't map registers\n"); 352 return; 353 } 354 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 355 356 /* 357 * Allocate our interrupt. 358 */ 359 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 360 pa->pa_intrline, &ih)) { 361 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 362 return; 363 } 364 intrstr = pci_intr_string(pc, ih); 365 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 366 if (sc->sc_ih == NULL) { 367 printf("%s: couldn't establish interrupt", 368 sc->sc_dev.dv_xname); 369 if (intrstr != NULL) 370 printf(" at %s", intrstr); 371 printf("\n"); 372 return; 373 } 374 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 375 376 /* Do generic parts of attach. */ 377 if (fxp_attach_common(sc, enaddr)) { 378 /* Failed! */ 379 return; 380 } 381 382 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 383 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 384 385 ifp = &sc->sc_ethercom.ec_if; 386 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 387 ifp->if_softc = sc; 388 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 389 ifp->if_ioctl = fxp_ioctl; 390 ifp->if_start = fxp_start; 391 ifp->if_watchdog = fxp_watchdog; 392 393 /* 394 * Attach the interface. 395 */ 396 if_attach(ifp); 397 ether_ifattach(ifp, enaddr); 398#if NBPFILTER > 0 399 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 400 sizeof(struct ether_header)); 401#endif 402 403 /* 404 * Add shutdown hook so that DMA is disabled prior to reboot. Not 405 * doing do could allow DMA to corrupt kernel memory during the 406 * reboot before the driver initializes. 407 */ 408 shutdownhook_establish(fxp_shutdown, sc); 409} 410 411/* 412 * Device shutdown routine. Called at system shutdown after sync. The 413 * main purpose of this routine is to shut off receiver DMA so that 414 * kernel memory doesn't get clobbered during warmboot. 415 */ 416static void 417fxp_shutdown(sc) 418 void *sc; 419{ 420 fxp_stop((struct fxp_softc *) sc); 421} 422 423static int 424fxp_ether_ioctl(ifp, cmd, data) 425 struct ifnet *ifp; 426 FXP_IOCTLCMD_TYPE cmd; 427 caddr_t data; 428{ 429 struct ifaddr *ifa = (struct ifaddr *) data; 430 struct fxp_softc *sc = ifp->if_softc; 431 432 switch (cmd) { 433 case SIOCSIFADDR: 434 ifp->if_flags |= IFF_UP; 435 436 switch (ifa->ifa_addr->sa_family) { 437#ifdef INET 438 case AF_INET: 439 fxp_init(sc); 440 arp_ifinit(ifp, ifa); 441 break; 442#endif 443#ifdef NS 444 case AF_NS: 445 { 446 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 447 448 if (ns_nullhost(*ina)) 449 ina->x_host = *(union ns_host *) 450 LLADDR(ifp->if_sadl); 451 else 452 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 453 ifp->if_addrlen); 454 /* Set new address. */ 455 fxp_init(sc); 456 break; 457 } 458#endif 459 default: 460 fxp_init(sc); 461 break; 462 } 463 break; 464 465 default: 466 return (EINVAL); 467 } 468 469 return (0); 470} 471 472#else /* __FreeBSD__ */ 473 474static u_long fxp_count; 475static char *fxp_probe __P((pcici_t, pcidi_t)); 476static void fxp_attach __P((pcici_t, int)); 477 478static void fxp_shutdown __P((int, void *)); 479 480static struct pci_device fxp_device = { 481 "fxp", 482 fxp_probe, 483 fxp_attach, 484 &fxp_count, 485 NULL 486}; 487DATA_SET(pcidevice_set, fxp_device); 488 489/*
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196 * Return identification string if this is device is ours. 197 */ 198static char * 199fxp_probe(config_id, device_id) 200 pcici_t config_id; 201 pcidi_t device_id; 202{ 203 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 204 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 205 return ("Intel EtherExpress Pro 10/100B Ethernet"); 206 207 return NULL; 208} 209
| 490 * Return identification string if this is device is ours. 491 */ 492static char * 493fxp_probe(config_id, device_id) 494 pcici_t config_id; 495 pcidi_t device_id; 496{ 497 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 498 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 499 return ("Intel EtherExpress Pro 10/100B Ethernet"); 500 501 return NULL; 502} 503
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210/* 211 * Allocate data structures and attach the device. 212 */
| |
213static void 214fxp_attach(config_id, unit) 215 pcici_t config_id; 216 int unit; 217{ 218 struct fxp_softc *sc;
| 504static void 505fxp_attach(config_id, unit) 506 pcici_t config_id; 507 int unit; 508{ 509 struct fxp_softc *sc;
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219 struct ifnet *ifp;
| |
220 vm_offset_t pbase;
| 510 vm_offset_t pbase;
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221 int s, i; 222 u_short data;
| 511 struct ifnet *ifp; 512 int s;
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223 224 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 225 if (sc == NULL) 226 return; 227 bzero(sc, sizeof(struct fxp_softc)); 228 229 s = splimp(); 230 231 /* 232 * Map control/status registers. 233 */ 234 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 235 (vm_offset_t *)&sc->csr, &pbase)) { 236 printf("fxp%d: couldn't map memory\n", unit); 237 goto fail; 238 } 239 240 /*
| 513 514 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 515 if (sc == NULL) 516 return; 517 bzero(sc, sizeof(struct fxp_softc)); 518 519 s = splimp(); 520 521 /* 522 * Map control/status registers. 523 */ 524 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 525 (vm_offset_t *)&sc->csr, &pbase)) { 526 printf("fxp%d: couldn't map memory\n", unit); 527 goto fail; 528 } 529 530 /*
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241 * Reset to a stable state. 242 */ 243 sc->csr->port = FXP_PORT_SELECTIVE_RESET; 244 DELAY(10); 245 246 /*
| |
247 * Allocate our interrupt. 248 */ 249 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 250 printf("fxp%d: couldn't map interrupt\n", unit); 251 goto fail; 252 } 253
| 531 * Allocate our interrupt. 532 */ 533 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 534 printf("fxp%d: couldn't map interrupt\n", unit); 535 goto fail; 536 } 537
|
| 538 /* Do generic parts of attach. */ 539 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 540 /* Failed! */ 541 (void) pci_unmap_int(config_id); 542 goto fail; 543 } 544 545 printf("fxp%d: Ethernet address %6D%s\n", unit, 546 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 547 548 ifp = &sc->arpcom.ac_if; 549 ifp->if_unit = unit; 550 ifp->if_name = "fxp"; 551 ifp->if_output = ether_output; 552 ifp->if_baudrate = 100000000; 553 ifp->if_init = fxp_init; 554 ifp->if_softc = sc; 555 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 556 ifp->if_ioctl = fxp_ioctl; 557 ifp->if_start = fxp_start; 558 ifp->if_watchdog = fxp_watchdog; 559 560 /* 561 * Attach the interface. 562 */ 563 if_attach(ifp); 564 ether_ifattach(ifp); 565#if NBPFILTER > 0 566 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 567#endif 568 569 /* 570 * Add shutdown hook so that DMA is disabled prior to reboot. Not 571 * doing do could allow DMA to corrupt kernel memory during the 572 * reboot before the driver initializes. 573 */ 574 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 575 576 splx(s); 577 return; 578 579 fail: 580 free(sc, M_DEVBUF); 581 splx(s); 582} 583 584/* 585 * Device shutdown routine. Called at system shutdown after sync. The 586 * main purpose of this routine is to shut off receiver DMA so that 587 * kernel memory doesn't get clobbered during warmboot. 588 */ 589static void 590fxp_shutdown(howto, sc) 591 int howto; 592 void *sc; 593{ 594 fxp_stop((struct fxp_softc *) sc); 595} 596 597#endif /* __NetBSD__ */ 598 599/************************************************************* 600 * End of operating system-specific autoconfiguration glue 601 *************************************************************/ 602 603/* 604 * Do generic parts of attach. 605 */ 606static int 607fxp_attach_common(sc, enaddr) 608 struct fxp_softc *sc; 609 u_int8_t *enaddr; 610{ 611 u_int16_t data; 612 int i, nmedia, defmedia; 613 const int *media; 614 615 /* 616 * Reset to a stable state. 617 */ 618 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 619 DELAY(10); 620
|
254 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 255 M_DEVBUF, M_NOWAIT); 256 if (sc->cbl_base == NULL)
| 621 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 622 M_DEVBUF, M_NOWAIT); 623 if (sc->cbl_base == NULL)
|
257 goto malloc_fail;
| 624 goto fail;
|
258 259 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 260 if (sc->fxp_stats == NULL)
| 625 626 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 627 if (sc->fxp_stats == NULL)
|
261 goto malloc_fail;
| 628 goto fail;
|
262 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 263 264 /* 265 * Pre-allocate our receive buffers. 266 */ 267 for (i = 0; i < FXP_NRFABUFS; i++) { 268 if (fxp_add_rfabuf(sc, NULL) != 0) {
| 629 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 630 631 /* 632 * Pre-allocate our receive buffers. 633 */ 634 for (i = 0; i < FXP_NRFABUFS; i++) { 635 if (fxp_add_rfabuf(sc, NULL) != 0) {
|
269 goto malloc_fail;
| 636 goto fail;
|
270 } 271 } 272 273 /* 274 * Get info about the primary PHY 275 */
| 637 } 638 } 639 640 /* 641 * Get info about the primary PHY 642 */
|
276 fxp_read_eeprom(sc->csr, (u_short *)&data, 6, 1);
| 643 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
|
277 sc->phy_primary_addr = data & 0xff; 278 sc->phy_primary_device = (data >> 8) & 0x3f; 279 sc->phy_10Mbps_only = data >> 15; 280
| 644 sc->phy_primary_addr = data & 0xff; 645 sc->phy_primary_device = (data >> 8) & 0x3f; 646 sc->phy_10Mbps_only = data >> 15; 647
|
281 ifp = &sc->arpcom.ac_if; 282 ifp->if_softc = sc; 283 ifp->if_unit = unit; 284 ifp->if_name = "fxp"; 285 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 286 ifp->if_ioctl = fxp_ioctl; 287 ifp->if_output = ether_output; 288 ifp->if_start = fxp_start; 289 ifp->if_watchdog = fxp_watchdog; 290 ifp->if_baudrate = 100000000; 291 ifp->if_init = fxp_init; 292
| |
293 /*
| 648 /*
|
294 * Read MAC address
| 649 * Read MAC address.
|
295 */
| 650 */
|
296 fxp_read_eeprom(sc->csr, (u_short *)sc->arpcom.ac_enaddr, 0, 3); 297 printf("fxp%d: Ethernet address %6D", unit, sc->arpcom.ac_enaddr, ":"); 298 if (sc->phy_10Mbps_only) 299 printf(", 10Mbps"); 300 printf("\n");
| 651 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
|
301 302 /*
| 652 653 /*
|
303 * Attach the interface.
| 654 * Initialize the media structures.
|
304 */
| 655 */
|
305 if_attach(ifp); 306 ether_ifattach(ifp);
| |
307
| 656
|
308#if NBPFILTER > 0 309 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 310#endif
| 657 media = fxp_media_default; 658 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 659 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA;
|
311
| 660
|
312 /* 313 * Add shutdown hook so that DMA is disabled prior to reboot. Not 314 * doing do could allow DMA to corrupt kernel memory during the 315 * reboot before the driver initializes. 316 */ 317 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
| 661 for (i = 0; i < NFXPMEDIA; i++) { 662 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 663 media = fxp_media[i].fsm_media; 664 nmedia = fxp_media[i].fsm_nmedia; 665 defmedia = fxp_media[i].fsm_defmedia; 666 } 667 }
|
318
| 668
|
319 splx(s); 320 return;
| 669 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 670 for (i = 0; i < nmedia; i++) { 671 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 672 continue; 673 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 674 } 675 ifmedia_set(&sc->sc_media, defmedia);
|
321
| 676
|
322malloc_fail: 323 printf("fxp%d: Failed to malloc memory\n", unit); 324 (void) pci_unmap_int(config_id); 325 if (sc && sc->cbl_base)
| 677 return (0); 678 679 fail: 680 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 681 if (sc->cbl_base)
|
326 free(sc->cbl_base, M_DEVBUF);
| 682 free(sc->cbl_base, M_DEVBUF);
|
327 if (sc && sc->fxp_stats)
| 683 if (sc->fxp_stats)
|
328 free(sc->fxp_stats, M_DEVBUF); 329 /* frees entire chain */
| 684 free(sc->fxp_stats, M_DEVBUF); 685 /* frees entire chain */
|
330 if (sc && sc->rfa_headm)
| 686 if (sc->rfa_headm)
|
331 m_freem(sc->rfa_headm);
| 687 m_freem(sc->rfa_headm);
|
332fail: 333 if (sc) 334 free(sc, M_DEVBUF); 335 splx(s);
| 688 689 return (ENOMEM);
|
336} 337 338/* 339 * Read from the serial EEPROM. Basically, you manually shift in 340 * the read opcode (one bit at a time) and then shift in the address, 341 * and then you shift out the data (all of this one bit at a time). 342 * The word size is 16 bits, so you have to provide the address for 343 * every 16 bits of data. 344 */ 345static void
| 690} 691 692/* 693 * Read from the serial EEPROM. Basically, you manually shift in 694 * the read opcode (one bit at a time) and then shift in the address, 695 * and then you shift out the data (all of this one bit at a time). 696 * The word size is 16 bits, so you have to provide the address for 697 * every 16 bits of data. 698 */ 699static void
|
346fxp_read_eeprom(csr, data, offset, words) 347 struct fxp_csr *csr;
| 700fxp_read_eeprom(sc, data, offset, words) 701 struct fxp_softc *sc;
|
348 u_short *data; 349 int offset; 350 int words; 351{
| 702 u_short *data; 703 int offset; 704 int words; 705{
|
352 u_short reg;
| 706 u_int16_t reg;
|
353 int i, x; 354 355 for (i = 0; i < words; i++) {
| 707 int i, x; 708 709 for (i = 0; i < words; i++) {
|
356 csr->eeprom_control = FXP_EEPROM_EECS;
| 710 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
|
357 /* 358 * Shift in read opcode. 359 */ 360 for (x = 3; x > 0; x--) { 361 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 362 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 363 } else { 364 reg = FXP_EEPROM_EECS; 365 }
| 711 /* 712 * Shift in read opcode. 713 */ 714 for (x = 3; x > 0; x--) { 715 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 716 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 717 } else { 718 reg = FXP_EEPROM_EECS; 719 }
|
366 csr->eeprom_control = reg; 367 csr->eeprom_control = reg | FXP_EEPROM_EESK;
| 720 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 721 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 722 reg | FXP_EEPROM_EESK);
|
368 DELAY(1);
| 723 DELAY(1);
|
369 csr->eeprom_control = reg;
| 724 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
370 DELAY(1); 371 } 372 /* 373 * Shift in address. 374 */ 375 for (x = 6; x > 0; x--) { 376 if ((i + offset) & (1 << (x - 1))) { 377 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 378 } else { 379 reg = FXP_EEPROM_EECS; 380 }
| 725 DELAY(1); 726 } 727 /* 728 * Shift in address. 729 */ 730 for (x = 6; x > 0; x--) { 731 if ((i + offset) & (1 << (x - 1))) { 732 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 733 } else { 734 reg = FXP_EEPROM_EECS; 735 }
|
381 csr->eeprom_control = reg; 382 csr->eeprom_control = reg | FXP_EEPROM_EESK;
| 736 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 737 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 738 reg | FXP_EEPROM_EESK);
|
383 DELAY(1);
| 739 DELAY(1);
|
384 csr->eeprom_control = reg;
| 740 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
385 DELAY(1); 386 } 387 reg = FXP_EEPROM_EECS; 388 data[i] = 0; 389 /* 390 * Shift out data. 391 */ 392 for (x = 16; x > 0; x--) {
| 741 DELAY(1); 742 } 743 reg = FXP_EEPROM_EECS; 744 data[i] = 0; 745 /* 746 * Shift out data. 747 */ 748 for (x = 16; x > 0; x--) {
|
393 csr->eeprom_control = reg | FXP_EEPROM_EESK;
| 749 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 750 reg | FXP_EEPROM_EESK);
|
394 DELAY(1);
| 751 DELAY(1);
|
395 if (csr->eeprom_control & FXP_EEPROM_EEDO)
| 752 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 753 FXP_EEPROM_EEDO)
|
396 data[i] |= (1 << (x - 1));
| 754 data[i] |= (1 << (x - 1));
|
397 csr->eeprom_control = reg;
| 755 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
398 DELAY(1); 399 }
| 756 DELAY(1); 757 }
|
400 csr->eeprom_control = 0;
| 758 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
|
401 DELAY(1); 402 } 403} 404 405/*
| 759 DELAY(1); 760 } 761} 762 763/*
|
406 * Device shutdown routine. Called at system shutdown after sync. The 407 * main purpose of this routine is to shut off receiver DMA so that 408 * kernel memory doesn't get clobbered during warmboot. 409 */ 410static void 411fxp_shutdown(howto, sc) 412 int howto; 413 void *sc; 414{ 415 fxp_stop((struct fxp_softc *) sc); 416} 417 418/*
| |
419 * Start packet transmission on the interface. 420 */ 421static void 422fxp_start(ifp) 423 struct ifnet *ifp; 424{ 425 struct fxp_softc *sc = ifp->if_softc;
| 764 * Start packet transmission on the interface. 765 */ 766static void 767fxp_start(ifp) 768 struct ifnet *ifp; 769{ 770 struct fxp_softc *sc = ifp->if_softc;
|
426 struct fxp_csr *csr = sc->csr;
| |
427 struct fxp_cb_tx *txp; 428 struct mbuf *m, *mb_head; 429 int segment, first = 1; 430 431txloop: 432 /* 433 * See if we're all filled up with buffers to transmit. 434 */ 435 if (sc->tx_queued >= FXP_NTXCB) 436 return; 437 438 /* 439 * Grab a packet to transmit. 440 */ 441 IF_DEQUEUE(&ifp->if_snd, mb_head); 442 if (mb_head == NULL) { 443 /* 444 * No more packets to send. 445 */ 446 return; 447 } 448 449 /* 450 * Get pointer to next available (unused) descriptor. 451 */ 452 txp = sc->cbl_last->next; 453 454 /* 455 * Go through each of the mbufs in the chain and initialize 456 * the transmit buffers descriptors with the physical address 457 * and size of the mbuf. 458 */ 459tbdinit: 460 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 461 if (m->m_len != 0) { 462 if (segment == FXP_NTXSEG) 463 break; 464 txp->tbd[segment].tb_addr = 465 vtophys(mtod(m, vm_offset_t)); 466 txp->tbd[segment].tb_size = m->m_len; 467 segment++; 468 } 469 } 470 if (m != NULL) { 471 struct mbuf *mn; 472 473 /* 474 * We ran out of segments. We have to recopy this mbuf 475 * chain first. 476 */ 477 MGETHDR(mn, M_DONTWAIT, MT_DATA); 478 if (mn == NULL) { 479 m_freem(mb_head); 480 return; 481 } 482 if (mb_head->m_pkthdr.len > MHLEN) { 483 MCLGET(mn, M_DONTWAIT); 484 if ((mn->m_flags & M_EXT) == 0) { 485 m_freem(mn); 486 m_freem(mb_head); 487 return; 488 } 489 }
| 771 struct fxp_cb_tx *txp; 772 struct mbuf *m, *mb_head; 773 int segment, first = 1; 774 775txloop: 776 /* 777 * See if we're all filled up with buffers to transmit. 778 */ 779 if (sc->tx_queued >= FXP_NTXCB) 780 return; 781 782 /* 783 * Grab a packet to transmit. 784 */ 785 IF_DEQUEUE(&ifp->if_snd, mb_head); 786 if (mb_head == NULL) { 787 /* 788 * No more packets to send. 789 */ 790 return; 791 } 792 793 /* 794 * Get pointer to next available (unused) descriptor. 795 */ 796 txp = sc->cbl_last->next; 797 798 /* 799 * Go through each of the mbufs in the chain and initialize 800 * the transmit buffers descriptors with the physical address 801 * and size of the mbuf. 802 */ 803tbdinit: 804 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 805 if (m->m_len != 0) { 806 if (segment == FXP_NTXSEG) 807 break; 808 txp->tbd[segment].tb_addr = 809 vtophys(mtod(m, vm_offset_t)); 810 txp->tbd[segment].tb_size = m->m_len; 811 segment++; 812 } 813 } 814 if (m != NULL) { 815 struct mbuf *mn; 816 817 /* 818 * We ran out of segments. We have to recopy this mbuf 819 * chain first. 820 */ 821 MGETHDR(mn, M_DONTWAIT, MT_DATA); 822 if (mn == NULL) { 823 m_freem(mb_head); 824 return; 825 } 826 if (mb_head->m_pkthdr.len > MHLEN) { 827 MCLGET(mn, M_DONTWAIT); 828 if ((mn->m_flags & M_EXT) == 0) { 829 m_freem(mn); 830 m_freem(mb_head); 831 return; 832 } 833 }
|
490 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(mn, caddr_t));
| 834 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 835 mtod(mn, caddr_t));
|
491 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 492 m_freem(mb_head); 493 mb_head = mn; 494 goto tbdinit; 495 } 496 497 txp->tbd_number = segment; 498 txp->mb_head = mb_head; 499 500 /* 501 * Finish the initialization of this TxCB. 502 */ 503 txp->cb_status = 0; 504 txp->cb_command = 505 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 506 txp->tx_threshold = tx_threshold; 507 508 /* 509 * Advance the end-of-list forward. 510 */ 511 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 512 sc->cbl_last = txp; 513 514 /* 515 * Advance the beginning of the list forward if there are 516 * no other packets queued (when nothing is queued, cbl_first 517 * sits on the last TxCB that was sent out).. 518 */ 519 if (sc->tx_queued == 0) 520 sc->cbl_first = txp; 521 522 sc->tx_queued++; 523 524 /* 525 * Only need to wait prior to the first resume command. 526 */ 527 if (first) { 528 first--;
| 836 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 837 m_freem(mb_head); 838 mb_head = mn; 839 goto tbdinit; 840 } 841 842 txp->tbd_number = segment; 843 txp->mb_head = mb_head; 844 845 /* 846 * Finish the initialization of this TxCB. 847 */ 848 txp->cb_status = 0; 849 txp->cb_command = 850 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 851 txp->tx_threshold = tx_threshold; 852 853 /* 854 * Advance the end-of-list forward. 855 */ 856 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 857 sc->cbl_last = txp; 858 859 /* 860 * Advance the beginning of the list forward if there are 861 * no other packets queued (when nothing is queued, cbl_first 862 * sits on the last TxCB that was sent out).. 863 */ 864 if (sc->tx_queued == 0) 865 sc->cbl_first = txp; 866 867 sc->tx_queued++; 868 869 /* 870 * Only need to wait prior to the first resume command. 871 */ 872 if (first) { 873 first--;
|
529 fxp_scb_wait(csr);
| 874 fxp_scb_wait(sc);
|
530 } 531 532 /* 533 * Resume transmission if suspended. 534 */
| 875 } 876 877 /* 878 * Resume transmission if suspended. 879 */
|
535 csr->scb_command = FXP_SCB_COMMAND_CU_RESUME;
| 880 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME);
|
536 537#if NBPFILTER > 0 538 /* 539 * Pass packet to bpf if there is a listener. 540 */ 541 if (ifp->if_bpf)
| 881 882#if NBPFILTER > 0 883 /* 884 * Pass packet to bpf if there is a listener. 885 */ 886 if (ifp->if_bpf)
|
542 bpf_mtap(ifp, mb_head);
| 887 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head);
|
543#endif 544 /* 545 * Set a 5 second timer just in case we don't hear from the 546 * card again. 547 */ 548 ifp->if_timer = 5; 549 550 goto txloop; 551} 552 553/* 554 * Process interface interrupts. 555 */
| 888#endif 889 /* 890 * Set a 5 second timer just in case we don't hear from the 891 * card again. 892 */ 893 ifp->if_timer = 5; 894 895 goto txloop; 896} 897 898/* 899 * Process interface interrupts. 900 */
|
556static void
| 901static FXP_INTR_TYPE
|
557fxp_intr(arg) 558 void *arg; 559{ 560 struct fxp_softc *sc = arg;
| 902fxp_intr(arg) 903 void *arg; 904{ 905 struct fxp_softc *sc = arg;
|
561 struct fxp_csr *csr = sc->csr; 562 struct ifnet *ifp = &sc->arpcom.ac_if;
| 906 struct ifnet *ifp = &sc->sc_if;
|
563 u_int8_t statack;
| 907 u_int8_t statack;
|
| 908#if defined(__NetBSD__) 909 int claimed = 0; 910#endif
|
564
| 911
|
565 while ((statack = csr->scb_statack) != 0) {
| 912 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 913#if defined(__NetBSD__) 914 claimed = 1; 915#endif
|
566 /* 567 * First ACK all the interrupts in this pass. 568 */
| 916 /* 917 * First ACK all the interrupts in this pass. 918 */
|
569 csr->scb_statack = statack;
| 919 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
|
570 571 /* 572 * Free any finished transmit mbuf chains. 573 */ 574 if (statack & FXP_SCB_STATACK_CNA) { 575 struct fxp_cb_tx *txp; 576 577 for (txp = sc->cbl_first; 578 (txp->cb_status & FXP_CB_STATUS_C) != 0; 579 txp = txp->next) { 580 if (txp->mb_head != NULL) { 581 m_freem(txp->mb_head); 582 txp->mb_head = NULL; 583 sc->tx_queued--; 584 } 585 if (txp == sc->cbl_last) 586 break; 587 } 588 sc->cbl_first = txp; 589 ifp->if_timer = 0; 590 /* 591 * Try to start more packets transmitting. 592 */ 593 if (ifp->if_snd.ifq_head != NULL) 594 fxp_start(ifp); 595 } 596 /* 597 * Process receiver interrupts. If a no-resource (RNR) 598 * condition exists, get whatever packets we can and 599 * re-start the receiver. 600 */ 601 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 602 struct mbuf *m; 603 struct fxp_rfa *rfa; 604rcvloop: 605 m = sc->rfa_headm;
| 920 921 /* 922 * Free any finished transmit mbuf chains. 923 */ 924 if (statack & FXP_SCB_STATACK_CNA) { 925 struct fxp_cb_tx *txp; 926 927 for (txp = sc->cbl_first; 928 (txp->cb_status & FXP_CB_STATUS_C) != 0; 929 txp = txp->next) { 930 if (txp->mb_head != NULL) { 931 m_freem(txp->mb_head); 932 txp->mb_head = NULL; 933 sc->tx_queued--; 934 } 935 if (txp == sc->cbl_last) 936 break; 937 } 938 sc->cbl_first = txp; 939 ifp->if_timer = 0; 940 /* 941 * Try to start more packets transmitting. 942 */ 943 if (ifp->if_snd.ifq_head != NULL) 944 fxp_start(ifp); 945 } 946 /* 947 * Process receiver interrupts. If a no-resource (RNR) 948 * condition exists, get whatever packets we can and 949 * re-start the receiver. 950 */ 951 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 952 struct mbuf *m; 953 struct fxp_rfa *rfa; 954rcvloop: 955 m = sc->rfa_headm;
|
606 rfa = (struct fxp_rfa *)m->m_ext.ext_buf;
| 956 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 957 RFA_ALIGNMENT_FUDGE);
|
607 608 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 609 /* 610 * Remove first packet from the chain. 611 */ 612 sc->rfa_headm = m->m_next; 613 m->m_next = NULL; 614 615 /*
| 958 959 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 960 /* 961 * Remove first packet from the chain. 962 */ 963 sc->rfa_headm = m->m_next; 964 m->m_next = NULL; 965 966 /*
|
616 * Add a new buffer to the receive chain. If this 617 * fails, the old buffer is recycled instead.
| 967 * Add a new buffer to the receive chain. 968 * If this fails, the old buffer is recycled 969 * instead.
|
618 */ 619 if (fxp_add_rfabuf(sc, m) == 0) { 620 struct ether_header *eh;
| 970 */ 971 if (fxp_add_rfabuf(sc, m) == 0) { 972 struct ether_header *eh;
|
621 u_short total_len;
| 973 u_int16_t total_len;
|
622
| 974
|
623 total_len = rfa->actual_size & (MCLBYTES - 1); 624 if (total_len < sizeof(struct ether_header)) {
| 975 total_len = rfa->actual_size & 976 (MCLBYTES - 1); 977 if (total_len < 978 sizeof(struct ether_header)) {
|
625 m_freem(m); 626 goto rcvloop; 627 } 628 m->m_pkthdr.rcvif = ifp;
| 979 m_freem(m); 980 goto rcvloop; 981 } 982 m->m_pkthdr.rcvif = ifp;
|
629 m->m_pkthdr.len = m->m_len = total_len -
| 983 m->m_pkthdr.len = m->m_len = 984 total_len -
|
630 sizeof(struct ether_header); 631 eh = mtod(m, struct ether_header *); 632#if NBPFILTER > 0 633 if (ifp->if_bpf) {
| 985 sizeof(struct ether_header); 986 eh = mtod(m, struct ether_header *); 987#if NBPFILTER > 0 988 if (ifp->if_bpf) {
|
634 bpf_tap(ifp, mtod(m, caddr_t), total_len);
| 989 bpf_tap(FXP_BPFTAP_ARG(ifp), 990 mtod(m, caddr_t), 991 total_len);
|
635 /*
| 992 /*
|
636 * Only pass this packet up if it is for us.
| 993 * Only pass this packet up 994 * if it is for us.
|
637 */
| 995 */
|
638 if ((ifp->if_flags & IFF_PROMISC) && 639 (rfa->rfa_status & FXP_RFA_STATUS_IAMATCH) && 640 (eh->ether_dhost[0] & 1) == 0) {
| 996 if ((ifp->if_flags & 997 IFF_PROMISC) && 998 (rfa->rfa_status & 999 FXP_RFA_STATUS_IAMATCH) && 1000 (eh->ether_dhost[0] & 1) 1001 == 0) {
|
641 m_freem(m); 642 goto rcvloop; 643 } 644 }
| 1002 m_freem(m); 1003 goto rcvloop; 1004 } 1005 }
|
645#endif 646 m->m_data += sizeof(struct ether_header);
| 1006#endif /* NBPFILTER > 0 */ 1007 m->m_data += 1008 sizeof(struct ether_header);
|
647 ether_input(ifp, eh, m); 648 } 649 goto rcvloop; 650 } 651 if (statack & FXP_SCB_STATACK_RNR) {
| 1009 ether_input(ifp, eh, m); 1010 } 1011 goto rcvloop; 1012 } 1013 if (statack & FXP_SCB_STATACK_RNR) {
|
652 fxp_scb_wait(csr); 653 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf); 654 csr->scb_command = FXP_SCB_COMMAND_RU_START;
| 1014 fxp_scb_wait(sc); 1015 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1016 vtophys(sc->rfa_headm->m_ext.ext_buf) + 1017 RFA_ALIGNMENT_FUDGE); 1018 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1019 FXP_SCB_COMMAND_RU_START);
|
655 } 656 } 657 }
| 1020 } 1021 } 1022 }
|
| 1023#if defined(__NetBSD__) 1024 return (claimed); 1025#endif
|
658} 659 660/* 661 * Update packet in/out/collision statistics. The i82557 doesn't 662 * allow you to access these counters without doing a fairly 663 * expensive DMA to get _all_ of the statistics it maintains, so 664 * we do this operation here only once per second. The statistics 665 * counters in the kernel are updated from the previous dump-stats 666 * DMA and then a new dump-stats DMA is started. The on-chip 667 * counters are zeroed when the DMA completes. If we can't start 668 * the DMA immediately, we don't wait - we just prepare to read 669 * them again next time. 670 */ 671void 672fxp_stats_update(arg) 673 void *arg; 674{ 675 struct fxp_softc *sc = arg;
| 1026} 1027 1028/* 1029 * Update packet in/out/collision statistics. The i82557 doesn't 1030 * allow you to access these counters without doing a fairly 1031 * expensive DMA to get _all_ of the statistics it maintains, so 1032 * we do this operation here only once per second. The statistics 1033 * counters in the kernel are updated from the previous dump-stats 1034 * DMA and then a new dump-stats DMA is started. The on-chip 1035 * counters are zeroed when the DMA completes. If we can't start 1036 * the DMA immediately, we don't wait - we just prepare to read 1037 * them again next time. 1038 */ 1039void 1040fxp_stats_update(arg) 1041 void *arg; 1042{ 1043 struct fxp_softc *sc = arg;
|
676 struct ifnet *ifp = &sc->arpcom.ac_if;
| 1044 struct ifnet *ifp = &sc->sc_if;
|
677 struct fxp_stats *sp = sc->fxp_stats; 678 679 ifp->if_opackets += sp->tx_good; 680 ifp->if_collisions += sp->tx_total_collisions; 681 ifp->if_ipackets += sp->rx_good; 682 ifp->if_ierrors += 683 sp->rx_crc_errors + 684 sp->rx_alignment_errors + 685 sp->rx_rnr_errors + 686 sp->rx_overrun_errors; 687 /* 688 * If any transmit underruns occured, bump up the transmit 689 * threshold by another 512 bytes (64 * 8). 690 */ 691 if (sp->tx_underruns) { 692 ifp->if_oerrors += sp->tx_underruns; 693 if (tx_threshold < 192) 694 tx_threshold += 64; 695 } 696 /* 697 * If there is no pending command, start another stats 698 * dump. Otherwise punt for now. 699 */
| 1045 struct fxp_stats *sp = sc->fxp_stats; 1046 1047 ifp->if_opackets += sp->tx_good; 1048 ifp->if_collisions += sp->tx_total_collisions; 1049 ifp->if_ipackets += sp->rx_good; 1050 ifp->if_ierrors += 1051 sp->rx_crc_errors + 1052 sp->rx_alignment_errors + 1053 sp->rx_rnr_errors + 1054 sp->rx_overrun_errors; 1055 /* 1056 * If any transmit underruns occured, bump up the transmit 1057 * threshold by another 512 bytes (64 * 8). 1058 */ 1059 if (sp->tx_underruns) { 1060 ifp->if_oerrors += sp->tx_underruns; 1061 if (tx_threshold < 192) 1062 tx_threshold += 64; 1063 } 1064 /* 1065 * If there is no pending command, start another stats 1066 * dump. Otherwise punt for now. 1067 */
|
700 if ((sc->csr->scb_command & FXP_SCB_COMMAND_MASK) == 0) {
| 1068 if ((CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) & 1069 FXP_SCB_COMMAND_MASK) == 0) {
|
701 /* 702 * Start another stats dump. By waiting for it to be 703 * accepted, we avoid having to do splhigh locking when 704 * writing scb_command in other parts of the driver. 705 */
| 1070 /* 1071 * Start another stats dump. By waiting for it to be 1072 * accepted, we avoid having to do splhigh locking when 1073 * writing scb_command in other parts of the driver. 1074 */
|
706 sc->csr->scb_command = FXP_SCB_COMMAND_CU_DUMPRESET; 707 fxp_scb_wait(sc->csr);
| 1075 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1076 FXP_SCB_COMMAND_CU_DUMPRESET); 1077 fxp_scb_wait(sc);
|
708 } else { 709 /* 710 * A previous command is still waiting to be accepted. 711 * Just zero our copy of the stats and wait for the 712 * next timer event to update them. 713 */ 714 sp->tx_good = 0; 715 sp->tx_underruns = 0; 716 sp->tx_total_collisions = 0; 717 718 sp->rx_good = 0; 719 sp->rx_crc_errors = 0; 720 sp->rx_alignment_errors = 0; 721 sp->rx_rnr_errors = 0; 722 sp->rx_overrun_errors = 0; 723 } 724 /* 725 * Schedule another timeout one second from now. 726 */ 727 timeout(fxp_stats_update, sc, hz); 728} 729 730/* 731 * Stop the interface. Cancels the statistics updater and resets 732 * the interface. 733 */ 734static void 735fxp_stop(sc) 736 struct fxp_softc *sc; 737{
| 1078 } else { 1079 /* 1080 * A previous command is still waiting to be accepted. 1081 * Just zero our copy of the stats and wait for the 1082 * next timer event to update them. 1083 */ 1084 sp->tx_good = 0; 1085 sp->tx_underruns = 0; 1086 sp->tx_total_collisions = 0; 1087 1088 sp->rx_good = 0; 1089 sp->rx_crc_errors = 0; 1090 sp->rx_alignment_errors = 0; 1091 sp->rx_rnr_errors = 0; 1092 sp->rx_overrun_errors = 0; 1093 } 1094 /* 1095 * Schedule another timeout one second from now. 1096 */ 1097 timeout(fxp_stats_update, sc, hz); 1098} 1099 1100/* 1101 * Stop the interface. Cancels the statistics updater and resets 1102 * the interface. 1103 */ 1104static void 1105fxp_stop(sc) 1106 struct fxp_softc *sc; 1107{
|
738 struct ifnet *ifp = &sc->arpcom.ac_if;
| 1108 struct ifnet *ifp = &sc->sc_if;
|
739 struct fxp_cb_tx *txp; 740 int i; 741 742 /* 743 * Cancel stats updater. 744 */ 745 untimeout(fxp_stats_update, sc); 746 747 /* 748 * Issue software reset 749 */
| 1109 struct fxp_cb_tx *txp; 1110 int i; 1111 1112 /* 1113 * Cancel stats updater. 1114 */ 1115 untimeout(fxp_stats_update, sc); 1116 1117 /* 1118 * Issue software reset 1119 */
|
750 sc->csr->port = FXP_PORT_SELECTIVE_RESET;
| 1120 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
|
751 DELAY(10); 752 753 /* 754 * Release any xmit buffers. 755 */ 756 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 757 txp = txp->next) { 758 m_freem(txp->mb_head); 759 txp->mb_head = NULL; 760 } 761 sc->tx_queued = 0; 762 763 /* 764 * Free all the receive buffers then reallocate/reinitialize 765 */ 766 if (sc->rfa_headm != NULL) 767 m_freem(sc->rfa_headm); 768 sc->rfa_headm = NULL; 769 sc->rfa_tailm = NULL; 770 for (i = 0; i < FXP_NRFABUFS; i++) { 771 if (fxp_add_rfabuf(sc, NULL) != 0) { 772 /* 773 * This "can't happen" - we're at splimp() 774 * and we just freed all the buffers we need 775 * above. 776 */ 777 panic("fxp_stop: no buffers!"); 778 } 779 } 780 781 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 782 ifp->if_timer = 0; 783} 784 785/* 786 * Watchdog/transmission transmit timeout handler. Called when a 787 * transmission is started on the interface, but no interrupt is 788 * received before the timeout. This usually indicates that the 789 * card has wedged for some reason. 790 */ 791static void 792fxp_watchdog(ifp) 793 struct ifnet *ifp; 794{
| 1121 DELAY(10); 1122 1123 /* 1124 * Release any xmit buffers. 1125 */ 1126 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 1127 txp = txp->next) { 1128 m_freem(txp->mb_head); 1129 txp->mb_head = NULL; 1130 } 1131 sc->tx_queued = 0; 1132 1133 /* 1134 * Free all the receive buffers then reallocate/reinitialize 1135 */ 1136 if (sc->rfa_headm != NULL) 1137 m_freem(sc->rfa_headm); 1138 sc->rfa_headm = NULL; 1139 sc->rfa_tailm = NULL; 1140 for (i = 0; i < FXP_NRFABUFS; i++) { 1141 if (fxp_add_rfabuf(sc, NULL) != 0) { 1142 /* 1143 * This "can't happen" - we're at splimp() 1144 * and we just freed all the buffers we need 1145 * above. 1146 */ 1147 panic("fxp_stop: no buffers!"); 1148 } 1149 } 1150 1151 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1152 ifp->if_timer = 0; 1153} 1154 1155/* 1156 * Watchdog/transmission transmit timeout handler. Called when a 1157 * transmission is started on the interface, but no interrupt is 1158 * received before the timeout. This usually indicates that the 1159 * card has wedged for some reason. 1160 */ 1161static void 1162fxp_watchdog(ifp) 1163 struct ifnet *ifp; 1164{
|
795 log(LOG_ERR, "fxp%d: device timeout\n", ifp->if_unit);
| 1165 struct fxp_softc *sc = ifp->if_softc; 1166 1167 log(LOG_ERR, FXP_FORMAT ": device timeout\n", FXP_ARGS(sc));
|
796 ifp->if_oerrors++; 797
| 1168 ifp->if_oerrors++; 1169
|
798 fxp_init(ifp->if_softc);
| 1170 fxp_init(sc);
|
799} 800 801static void 802fxp_init(xsc) 803 void *xsc; 804{ 805 struct fxp_softc *sc = xsc;
| 1171} 1172 1173static void 1174fxp_init(xsc) 1175 void *xsc; 1176{ 1177 struct fxp_softc *sc = xsc;
|
806 struct ifnet *ifp = &sc->arpcom.ac_if;
| 1178 struct ifnet *ifp = &sc->sc_if;
|
807 struct fxp_cb_config *cbp; 808 struct fxp_cb_ias *cb_ias; 809 struct fxp_cb_tx *txp;
| 1179 struct fxp_cb_config *cbp; 1180 struct fxp_cb_ias *cb_ias; 1181 struct fxp_cb_tx *txp;
|
810 struct fxp_csr *csr = sc->csr;
| |
811 int i, s, mcast, prm; 812 813 s = splimp(); 814 /* 815 * Cancel any pending I/O 816 */ 817 fxp_stop(sc); 818 819 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 820 sc->promisc_mode = prm; 821 /* 822 * Sleeze out here and enable reception of all multicasts if 823 * multicasts are enabled. Ideally, we'd program the multicast 824 * address filter to only accept specific multicasts. 825 */ 826 mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0; 827 828 /* 829 * Initialize base of CBL and RFA memory. Loading with zero 830 * sets it up for regular linear addressing. 831 */
| 1182 int i, s, mcast, prm; 1183 1184 s = splimp(); 1185 /* 1186 * Cancel any pending I/O 1187 */ 1188 fxp_stop(sc); 1189 1190 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1191 sc->promisc_mode = prm; 1192 /* 1193 * Sleeze out here and enable reception of all multicasts if 1194 * multicasts are enabled. Ideally, we'd program the multicast 1195 * address filter to only accept specific multicasts. 1196 */ 1197 mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0; 1198 1199 /* 1200 * Initialize base of CBL and RFA memory. Loading with zero 1201 * sets it up for regular linear addressing. 1202 */
|
832 csr->scb_general = 0; 833 csr->scb_command = FXP_SCB_COMMAND_CU_BASE;
| 1203 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1204 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
|
834
| 1205
|
835 fxp_scb_wait(csr); 836 csr->scb_command = FXP_SCB_COMMAND_RU_BASE;
| 1206 fxp_scb_wait(sc); 1207 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
|
837 838 /* 839 * Initialize base of dump-stats buffer. 840 */
| 1208 1209 /* 1210 * Initialize base of dump-stats buffer. 1211 */
|
841 fxp_scb_wait(csr); 842 csr->scb_general = vtophys(sc->fxp_stats); 843 csr->scb_command = FXP_SCB_COMMAND_CU_DUMP_ADR;
| 1212 fxp_scb_wait(sc); 1213 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1214 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR);
|
844 845 /* 846 * We temporarily use memory that contains the TxCB list to 847 * construct the config CB. The TxCB list memory is rebuilt 848 * later. 849 */ 850 cbp = (struct fxp_cb_config *) sc->cbl_base; 851 852 /* 853 * This bcopy is kind of disgusting, but there are a bunch of must be 854 * zero and must be one bits in this structure and this is the easiest 855 * way to initialize them all to proper values. 856 */ 857 bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config)); 858 859 cbp->cb_status = 0; 860 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 861 cbp->link_addr = -1; /* (no) next command */ 862 cbp->byte_count = 22; /* (22) bytes to config */ 863 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 864 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 865 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 866 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 867 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 868 cbp->dma_bce = 0; /* (disable) dma max counters */ 869 cbp->late_scb = 0; /* (don't) defer SCB update */ 870 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 871 cbp->ci_int = 0; /* interrupt on CU not active */ 872 cbp->save_bf = prm; /* save bad frames */ 873 cbp->disc_short_rx = !prm; /* discard short packets */ 874 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 875 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 876 cbp->nsai = 1; /* (don't) disable source addr insert */ 877 cbp->preamble_length = 2; /* (7 byte) preamble */ 878 cbp->loopback = 0; /* (don't) loopback */ 879 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 880 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 881 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 882 cbp->promiscuous = prm; /* promiscuous mode */ 883 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 884 cbp->crscdt = 0; /* (CRS only) */ 885 cbp->stripping = !prm; /* truncate rx packet to byte count */ 886 cbp->padding = 1; /* (do) pad short tx packets */ 887 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 888 cbp->force_fdx = 0; /* (don't) force full duplex */ 889 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 890 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 891 cbp->mc_all = mcast; /* accept all multicasts */ 892 893 /* 894 * Start the config command/DMA. 895 */
| 1215 1216 /* 1217 * We temporarily use memory that contains the TxCB list to 1218 * construct the config CB. The TxCB list memory is rebuilt 1219 * later. 1220 */ 1221 cbp = (struct fxp_cb_config *) sc->cbl_base; 1222 1223 /* 1224 * This bcopy is kind of disgusting, but there are a bunch of must be 1225 * zero and must be one bits in this structure and this is the easiest 1226 * way to initialize them all to proper values. 1227 */ 1228 bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config)); 1229 1230 cbp->cb_status = 0; 1231 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1232 cbp->link_addr = -1; /* (no) next command */ 1233 cbp->byte_count = 22; /* (22) bytes to config */ 1234 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1235 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1236 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1237 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1238 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1239 cbp->dma_bce = 0; /* (disable) dma max counters */ 1240 cbp->late_scb = 0; /* (don't) defer SCB update */ 1241 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1242 cbp->ci_int = 0; /* interrupt on CU not active */ 1243 cbp->save_bf = prm; /* save bad frames */ 1244 cbp->disc_short_rx = !prm; /* discard short packets */ 1245 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1246 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1247 cbp->nsai = 1; /* (don't) disable source addr insert */ 1248 cbp->preamble_length = 2; /* (7 byte) preamble */ 1249 cbp->loopback = 0; /* (don't) loopback */ 1250 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1251 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1252 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1253 cbp->promiscuous = prm; /* promiscuous mode */ 1254 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1255 cbp->crscdt = 0; /* (CRS only) */ 1256 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1257 cbp->padding = 1; /* (do) pad short tx packets */ 1258 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1259 cbp->force_fdx = 0; /* (don't) force full duplex */ 1260 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1261 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1262 cbp->mc_all = mcast; /* accept all multicasts */ 1263 1264 /* 1265 * Start the config command/DMA. 1266 */
|
896 fxp_scb_wait(csr); 897 csr->scb_general = vtophys(cbp); 898 csr->scb_command = FXP_SCB_COMMAND_CU_START;
| 1267 fxp_scb_wait(sc); 1268 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(cbp)); 1269 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
899 /* ...and wait for it to complete. */ 900 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 901 902 /* 903 * Now initialize the station address. Temporarily use the TxCB 904 * memory area like we did above for the config CB. 905 */ 906 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 907 cb_ias->cb_status = 0; 908 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 909 cb_ias->link_addr = -1;
| 1270 /* ...and wait for it to complete. */ 1271 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1272 1273 /* 1274 * Now initialize the station address. Temporarily use the TxCB 1275 * memory area like we did above for the config CB. 1276 */ 1277 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1278 cb_ias->cb_status = 0; 1279 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1280 cb_ias->link_addr = -1;
|
| 1281#if defined(__NetBSD__) 1282 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1283#else
|
910 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 911 sizeof(sc->arpcom.ac_enaddr));
| 1284 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 1285 sizeof(sc->arpcom.ac_enaddr));
|
| 1286#endif /* __NetBSD__ */
|
912 913 /* 914 * Start the IAS (Individual Address Setup) command/DMA. 915 */
| 1287 1288 /* 1289 * Start the IAS (Individual Address Setup) command/DMA. 1290 */
|
916 fxp_scb_wait(csr); 917 csr->scb_command = FXP_SCB_COMMAND_CU_START;
| 1291 fxp_scb_wait(sc); 1292 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
918 /* ...and wait for it to complete. */ 919 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 920 921 /* 922 * Initialize transmit control block (TxCB) list. 923 */ 924 925 txp = sc->cbl_base; 926 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 927 for (i = 0; i < FXP_NTXCB; i++) { 928 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 929 txp[i].cb_command = FXP_CB_COMMAND_NOP; 930 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]); 931 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 932 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 933 } 934 /* 935 * Set the stop flag on the first TxCB and start the control 936 * unit. It will execute the NOP and then suspend. 937 */ 938 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 939 sc->cbl_first = sc->cbl_last = txp; 940 sc->tx_queued = 0; 941
| 1293 /* ...and wait for it to complete. */ 1294 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1295 1296 /* 1297 * Initialize transmit control block (TxCB) list. 1298 */ 1299 1300 txp = sc->cbl_base; 1301 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1302 for (i = 0; i < FXP_NTXCB; i++) { 1303 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1304 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1305 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]); 1306 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1307 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1308 } 1309 /* 1310 * Set the stop flag on the first TxCB and start the control 1311 * unit. It will execute the NOP and then suspend. 1312 */ 1313 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1314 sc->cbl_first = sc->cbl_last = txp; 1315 sc->tx_queued = 0; 1316
|
942 fxp_scb_wait(csr); 943 csr->scb_command = FXP_SCB_COMMAND_CU_START;
| 1317 fxp_scb_wait(sc); 1318 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
944 945 /* 946 * Initialize receiver buffer area - RFA. 947 */
| 1319 1320 /* 1321 * Initialize receiver buffer area - RFA. 1322 */
|
948 fxp_scb_wait(csr); 949 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf); 950 csr->scb_command = FXP_SCB_COMMAND_RU_START;
| 1323 fxp_scb_wait(sc); 1324 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1325 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1326 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
|
951 952 /*
| 1327 1328 /*
|
953 * Toggle a few bits in the PHY.
| 1329 * Set current media.
|
954 */
| 1330 */
|
| 1331 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1332 1333 ifp->if_flags |= IFF_RUNNING; 1334 ifp->if_flags &= ~IFF_OACTIVE; 1335 splx(s); 1336 1337 /* 1338 * Start stats updater. 1339 */ 1340 timeout(fxp_stats_update, sc, hz); 1341} 1342 1343void 1344fxp_set_media(sc, media) 1345 struct fxp_softc *sc; 1346 int media; 1347{ 1348
|
955 switch (sc->phy_primary_device) { 956 case FXP_PHY_DP83840: 957 case FXP_PHY_DP83840A:
| 1349 switch (sc->phy_primary_device) { 1350 case FXP_PHY_DP83840: 1351 case FXP_PHY_DP83840A:
|
958 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR, 959 fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR) |
| 1352 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1353 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) |
|
960 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 961 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 962 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 963 /* fall through */ 964 case FXP_PHY_82555:
| 1354 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1355 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1356 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1357 /* fall through */ 1358 case FXP_PHY_82555:
|
965 /* 966 * If link0 is set, disable auto-negotiation and then: 967 * If link1 is unset = 10Mbps 968 * If link1 is set = 100Mbps 969 * If link2 is unset = half duplex 970 * If link2 is set = full duplex 971 */ 972 if (ifp->if_flags & IFF_LINK0) {
| 1359 if (IFM_SUBTYPE(media) != IFM_AUTO) {
|
973 int flags; 974
| 1360 int flags; 1361
|
975 flags = (ifp->if_flags & IFF_LINK1) ? 976 FXP_PHY_BMCR_SPEED_100M : 0; 977 flags |= (ifp->if_flags & IFF_LINK2) ? 978 FXP_PHY_BMCR_FULLDUPLEX : 0; 979 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR, 980 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) &
| 1362 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1363 FXP_PHY_BMCR_SPEED_100M : 0; 1364 flags |= (media & IFM_FDX) ? 1365 FXP_PHY_BMCR_FULLDUPLEX : 0; 1366 fxp_mdi_write(sc, sc->phy_primary_addr, 1367 FXP_PHY_BMCR, 1368 (fxp_mdi_read(sc, sc->phy_primary_addr, 1369 FXP_PHY_BMCR) &
|
981 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 982 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 983 } else {
| 1370 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1371 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1372 } else {
|
984 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR, 985 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) | 986 FXP_PHY_BMCR_AUTOEN));
| 1373 fxp_mdi_write(sc, sc->phy_primary_addr, 1374 FXP_PHY_BMCR, 1375 (fxp_mdi_read(sc, sc->phy_primary_addr, 1376 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN));
|
987 } 988 break; 989 /* 990 * The Seeq 80c24 doesn't have a PHY programming interface, so do 991 * nothing. 992 */ 993 case FXP_PHY_80C24: 994 break; 995 default:
| 1377 } 1378 break; 1379 /* 1380 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1381 * nothing. 1382 */ 1383 case FXP_PHY_80C24: 1384 break; 1385 default:
|
996 printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n", 997 ifp->if_unit, sc->phy_primary_device, sc->phy_primary_addr);
| 1386 printf(FXP_FORMAT 1387 ": warning: unsupported PHY, type = %d, addr = %d\n", 1388 FXP_ARGS(sc), sc->phy_primary_device, 1389 sc->phy_primary_addr);
|
998 }
| 1390 }
|
| 1391}
|
999
| 1392
|
1000 ifp->if_flags |= IFF_RUNNING; 1001 ifp->if_flags &= ~IFF_OACTIVE; 1002 splx(s);
| 1393/* 1394 * Change media according to request. 1395 */ 1396int 1397fxp_mediachange(ifp) 1398 struct ifnet *ifp; 1399{ 1400 struct fxp_softc *sc = ifp->if_softc; 1401 struct ifmedia *ifm = &sc->sc_media;
|
1003
| 1402
|
1004 /* 1005 * Start stats updater. 1006 */ 1007 timeout(fxp_stats_update, sc, hz);
| 1403 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1404 return (EINVAL); 1405 1406 fxp_set_media(sc, ifm->ifm_media); 1407 return (0);
|
1008} 1009 1010/*
| 1408} 1409 1410/*
|
| 1411 * Notify the world which media we're using. 1412 */ 1413void 1414fxp_mediastatus(ifp, ifmr) 1415 struct ifnet *ifp; 1416 struct ifmediareq *ifmr; 1417{ 1418 struct fxp_softc *sc = ifp->if_softc; 1419 int flags; 1420 1421 switch (sc->phy_primary_device) { 1422 case FXP_PHY_DP83840: 1423 case FXP_PHY_DP83840A: 1424 case FXP_PHY_82555: 1425 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1426 ifmr->ifm_active = IFM_ETHER; 1427 if (flags & FXP_PHY_BMCR_AUTOEN) 1428 ifmr->ifm_active |= IFM_AUTO; 1429 else { 1430 if (flags & FXP_PHY_BMCR_SPEED_100M) 1431 ifmr->ifm_active |= IFM_100_TX; 1432 else 1433 ifmr->ifm_active |= IFM_10_T; 1434 1435 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1436 ifmr->ifm_active |= IFM_FDX; 1437 } 1438 break; 1439 1440 case FXP_PHY_80C24: 1441 default: 1442 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1443 } 1444} 1445 1446/*
|
1011 * Add a buffer to the end of the RFA buffer list. 1012 * Return 0 if successful, 1 for failure. A failure results in 1013 * adding the 'oldm' (if non-NULL) on to the end of the list - 1014 * tossing out it's old contents and recycling it. 1015 * The RFA struct is stuck at the beginning of mbuf cluster and the 1016 * data pointer is fixed up to point just past it. 1017 */ 1018static int 1019fxp_add_rfabuf(sc, oldm) 1020 struct fxp_softc *sc; 1021 struct mbuf *oldm; 1022{
| 1447 * Add a buffer to the end of the RFA buffer list. 1448 * Return 0 if successful, 1 for failure. A failure results in 1449 * adding the 'oldm' (if non-NULL) on to the end of the list - 1450 * tossing out it's old contents and recycling it. 1451 * The RFA struct is stuck at the beginning of mbuf cluster and the 1452 * data pointer is fixed up to point just past it. 1453 */ 1454static int 1455fxp_add_rfabuf(sc, oldm) 1456 struct fxp_softc *sc; 1457 struct mbuf *oldm; 1458{
|
| 1459 u_int32_t v;
|
1023 struct mbuf *m; 1024 struct fxp_rfa *rfa, *p_rfa; 1025 1026 MGETHDR(m, M_DONTWAIT, MT_DATA); 1027 if (m != NULL) { 1028 MCLGET(m, M_DONTWAIT); 1029 if ((m->m_flags & M_EXT) == 0) { 1030 m_freem(m); 1031 if (oldm == NULL) 1032 return 1; 1033 m = oldm; 1034 m->m_data = m->m_ext.ext_buf; 1035 } 1036 } else { 1037 if (oldm == NULL) 1038 return 1; 1039 m = oldm; 1040 m->m_data = m->m_ext.ext_buf; 1041 }
| 1460 struct mbuf *m; 1461 struct fxp_rfa *rfa, *p_rfa; 1462 1463 MGETHDR(m, M_DONTWAIT, MT_DATA); 1464 if (m != NULL) { 1465 MCLGET(m, M_DONTWAIT); 1466 if ((m->m_flags & M_EXT) == 0) { 1467 m_freem(m); 1468 if (oldm == NULL) 1469 return 1; 1470 m = oldm; 1471 m->m_data = m->m_ext.ext_buf; 1472 } 1473 } else { 1474 if (oldm == NULL) 1475 return 1; 1476 m = oldm; 1477 m->m_data = m->m_ext.ext_buf; 1478 }
|
| 1479
|
1042 /*
| 1480 /*
|
| 1481 * Move the data pointer up so that the incoming data packet 1482 * will be 32-bit aligned. 1483 */ 1484 m->m_data += RFA_ALIGNMENT_FUDGE; 1485 1486 /*
|
1043 * Get a pointer to the base of the mbuf cluster and move 1044 * data start past it. 1045 */ 1046 rfa = mtod(m, struct fxp_rfa *); 1047 m->m_data += sizeof(struct fxp_rfa);
| 1487 * Get a pointer to the base of the mbuf cluster and move 1488 * data start past it. 1489 */ 1490 rfa = mtod(m, struct fxp_rfa *); 1491 m->m_data += sizeof(struct fxp_rfa);
|
1048 rfa->size = MCLBYTES - sizeof(struct fxp_rfa);
| 1492 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE;
|
1049
| 1493
|
| 1494 /* 1495 * Initialize the rest of the RFA. Note that since the RFA 1496 * is misaligned, we cannot store values directly. Instead, 1497 * we use an optimized, inline copy. 1498 */
|
1050 rfa->rfa_status = 0; 1051 rfa->rfa_control = FXP_RFA_CONTROL_EL;
| 1499 rfa->rfa_status = 0; 1500 rfa->rfa_control = FXP_RFA_CONTROL_EL;
|
1052 rfa->link_addr = -1; 1053 rfa->rbd_addr = -1;
| |
1054 rfa->actual_size = 0;
| 1501 rfa->actual_size = 0;
|
| 1502 1503 v = -1; 1504 fxp_lwcopy(&v, &rfa->link_addr); 1505 fxp_lwcopy(&v, &rfa->rbd_addr); 1506
|
1055 /* 1056 * If there are other buffers already on the list, attach this 1057 * one to the end by fixing up the tail to point to this one. 1058 */ 1059 if (sc->rfa_headm != NULL) {
| 1507 /* 1508 * If there are other buffers already on the list, attach this 1509 * one to the end by fixing up the tail to point to this one. 1510 */ 1511 if (sc->rfa_headm != NULL) {
|
1060 p_rfa = (struct fxp_rfa *) sc->rfa_tailm->m_ext.ext_buf;
| 1512 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1513 RFA_ALIGNMENT_FUDGE);
|
1061 sc->rfa_tailm->m_next = m;
| 1514 sc->rfa_tailm->m_next = m;
|
1062 p_rfa->link_addr = vtophys(rfa);
| 1515 v = vtophys(rfa); 1516 fxp_lwcopy(&v, &p_rfa->link_addr);
|
1063 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1064 } else { 1065 sc->rfa_headm = m; 1066 } 1067 sc->rfa_tailm = m; 1068 1069 return (m == oldm); 1070} 1071 1072static volatile int
| 1517 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1518 } else { 1519 sc->rfa_headm = m; 1520 } 1521 sc->rfa_tailm = m; 1522 1523 return (m == oldm); 1524} 1525 1526static volatile int
|
1073fxp_mdi_read(csr, phy, reg) 1074 struct fxp_csr *csr;
| 1527fxp_mdi_read(sc, phy, reg) 1528 struct fxp_softc *sc;
|
1075 int phy; 1076 int reg; 1077{ 1078 int count = 10000; 1079 int value; 1080
| 1529 int phy; 1530 int reg; 1531{ 1532 int count = 10000; 1533 int value; 1534
|
1081 csr->mdi_control = (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21);
| 1535 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1536 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21));
|
1082
| 1537
|
1083 while (((value = csr->mdi_control) & 0x10000000) == 0 && count--)
| 1538 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1539 && count--)
|
1084 DELAY(10); 1085 1086 if (count <= 0)
| 1540 DELAY(10); 1541 1542 if (count <= 0)
|
1087 printf("fxp_mdi_read: timed out\n");
| 1543 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1544 FXP_ARGS(sc));
|
1088 1089 return (value & 0xffff); 1090} 1091 1092static void
| 1545 1546 return (value & 0xffff); 1547} 1548 1549static void
|
1093fxp_mdi_write(csr, phy, reg, value) 1094 struct fxp_csr *csr;
| 1550fxp_mdi_write(sc, phy, reg, value) 1551 struct fxp_softc *sc;
|
1095 int phy; 1096 int reg; 1097 int value; 1098{ 1099 int count = 10000; 1100
| 1552 int phy; 1553 int reg; 1554 int value; 1555{ 1556 int count = 10000; 1557
|
1101 csr->mdi_control = (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) 1102 | (value & 0xffff);
| 1558 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1559 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1560 (value & 0xffff));
|
1103
| 1561
|
1104 while ((csr->mdi_control & 0x10000000) == 0 && count--)
| 1562 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1563 count--)
|
1105 DELAY(10); 1106 1107 if (count <= 0)
| 1564 DELAY(10); 1565 1566 if (count <= 0)
|
1108 printf("fxp_mdi_write: timed out\n");
| 1567 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1568 FXP_ARGS(sc));
|
1109} 1110 1111static int 1112fxp_ioctl(ifp, command, data) 1113 struct ifnet *ifp;
| 1569} 1570 1571static int 1572fxp_ioctl(ifp, command, data) 1573 struct ifnet *ifp;
|
1114 int command;
| 1574 FXP_IOCTLCMD_TYPE command;
|
1115 caddr_t data; 1116{
| 1575 caddr_t data; 1576{
|
1117 struct ifaddr *ifa = (struct ifaddr *) data;
| |
1118 struct fxp_softc *sc = ifp->if_softc;
| 1577 struct fxp_softc *sc = ifp->if_softc;
|
1119 struct ifreq *ifr = (struct ifreq *) data;
| 1578 struct ifreq *ifr = (struct ifreq *)data;
|
1120 int s, error = 0; 1121 1122 s = splimp(); 1123 1124 switch (command) { 1125 1126 case SIOCSIFADDR:
| 1579 int s, error = 0; 1580 1581 s = splimp(); 1582 1583 switch (command) { 1584 1585 case SIOCSIFADDR:
|
| 1586#if !defined(__NetBSD__)
|
1127 case SIOCGIFADDR: 1128 case SIOCSIFMTU:
| 1587 case SIOCGIFADDR: 1588 case SIOCSIFMTU:
|
| 1589#endif
|
1129 error = ether_ioctl(ifp, command, data); 1130 break; 1131 1132 case SIOCSIFFLAGS: 1133 1134 /* 1135 * If interface is marked up and not running, then start it. 1136 * If it is marked down and running, stop it. 1137 * XXX If it's up then re-initialize it. This is so flags 1138 * such as IFF_PROMISC are handled. 1139 */ 1140 if (ifp->if_flags & IFF_UP) { 1141 fxp_init(sc); 1142 } else { 1143 if (ifp->if_flags & IFF_RUNNING) 1144 fxp_stop(sc); 1145 } 1146 break; 1147 1148 case SIOCADDMULTI: 1149 case SIOCDELMULTI:
| 1590 error = ether_ioctl(ifp, command, data); 1591 break; 1592 1593 case SIOCSIFFLAGS: 1594 1595 /* 1596 * If interface is marked up and not running, then start it. 1597 * If it is marked down and running, stop it. 1598 * XXX If it's up then re-initialize it. This is so flags 1599 * such as IFF_PROMISC are handled. 1600 */ 1601 if (ifp->if_flags & IFF_UP) { 1602 fxp_init(sc); 1603 } else { 1604 if (ifp->if_flags & IFF_RUNNING) 1605 fxp_stop(sc); 1606 } 1607 break; 1608 1609 case SIOCADDMULTI: 1610 case SIOCDELMULTI:
|
| 1611#if defined(__NetBSD__) 1612 { 1613 struct ifreq *ifr = (struct ifreq *) data; 1614 1615 error = (command == SIOCADDMULTI) ? 1616 ether_addmulti(ifr, &sc->sc_ethercom) : 1617 ether_delmulti(ifr, &sc->sc_ethercom); 1618 1619 if (error == ENETRESET) { 1620 /* 1621 * Multicast list has changed; set the hardware 1622 * filter accordingly. 1623 */ 1624 fxp_init(sc); 1625 error = 0; 1626 } 1627 } 1628#else /* __FreeBSD__ */
|
1150 /* 1151 * Multicast list has changed; set the hardware filter 1152 * accordingly. 1153 */ 1154 fxp_init(sc); 1155 error = 0;
| 1629 /* 1630 * Multicast list has changed; set the hardware filter 1631 * accordingly. 1632 */ 1633 fxp_init(sc); 1634 error = 0;
|
| 1635#endif /* __NetBSD__ */
|
1156 break; 1157
| 1636 break; 1637
|
| 1638 case SIOCSIFMEDIA: 1639 case SIOCGIFMEDIA: 1640 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1641 break; 1642
|
1158 default: 1159 error = EINVAL; 1160 } 1161 (void) splx(s); 1162 return (error); 1163}
| 1643 default: 1644 error = EINVAL; 1645 } 1646 (void) splx(s); 1647 return (error); 1648}
|