if_fxp.c (111119) | if_fxp.c (111578) |
---|---|
1/*- 2 * Copyright (c) 1995, David Greenman 3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 11 unchanged lines hidden (view full) --- 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * | 1/*- 2 * Copyright (c) 1995, David Greenman 3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 11 unchanged lines hidden (view full) --- 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * |
28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 111119 2003-02-19 05:47:46Z imp $ | 28 * $FreeBSD: head/sys/dev/fxp/if_fxp.c 111578 2003-02-26 22:12:04Z wpaul $ |
29 */ 30 31/* 32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 33 */ 34 35#include <sys/param.h> 36#include <sys/systm.h> --- 25 unchanged lines hidden (view full) --- 62 63#include <vm/vm.h> /* for vtophys */ 64#include <vm/pmap.h> /* for vtophys */ 65#include <machine/clock.h> /* for DELAY */ 66 67#include <net/if_types.h> 68#include <net/if_vlan_var.h> 69 | 29 */ 30 31/* 32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 33 */ 34 35#include <sys/param.h> 36#include <sys/systm.h> --- 25 unchanged lines hidden (view full) --- 62 63#include <vm/vm.h> /* for vtophys */ 64#include <vm/pmap.h> /* for vtophys */ 65#include <machine/clock.h> /* for DELAY */ 66 67#include <net/if_types.h> 68#include <net/if_vlan_var.h> 69 |
70#ifdef FXP_IP_CSUM_WAR 71#include <netinet/in.h> 72#include <netinet/in_systm.h> 73#include <netinet/ip.h> 74#include <machine/in_cksum.h> 75#endif 76 |
|
70#include <pci/pcivar.h> 71#include <pci/pcireg.h> /* for PCIM_CMD_xxx */ 72 73#include <dev/mii/mii.h> 74#include <dev/mii/miivar.h> 75 76#include <dev/fxp/if_fxpreg.h> 77#include <dev/fxp/if_fxpvar.h> --- 86 unchanged lines hidden (view full) --- 164 { 0x103B, "Intel Pro/100 Ethernet" }, 165 { 0x103C, "Intel Pro/100 Ethernet" }, 166 { 0x103D, "Intel Pro/100 Ethernet" }, 167 { 0x103E, "Intel Pro/100 Ethernet" }, 168 { 0x1059, "Intel Pro/100 M Mobile Connection" }, 169 { 0, NULL }, 170}; 171 | 77#include <pci/pcivar.h> 78#include <pci/pcireg.h> /* for PCIM_CMD_xxx */ 79 80#include <dev/mii/mii.h> 81#include <dev/mii/miivar.h> 82 83#include <dev/fxp/if_fxpreg.h> 84#include <dev/fxp/if_fxpvar.h> --- 86 unchanged lines hidden (view full) --- 171 { 0x103B, "Intel Pro/100 Ethernet" }, 172 { 0x103C, "Intel Pro/100 Ethernet" }, 173 { 0x103D, "Intel Pro/100 Ethernet" }, 174 { 0x103E, "Intel Pro/100 Ethernet" }, 175 { 0x1059, "Intel Pro/100 M Mobile Connection" }, 176 { 0, NULL }, 177}; 178 |
179#ifdef FXP_IP_CSUM_WAR 180#define FXP_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 181#else 182#define FXP_CSUM_FEATURES (CSUM_TCP | CSUM_UDP) 183#endif 184 |
|
172static int fxp_probe(device_t dev); 173static int fxp_attach(device_t dev); 174static int fxp_detach(device_t dev); 175static int fxp_shutdown(device_t dev); 176static int fxp_suspend(device_t dev); 177static int fxp_resume(device_t dev); 178 179static void fxp_intr(void *xsc); --- 408 unchanged lines hidden (view full) --- 588 /* turn on the extended TxCB feature */ 589 sc->flags |= FXP_FLAG_EXT_TXCB; 590 591 /* enable reception of long frames for VLAN */ 592 sc->flags |= FXP_FLAG_LONG_PKT_EN; 593 } 594 595 /* | 185static int fxp_probe(device_t dev); 186static int fxp_attach(device_t dev); 187static int fxp_detach(device_t dev); 188static int fxp_shutdown(device_t dev); 189static int fxp_suspend(device_t dev); 190static int fxp_resume(device_t dev); 191 192static void fxp_intr(void *xsc); --- 408 unchanged lines hidden (view full) --- 601 /* turn on the extended TxCB feature */ 602 sc->flags |= FXP_FLAG_EXT_TXCB; 603 604 /* enable reception of long frames for VLAN */ 605 sc->flags |= FXP_FLAG_LONG_PKT_EN; 606 } 607 608 /* |
609 * Enable use of extended RFDs and TCBs for 82550 610 * and later chips. Note: we need extended TXCB support 611 * too, but that's already enabled by the code above. 612 * Be careful to do this only on the right devices. 613 */ 614 615 if (sc->revision == FXP_REV_82550 || sc->revision == FXP_REV_82550_C) { 616 sc->rfa_size = sizeof (struct fxp_rfa); 617 sc->tx_cmd = FXP_CB_COMMAND_IPCBXMIT; 618 sc->flags |= FXP_FLAG_EXT_RFA; 619 } else { 620 sc->rfa_size = sizeof (struct fxp_rfa) - FXP_RFAX_LEN; 621 sc->tx_cmd = FXP_CB_COMMAND_XMIT; 622 } 623 624 /* |
|
596 * Read MAC address. 597 */ 598 fxp_read_eeprom(sc, (u_int16_t *)sc->arpcom.ac_enaddr, 0, 3); 599 device_printf(dev, "Ethernet address %6D%s\n", 600 sc->arpcom.ac_enaddr, ":", 601 sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : ""); 602 if (bootverbose) { 603 device_printf(dev, "PCI IDs: %04x %04x %04x %04x %04x\n", --- 35 unchanged lines hidden (view full) --- 639 ifp->if_baudrate = 100000000; 640 ifp->if_init = fxp_init; 641 ifp->if_softc = sc; 642 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 643 ifp->if_ioctl = fxp_ioctl; 644 ifp->if_start = fxp_start; 645 ifp->if_watchdog = fxp_watchdog; 646 | 625 * Read MAC address. 626 */ 627 fxp_read_eeprom(sc, (u_int16_t *)sc->arpcom.ac_enaddr, 0, 3); 628 device_printf(dev, "Ethernet address %6D%s\n", 629 sc->arpcom.ac_enaddr, ":", 630 sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : ""); 631 if (bootverbose) { 632 device_printf(dev, "PCI IDs: %04x %04x %04x %04x %04x\n", --- 35 unchanged lines hidden (view full) --- 668 ifp->if_baudrate = 100000000; 669 ifp->if_init = fxp_init; 670 ifp->if_softc = sc; 671 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 672 ifp->if_ioctl = fxp_ioctl; 673 ifp->if_start = fxp_start; 674 ifp->if_watchdog = fxp_watchdog; 675 |
676 /* Enable checksum offload for 82550 or better chips */ 677 678 if (sc->flags & FXP_FLAG_EXT_RFA) { 679 ifp->if_hwassist = FXP_CSUM_FEATURES; 680 ifp->if_capabilities = IFCAP_HWCSUM; 681 } 682 |
|
647 /* 648 * Attach the interface. 649 */ 650 ether_ifattach(ifp, sc->arpcom.ac_enaddr); 651 652 /* 653 * Tell the upper layer(s) we support long frames. 654 */ --- 353 unchanged lines hidden (view full) --- 1008/* 1009 * Start packet transmission on the interface. 1010 */ 1011static void 1012fxp_start(struct ifnet *ifp) 1013{ 1014 struct fxp_softc *sc = ifp->if_softc; 1015 struct fxp_cb_tx *txp; | 683 /* 684 * Attach the interface. 685 */ 686 ether_ifattach(ifp, sc->arpcom.ac_enaddr); 687 688 /* 689 * Tell the upper layer(s) we support long frames. 690 */ --- 353 unchanged lines hidden (view full) --- 1044/* 1045 * Start packet transmission on the interface. 1046 */ 1047static void 1048fxp_start(struct ifnet *ifp) 1049{ 1050 struct fxp_softc *sc = ifp->if_softc; 1051 struct fxp_cb_tx *txp; |
1052 volatile struct fxp_tbd *bdptr; |
|
1016 1017 /* 1018 * See if we need to suspend xmit until the multicast filter 1019 * has been reprogrammed (which can only be done at the head 1020 * of the command chain). 1021 */ 1022 if (sc->need_mcsetup) { 1023 return; --- 17 unchanged lines hidden (view full) --- 1041 IF_DEQUEUE(&ifp->if_snd, mb_head); 1042 1043 /* 1044 * Get pointer to next available tx desc. 1045 */ 1046 txp = sc->cbl_last->next; 1047 1048 /* | 1053 1054 /* 1055 * See if we need to suspend xmit until the multicast filter 1056 * has been reprogrammed (which can only be done at the head 1057 * of the command chain). 1058 */ 1059 if (sc->need_mcsetup) { 1060 return; --- 17 unchanged lines hidden (view full) --- 1078 IF_DEQUEUE(&ifp->if_snd, mb_head); 1079 1080 /* 1081 * Get pointer to next available tx desc. 1082 */ 1083 txp = sc->cbl_last->next; 1084 1085 /* |
1086 * If this is an 82550/82551, then we're using extended 1087 * TxCBs _and_ we're using checksum offload. This means 1088 * that the TxCB is really an IPCB. One major difference 1089 * between the two is that with plain extended TxCBs, 1090 * the bottom half of the TxCB contains two entries from 1091 * the TBD array, whereas IPCBs contain just one entry: 1092 * one entry (8 bytes) has been sacrificed for the TCP/IP 1093 * checksum offload control bits. So to make things work 1094 * right, we have to start filling in the TBD array 1095 * starting from a different place depending on whether 1096 * the chip is an 82550/82551 or not. 1097 */ 1098 1099 bdptr = &txp->tbd[0]; 1100 if (sc->flags & FXP_FLAG_EXT_RFA) 1101 bdptr++; 1102 1103 /* 1104 * Deal with TCP/IP checksum offload. Note that 1105 * in order for TCP checksum offload to work, 1106 * the pseudo header checksum must have already 1107 * been computed and stored in the checksum field 1108 * in the TCP header. The stack should have 1109 * already done this for us. 1110 */ 1111 1112 if (mb_head->m_pkthdr.csum_flags) { 1113 if (mb_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) { 1114 txp->ipcb_ip_activation_high = 1115 FXP_IPCB_HARDWAREPARSING_ENABLE; 1116 txp->ipcb_ip_schedule = 1117 FXP_IPCB_TCPUDP_CHECKSUM_ENABLE; 1118 if (mb_head->m_pkthdr.csum_flags & CSUM_TCP) 1119 txp->ipcb_ip_schedule |= 1120 FXP_IPCB_TCP_PACKET; 1121 } 1122#ifdef FXP_IP_CSUM_WAR 1123 /* 1124 * XXX The 82550 chip appears to have trouble 1125 * dealing with IP header checksums in very small 1126 * datagrams, namely fragments from 1 to 3 bytes 1127 * in size. For example, say you want to transmit 1128 * a UDP packet of 1473 bytes. The packet will be 1129 * fragmented over two IP datagrams, the latter 1130 * containing only one byte of data. The 82550 will 1131 * botch the header checksum on the 1-byte fragment. 1132 * As long as the datagram contains 4 or more bytes 1133 * of data, you're ok. 1134 * 1135 * The following code attempts to work around this 1136 * problem: if the datagram is less than 38 bytes 1137 * in size (14 bytes ether header, 20 bytes IP header, 1138 * plus 4 bytes of data), we punt and compute the IP 1139 * header checksum by hand. This workaround doesn't 1140 * work very well, however, since it can be fooled 1141 * by things like VLAN tags and IP options that make 1142 * the header sizes/offsets vary. 1143 */ 1144 1145 if (mb_head->m_pkthdr.csum_flags & CSUM_IP) { 1146 if (mb_head->m_pkthdr.len < 38) { 1147 struct ip *ip; 1148 mb_head->m_data += ETHER_HDR_LEN; 1149 ip = mtod(mb_head, struct ip *); 1150 ip->ip_sum = in_cksum(mb_head, 1151 ip->ip_hl << 2); 1152 mb_head->m_data -= ETHER_HDR_LEN; 1153 } else { 1154 txp->ipcb_ip_activation_high = 1155 FXP_IPCB_HARDWAREPARSING_ENABLE; 1156 txp->ipcb_ip_schedule |= 1157 FXP_IPCB_IP_CHECKSUM_ENABLE; 1158 } 1159 } 1160#endif 1161 } 1162 1163 /* |
|
1049 * Go through each of the mbufs in the chain and initialize 1050 * the transmit buffer descriptors with the physical address 1051 * and size of the mbuf. 1052 */ 1053tbdinit: 1054 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 1055 if (m->m_len != 0) { | 1164 * Go through each of the mbufs in the chain and initialize 1165 * the transmit buffer descriptors with the physical address 1166 * and size of the mbuf. 1167 */ 1168tbdinit: 1169 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 1170 if (m->m_len != 0) { |
1056 if (segment == FXP_NTXSEG) | 1171 if (segment == (FXP_NTXSEG - 1)) |
1057 break; | 1172 break; |
1058 txp->tbd[segment].tb_addr = | 1173 bdptr[segment].tb_addr = |
1059 vtophys(mtod(m, vm_offset_t)); | 1174 vtophys(mtod(m, vm_offset_t)); |
1060 txp->tbd[segment].tb_size = m->m_len; | 1175 bdptr[segment].tb_size = m->m_len; |
1061 segment++; 1062 } 1063 } 1064 if (m != NULL) { 1065 struct mbuf *mn; 1066 1067 /* 1068 * We ran out of segments. We have to recopy this --- 16 unchanged lines hidden (view full) --- 1085 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1086 mtod(mn, caddr_t)); 1087 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1088 m_freem(mb_head); 1089 mb_head = mn; 1090 goto tbdinit; 1091 } 1092 | 1176 segment++; 1177 } 1178 } 1179 if (m != NULL) { 1180 struct mbuf *mn; 1181 1182 /* 1183 * We ran out of segments. We have to recopy this --- 16 unchanged lines hidden (view full) --- 1200 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1201 mtod(mn, caddr_t)); 1202 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1203 m_freem(mb_head); 1204 mb_head = mn; 1205 goto tbdinit; 1206 } 1207 |
1208 txp->byte_count = 0; |
|
1093 txp->tbd_number = segment; 1094 txp->mb_head = mb_head; 1095 txp->cb_status = 0; 1096 if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 1097 txp->cb_command = | 1209 txp->tbd_number = segment; 1210 txp->mb_head = mb_head; 1211 txp->cb_status = 0; 1212 if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 1213 txp->cb_command = |
1098 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | | 1214 sc->tx_cmd | FXP_CB_COMMAND_SF | |
1099 FXP_CB_COMMAND_S; 1100 } else { 1101 txp->cb_command = | 1215 FXP_CB_COMMAND_S; 1216 } else { 1217 txp->cb_command = |
1102 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | | 1218 sc->tx_cmd | FXP_CB_COMMAND_SF | |
1103 FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1104 /* 1105 * Set a 5 second timer just in case we don't hear 1106 * from the card again. 1107 */ 1108 ifp->if_timer = 5; 1109 } 1110 txp->tx_threshold = tx_threshold; --- 154 unchanged lines hidden (view full) --- 1265 struct fxp_cb_tx *txp; 1266 1267 for (txp = sc->cbl_first; sc->tx_queued && 1268 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1269 txp = txp->next) { 1270 if (txp->mb_head != NULL) { 1271 m_freem(txp->mb_head); 1272 txp->mb_head = NULL; | 1219 FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1220 /* 1221 * Set a 5 second timer just in case we don't hear 1222 * from the card again. 1223 */ 1224 ifp->if_timer = 5; 1225 } 1226 txp->tx_threshold = tx_threshold; --- 154 unchanged lines hidden (view full) --- 1381 struct fxp_cb_tx *txp; 1382 1383 for (txp = sc->cbl_first; sc->tx_queued && 1384 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1385 txp = txp->next) { 1386 if (txp->mb_head != NULL) { 1387 m_freem(txp->mb_head); 1388 txp->mb_head = NULL; |
1389 /* clear this to reset csum offload bits */ 1390 txp->tbd[0].tb_addr = 0; |
|
1273 } 1274 sc->tx_queued--; 1275 } 1276 sc->cbl_first = txp; 1277 ifp->if_timer = 0; 1278 if (sc->tx_queued == 0) { 1279 if (sc->need_mcsetup) 1280 fxp_mc_setup(sc); --- 66 unchanged lines hidden (view full) --- 1347 if (total_len < sizeof(struct ether_header) || 1348 total_len > MCLBYTES - RFA_ALIGNMENT_FUDGE - 1349 sizeof(struct fxp_rfa) || 1350 rfa->rfa_status & FXP_RFA_STATUS_CRC) { 1351 m_freem(m); 1352 continue; 1353 } 1354 | 1391 } 1392 sc->tx_queued--; 1393 } 1394 sc->cbl_first = txp; 1395 ifp->if_timer = 0; 1396 if (sc->tx_queued == 0) { 1397 if (sc->need_mcsetup) 1398 fxp_mc_setup(sc); --- 66 unchanged lines hidden (view full) --- 1465 if (total_len < sizeof(struct ether_header) || 1466 total_len > MCLBYTES - RFA_ALIGNMENT_FUDGE - 1467 sizeof(struct fxp_rfa) || 1468 rfa->rfa_status & FXP_RFA_STATUS_CRC) { 1469 m_freem(m); 1470 continue; 1471 } 1472 |
1473 /* Do IP checksum checking. */ 1474 if (rfa->rfa_status & FXP_RFA_STATUS_PARSE) { 1475 if (rfa->rfax_csum_sts & 1476 FXP_RFDX_CS_IP_CSUM_BIT_VALID) 1477 m->m_pkthdr.csum_flags |= 1478 CSUM_IP_CHECKED; 1479 if (rfa->rfax_csum_sts & 1480 FXP_RFDX_CS_IP_CSUM_VALID) 1481 m->m_pkthdr.csum_flags |= 1482 CSUM_IP_VALID; 1483 if ((rfa->rfax_csum_sts & 1484 FXP_RFDX_CS_TCPUDP_CSUM_BIT_VALID) && 1485 (rfa->rfax_csum_sts & 1486 FXP_RFDX_CS_TCPUDP_CSUM_VALID)) { 1487 m->m_pkthdr.csum_flags |= 1488 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 1489 m->m_pkthdr.csum_data = 0xffff; 1490 } 1491 } 1492 |
|
1355 m->m_pkthdr.len = m->m_len = total_len; 1356 m->m_pkthdr.rcvif = ifp; 1357 1358 (*ifp->if_input)(ifp, m); 1359 } 1360 } 1361 if (rnr) { 1362 fxp_scb_wait(sc); --- 58 unchanged lines hidden (view full) --- 1421 * the delay to a maximum of one second. 1422 */ 1423 for (txp = sc->cbl_first; sc->tx_queued && 1424 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1425 txp = txp->next) { 1426 if (txp->mb_head != NULL) { 1427 m_freem(txp->mb_head); 1428 txp->mb_head = NULL; | 1493 m->m_pkthdr.len = m->m_len = total_len; 1494 m->m_pkthdr.rcvif = ifp; 1495 1496 (*ifp->if_input)(ifp, m); 1497 } 1498 } 1499 if (rnr) { 1500 fxp_scb_wait(sc); --- 58 unchanged lines hidden (view full) --- 1559 * the delay to a maximum of one second. 1560 */ 1561 for (txp = sc->cbl_first; sc->tx_queued && 1562 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1563 txp = txp->next) { 1564 if (txp->mb_head != NULL) { 1565 m_freem(txp->mb_head); 1566 txp->mb_head = NULL; |
1567 /* clear this to reset csum offload bits */ 1568 txp->tbd[0].tb_addr = 0; |
|
1429 } 1430 sc->tx_queued--; 1431 } 1432 sc->cbl_first = txp; 1433 /* 1434 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1435 * then assume the receiver has locked up and attempt to clear 1436 * the condition by reprogramming the multicast filter. This is --- 74 unchanged lines hidden (view full) --- 1511 * Release any xmit buffers. 1512 */ 1513 txp = sc->cbl_base; 1514 if (txp != NULL) { 1515 for (i = 0; i < FXP_NTXCB; i++) { 1516 if (txp[i].mb_head != NULL) { 1517 m_freem(txp[i].mb_head); 1518 txp[i].mb_head = NULL; | 1569 } 1570 sc->tx_queued--; 1571 } 1572 sc->cbl_first = txp; 1573 /* 1574 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1575 * then assume the receiver has locked up and attempt to clear 1576 * the condition by reprogramming the multicast filter. This is --- 74 unchanged lines hidden (view full) --- 1651 * Release any xmit buffers. 1652 */ 1653 txp = sc->cbl_base; 1654 if (txp != NULL) { 1655 for (i = 0; i < FXP_NTXCB; i++) { 1656 if (txp[i].mb_head != NULL) { 1657 m_freem(txp[i].mb_head); 1658 txp[i].mb_head = NULL; |
1659 /* clear this to reset csum offload bits */ 1660 txp[i].tbd[0].tb_addr = 0; |
|
1519 } 1520 } 1521 } 1522 sc->tx_queued = 0; 1523 1524 /* 1525 * Free all the receive buffers then reallocate/reinitialize 1526 */ --- 104 unchanged lines hidden (view full) --- 1631 */ 1632 bcopy(fxp_cb_config_template, 1633 (void *)(uintptr_t)(volatile void *)&cbp->cb_status, 1634 sizeof(fxp_cb_config_template)); 1635 1636 cbp->cb_status = 0; 1637 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1638 cbp->link_addr = -1; /* (no) next command */ | 1661 } 1662 } 1663 } 1664 sc->tx_queued = 0; 1665 1666 /* 1667 * Free all the receive buffers then reallocate/reinitialize 1668 */ --- 104 unchanged lines hidden (view full) --- 1773 */ 1774 bcopy(fxp_cb_config_template, 1775 (void *)(uintptr_t)(volatile void *)&cbp->cb_status, 1776 sizeof(fxp_cb_config_template)); 1777 1778 cbp->cb_status = 0; 1779 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1780 cbp->link_addr = -1; /* (no) next command */ |
1639 cbp->byte_count = 22; /* (22) bytes to config */ | 1781 cbp->byte_count = sc->flags & FXP_FLAG_EXT_RFA ? 32 : 22; |
1640 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1641 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1642 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1643 cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; 1644 cbp->type_enable = 0; /* actually reserved */ 1645 cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; 1646 cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; 1647 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ --- 6 unchanged lines hidden (view full) --- 1654 cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; 1655 cbp->ext_stats_dis = 1; /* disable extended counters */ 1656 cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ 1657 cbp->save_bf = sc->revision == FXP_REV_82557 ? 1 : prm; 1658 cbp->disc_short_rx = !prm; /* discard short packets */ 1659 cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ 1660 cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ 1661 cbp->dyn_tbd = 0; /* (no) dynamic TBD mode */ | 1782 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1783 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1784 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1785 cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; 1786 cbp->type_enable = 0; /* actually reserved */ 1787 cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; 1788 cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; 1789 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ --- 6 unchanged lines hidden (view full) --- 1796 cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; 1797 cbp->ext_stats_dis = 1; /* disable extended counters */ 1798 cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ 1799 cbp->save_bf = sc->revision == FXP_REV_82557 ? 1 : prm; 1800 cbp->disc_short_rx = !prm; /* discard short packets */ 1801 cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ 1802 cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ 1803 cbp->dyn_tbd = 0; /* (no) dynamic TBD mode */ |
1804 cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; |
|
1662 cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; 1663 cbp->csma_dis = 0; /* (don't) disable link */ 1664 cbp->tcp_udp_cksum = 0; /* (don't) enable checksum */ 1665 cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ 1666 cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ 1667 cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ 1668 cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ 1669 cbp->nsai = 1; /* (don't) disable source addr insert */ --- 15 unchanged lines hidden (view full) --- 1685 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; 1686 cbp->ia_wake_en = 0; /* (don't) wake up on address match */ 1687 cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */ 1688 /* must set wake_en in PMCSR also */ 1689 cbp->force_fdx = 0; /* (don't) force full duplex */ 1690 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1691 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1692 cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0; | 1805 cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; 1806 cbp->csma_dis = 0; /* (don't) disable link */ 1807 cbp->tcp_udp_cksum = 0; /* (don't) enable checksum */ 1808 cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ 1809 cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ 1810 cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ 1811 cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ 1812 cbp->nsai = 1; /* (don't) disable source addr insert */ --- 15 unchanged lines hidden (view full) --- 1828 cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; 1829 cbp->ia_wake_en = 0; /* (don't) wake up on address match */ 1830 cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */ 1831 /* must set wake_en in PMCSR also */ 1832 cbp->force_fdx = 0; /* (don't) force full duplex */ 1833 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1834 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1835 cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0; |
1836 cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; |
|
1693 1694 if (sc->revision == FXP_REV_82557) { 1695 /* 1696 * The 82557 has no hardware flow control, the values 1697 * below are the defaults for the chip. 1698 */ 1699 cbp->fc_delay_lsb = 0; 1700 cbp->fc_delay_msb = 0x40; --- 186 unchanged lines hidden (view full) --- 1887 */ 1888 m->m_data += RFA_ALIGNMENT_FUDGE; 1889 1890 /* 1891 * Get a pointer to the base of the mbuf cluster and move 1892 * data start past it. 1893 */ 1894 rfa = mtod(m, struct fxp_rfa *); | 1837 1838 if (sc->revision == FXP_REV_82557) { 1839 /* 1840 * The 82557 has no hardware flow control, the values 1841 * below are the defaults for the chip. 1842 */ 1843 cbp->fc_delay_lsb = 0; 1844 cbp->fc_delay_msb = 0x40; --- 186 unchanged lines hidden (view full) --- 2031 */ 2032 m->m_data += RFA_ALIGNMENT_FUDGE; 2033 2034 /* 2035 * Get a pointer to the base of the mbuf cluster and move 2036 * data start past it. 2037 */ 2038 rfa = mtod(m, struct fxp_rfa *); |
1895 m->m_data += sizeof(struct fxp_rfa); 1896 rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE); | 2039 m->m_data += sc->rfa_size; 2040 rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - 2041 RFA_ALIGNMENT_FUDGE); |
1897 1898 /* 1899 * Initialize the rest of the RFA. Note that since the RFA 1900 * is misaligned, we cannot store values directly. Instead, 1901 * we use an optimized, inline copy. 1902 */ 1903 1904 rfa->rfa_status = 0; --- 371 unchanged lines hidden --- | 2042 2043 /* 2044 * Initialize the rest of the RFA. Note that since the RFA 2045 * is misaligned, we cannot store values directly. Instead, 2046 * we use an optimized, inline copy. 2047 */ 2048 2049 rfa->rfa_status = 0; --- 371 unchanged lines hidden --- |