1/*
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $Id: if_fxp.c,v 1.37 1997/07/25 23:41:12 davidg Exp $
28 */
29
30/*
31 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
32 */
33
34#include "bpfilter.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/sockio.h>
39#include <sys/mbuf.h>
40#include <sys/malloc.h>
41#include <sys/kernel.h>
42#include <sys/socket.h>
43#include <sys/syslog.h>
44
45#include <net/if.h>
46
47#ifdef INET
48#include <netinet/in.h>
49#include <netinet/if_ether.h>
50#endif
51
52#ifdef NS
53#include <netns/ns.h>
54#include <netns/ns_if.h>
55#endif
56
57#if NBPFILTER > 0
58#include <net/bpf.h>
59#endif
60
61#include <vm/vm.h> /* for vtophys */
62#include <vm/pmap.h> /* for vtophys */
63#include <machine/clock.h> /* for DELAY */
64
65#include <pci/pcivar.h>
66#include <pci/if_fxpreg.h>
67
68struct fxp_softc {
69 struct arpcom arpcom; /* per-interface network data */
70 struct fxp_csr *csr; /* control/status registers */
71 struct fxp_cb_tx *cbl_base; /* base of TxCB list */
72 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
73 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
74 struct mbuf *rfa_headm; /* first mbuf in receive frame area */
75 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
76 struct fxp_stats *fxp_stats; /* Pointer to interface stats */
77 int tx_queued; /* # of active TxCB's */
78 int promisc_mode; /* promiscuous mode enabled */
79 int phy_primary_addr; /* address of primary PHY */
80 int phy_primary_device; /* device type of primary PHY */
81 int phy_10Mbps_only; /* PHY is 10Mbps-only device */
82};
83
84static u_long fxp_count;
85
86/*
87 * Template for default configuration parameters.
88 * See struct fxp_cb_config for the bit definitions.
89 */
90static u_char fxp_cb_config_template[] = {
91 0x0, 0x0, /* cb_status */
92 0x80, 0x2, /* cb_command */
93 0xff, 0xff, 0xff, 0xff, /* link_addr */
94 0x16, /* 0 */
95 0x8, /* 1 */
96 0x0, /* 2 */
97 0x0, /* 3 */
98 0x0, /* 4 */
99 0x80, /* 5 */
100 0xb2, /* 6 */
101 0x3, /* 7 */
102 0x1, /* 8 */
103 0x0, /* 9 */
104 0x26, /* 10 */
105 0x0, /* 11 */
106 0x60, /* 12 */
107 0x0, /* 13 */
108 0xf2, /* 14 */
109 0x48, /* 15 */
110 0x0, /* 16 */
111 0x40, /* 17 */
112 0xf3, /* 18 */
113 0x0, /* 19 */
114 0x3f, /* 20 */
115 0x5, /* 21 */
116 0x0, 0x0
117};
118
119static inline void fxp_scb_wait __P((struct fxp_csr *));
120static char *fxp_probe __P((pcici_t, pcidi_t));
121static void fxp_attach __P((pcici_t, int));
122static void fxp_intr __P((void *));
123static void fxp_start __P((struct ifnet *));
124static int fxp_ioctl __P((struct ifnet *, int, caddr_t));
125static void fxp_init __P((void *));
126static void fxp_stop __P((struct fxp_softc *));
127static void fxp_watchdog __P((struct ifnet *));
128static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
129static void fxp_shutdown __P((int, void *));
130static int fxp_mdi_read __P((struct fxp_csr *, int, int));
131static void fxp_mdi_write __P((struct fxp_csr *, int, int, int));
132static void fxp_read_eeprom __P((struct fxp_csr *, u_short *, int, int));
133
134
135timeout_t fxp_stats_update;
136
137static struct pci_device fxp_device = {
138 "fxp",
139 fxp_probe,
140 fxp_attach,
141 &fxp_count,
142 NULL
143};
144DATA_SET(pcidevice_set, fxp_device);
145
146/*
147 * Set initial transmit threshold at 64 (512 bytes). This is
148 * increased by 64 (512 bytes) at a time, to maximum of 192
149 * (1536 bytes), if an underrun occurs.
150 */
151static int tx_threshold = 64;
152
153/*
154 * Number of transmit control blocks. This determines the number
155 * of transmit buffers that can be chained in the CB list.
156 * This must be a power of two.
157 */
158#define FXP_NTXCB 128
159
160/*
161 * TxCB list index mask. This is used to do list wrap-around.
162 */
163#define FXP_TXCB_MASK (FXP_NTXCB - 1)
164
165/*
166 * Number of DMA segments in a TxCB. Note that this is carefully
167 * chosen to make the total struct size an even power of two. It's
168 * critical that no TxCB be split across a page boundry since
169 * no attempt is made to allocate physically contiguous memory.
170 *
171 * XXX - don't forget to change the hard-coded constant in the
172 * fxp_cb_tx struct (defined in if_fxpreg.h), too!
173 */
174#define FXP_NTXSEG 29
175
176/*
177 * Number of receive frame area buffers. These are large so chose
178 * wisely.
179 */
180#define FXP_NRFABUFS 32
181
182/*
183 * Wait for the previous command to be accepted (but not necessarily
184 * completed).
185 */
186static inline void
187fxp_scb_wait(csr)
188 struct fxp_csr *csr;
189{
190 int i = 10000;
191
192 while ((csr->scb_command & FXP_SCB_COMMAND_MASK) && --i);
193}
194
195/*
196 * Return identification string if this is device is ours.
197 */
198static char *
199fxp_probe(config_id, device_id)
200 pcici_t config_id;
201 pcidi_t device_id;
202{
203 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
204 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
205 return ("Intel EtherExpress Pro 10/100B Ethernet");
206
207 return NULL;
208}
209
210/*
211 * Allocate data structures and attach the device.
212 */
213static void
214fxp_attach(config_id, unit)
215 pcici_t config_id;
216 int unit;
217{
218 struct fxp_softc *sc;
219 struct ifnet *ifp;
220 vm_offset_t pbase;
221 int s, i;
222 u_short data;
223
224 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
225 if (sc == NULL)
226 return;
227 bzero(sc, sizeof(struct fxp_softc));
228
229 s = splimp();
230
231 /*
232 * Map control/status registers.
233 */
234 if (!pci_map_mem(config_id, FXP_PCI_MMBA,
235 (vm_offset_t *)&sc->csr, &pbase)) {
236 printf("fxp%d: couldn't map memory\n", unit);
237 goto fail;
238 }
239
240 /*
241 * Reset to a stable state.
242 */
243 sc->csr->port = FXP_PORT_SELECTIVE_RESET;
244 DELAY(10);
245
246 /*
247 * Allocate our interrupt.
248 */
249 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
250 printf("fxp%d: couldn't map interrupt\n", unit);
251 goto fail;
252 }
253
254 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
255 M_DEVBUF, M_NOWAIT);
256 if (sc->cbl_base == NULL)
257 goto malloc_fail;
258
259 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
260 if (sc->fxp_stats == NULL)
261 goto malloc_fail;
262 bzero(sc->fxp_stats, sizeof(struct fxp_stats));
263
264 /*
265 * Pre-allocate our receive buffers.
266 */
267 for (i = 0; i < FXP_NRFABUFS; i++) {
268 if (fxp_add_rfabuf(sc, NULL) != 0) {
269 goto malloc_fail;
270 }
271 }
272
273 /*
274 * Get info about the primary PHY
275 */
276 fxp_read_eeprom(sc->csr, (u_short *)&data, 6, 1);
277 sc->phy_primary_addr = data & 0xff;
278 sc->phy_primary_device = (data >> 8) & 0x3f;
279 sc->phy_10Mbps_only = data >> 15;
280
281 ifp = &sc->arpcom.ac_if;
282 ifp->if_softc = sc;
283 ifp->if_unit = unit;
284 ifp->if_name = "fxp";
285 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
286 ifp->if_ioctl = fxp_ioctl;
287 ifp->if_output = ether_output;
288 ifp->if_start = fxp_start;
289 ifp->if_watchdog = fxp_watchdog;
290 ifp->if_baudrate = 100000000;
291 ifp->if_init = fxp_init;
292
293 /*
294 * Read MAC address
295 */
296 fxp_read_eeprom(sc->csr, (u_short *)sc->arpcom.ac_enaddr, 0, 3);
297 printf("fxp%d: Ethernet address %6D", unit, sc->arpcom.ac_enaddr, ":");
298 if (sc->phy_10Mbps_only)
299 printf(", 10Mbps");
300 printf("\n");
301
302 /*
303 * Attach the interface.
304 */
305 if_attach(ifp);
306 ether_ifattach(ifp);
307
308#if NBPFILTER > 0
309 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
310#endif
311
312 /*
313 * Add shutdown hook so that DMA is disabled prior to reboot. Not
314 * doing do could allow DMA to corrupt kernel memory during the
315 * reboot before the driver initializes.
316 */
317 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
318
319 splx(s);
320 return;
321
322malloc_fail:
323 printf("fxp%d: Failed to malloc memory\n", unit);
324 (void) pci_unmap_int(config_id);
325 if (sc && sc->cbl_base)
326 free(sc->cbl_base, M_DEVBUF);
327 if (sc && sc->fxp_stats)
328 free(sc->fxp_stats, M_DEVBUF);
329 /* frees entire chain */
330 if (sc && sc->rfa_headm)
331 m_freem(sc->rfa_headm);
332fail:
333 if (sc)
334 free(sc, M_DEVBUF);
335 splx(s);
336}
337
338/*
339 * Read from the serial EEPROM. Basically, you manually shift in
340 * the read opcode (one bit at a time) and then shift in the address,
341 * and then you shift out the data (all of this one bit at a time).
342 * The word size is 16 bits, so you have to provide the address for
343 * every 16 bits of data.
344 */
345static void
346fxp_read_eeprom(csr, data, offset, words)
347 struct fxp_csr *csr;
348 u_short *data;
349 int offset;
350 int words;
351{
352 u_short reg;
353 int i, x;
354
355 for (i = 0; i < words; i++) {
356 csr->eeprom_control = FXP_EEPROM_EECS;
357 /*
358 * Shift in read opcode.
359 */
360 for (x = 3; x > 0; x--) {
361 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
362 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
363 } else {
364 reg = FXP_EEPROM_EECS;
365 }
366 csr->eeprom_control = reg;
367 csr->eeprom_control = reg | FXP_EEPROM_EESK;
368 DELAY(1);
369 csr->eeprom_control = reg;
370 DELAY(1);
371 }
372 /*
373 * Shift in address.
374 */
375 for (x = 6; x > 0; x--) {
376 if ((i + offset) & (1 << (x - 1))) {
377 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
378 } else {
379 reg = FXP_EEPROM_EECS;
380 }
381 csr->eeprom_control = reg;
382 csr->eeprom_control = reg | FXP_EEPROM_EESK;
383 DELAY(1);
384 csr->eeprom_control = reg;
385 DELAY(1);
386 }
387 reg = FXP_EEPROM_EECS;
388 data[i] = 0;
389 /*
390 * Shift out data.
391 */
392 for (x = 16; x > 0; x--) {
393 csr->eeprom_control = reg | FXP_EEPROM_EESK;
394 DELAY(1);
395 if (csr->eeprom_control & FXP_EEPROM_EEDO)
396 data[i] |= (1 << (x - 1));
397 csr->eeprom_control = reg;
398 DELAY(1);
399 }
400 csr->eeprom_control = 0;
401 DELAY(1);
402 }
403}
404
405/*
406 * Device shutdown routine. Called at system shutdown after sync. The
407 * main purpose of this routine is to shut off receiver DMA so that
408 * kernel memory doesn't get clobbered during warmboot.
409 */
410static void
411fxp_shutdown(howto, sc)
412 int howto;
413 void *sc;
414{
415 fxp_stop((struct fxp_softc *) sc);
416}
417
418/*
419 * Start packet transmission on the interface.
420 */
421static void
422fxp_start(ifp)
423 struct ifnet *ifp;
424{
425 struct fxp_softc *sc = ifp->if_softc;
426 struct fxp_csr *csr = sc->csr;
427 struct fxp_cb_tx *txp;
428 struct mbuf *m, *mb_head;
429 int segment, first = 1;
430
431txloop:
432 /*
433 * See if we're all filled up with buffers to transmit.
434 */
435 if (sc->tx_queued >= FXP_NTXCB)
436 return;
437
438 /*
439 * Grab a packet to transmit.
440 */
441 IF_DEQUEUE(&ifp->if_snd, mb_head);
442 if (mb_head == NULL) {
443 /*
444 * No more packets to send.
445 */
446 return;
447 }
448
449 /*
450 * Get pointer to next available (unused) descriptor.
451 */
452 txp = sc->cbl_last->next;
453
454 /*
455 * Go through each of the mbufs in the chain and initialize
456 * the transmit buffers descriptors with the physical address
457 * and size of the mbuf.
458 */
459tbdinit:
460 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
461 if (m->m_len != 0) {
462 if (segment == FXP_NTXSEG)
463 break;
464 txp->tbd[segment].tb_addr =
465 vtophys(mtod(m, vm_offset_t));
466 txp->tbd[segment].tb_size = m->m_len;
467 segment++;
468 }
469 }
470 if (m != NULL) {
471 struct mbuf *mn;
472
473 /*
474 * We ran out of segments. We have to recopy this mbuf
475 * chain first.
476 */
477 MGETHDR(mn, M_DONTWAIT, MT_DATA);
478 if (mn == NULL) {
479 m_freem(mb_head);
480 return;
481 }
482 if (mb_head->m_pkthdr.len > MHLEN) {
483 MCLGET(mn, M_DONTWAIT);
484 if ((mn->m_flags & M_EXT) == 0) {
485 m_freem(mn);
486 m_freem(mb_head);
487 return;
488 }
489 }
490 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(mn, caddr_t));
491 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
492 m_freem(mb_head);
493 mb_head = mn;
494 goto tbdinit;
495 }
496
497 txp->tbd_number = segment;
498 txp->mb_head = mb_head;
499
500 /*
501 * Finish the initialization of this TxCB.
502 */
503 txp->cb_status = 0;
504 txp->cb_command =
505 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
506 txp->tx_threshold = tx_threshold;
507
508 /*
509 * Advance the end-of-list forward.
510 */
511 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
512 sc->cbl_last = txp;
513
514 /*
515 * Advance the beginning of the list forward if there are
516 * no other packets queued (when nothing is queued, cbl_first
517 * sits on the last TxCB that was sent out)..
518 */
519 if (sc->tx_queued == 0)
520 sc->cbl_first = txp;
521
522 sc->tx_queued++;
523
524 /*
525 * Only need to wait prior to the first resume command.
526 */
527 if (first) {
528 first--;
529 fxp_scb_wait(csr);
530 }
531
532 /*
533 * Resume transmission if suspended.
534 */
535 csr->scb_command = FXP_SCB_COMMAND_CU_RESUME;
536
537#if NBPFILTER > 0
538 /*
539 * Pass packet to bpf if there is a listener.
540 */
541 if (ifp->if_bpf)
542 bpf_mtap(ifp, mb_head);
543#endif
544 /*
545 * Set a 5 second timer just in case we don't hear from the
546 * card again.
547 */
548 ifp->if_timer = 5;
549
550 goto txloop;
551}
552
553/*
554 * Process interface interrupts.
555 */
556static void
557fxp_intr(arg)
558 void *arg;
559{
560 struct fxp_softc *sc = arg;
561 struct fxp_csr *csr = sc->csr;
562 struct ifnet *ifp = &sc->arpcom.ac_if;
563 u_int8_t statack;
564
565 while ((statack = csr->scb_statack) != 0) {
566 /*
567 * First ACK all the interrupts in this pass.
568 */
569 csr->scb_statack = statack;
570
571 /*
572 * Free any finished transmit mbuf chains.
573 */
574 if (statack & FXP_SCB_STATACK_CNA) {
575 struct fxp_cb_tx *txp;
576
577 for (txp = sc->cbl_first;
578 (txp->cb_status & FXP_CB_STATUS_C) != 0;
579 txp = txp->next) {
580 if (txp->mb_head != NULL) {
581 m_freem(txp->mb_head);
582 txp->mb_head = NULL;
583 sc->tx_queued--;
584 }
585 if (txp == sc->cbl_last)
586 break;
587 }
588 sc->cbl_first = txp;
589 ifp->if_timer = 0;
590 /*
591 * Try to start more packets transmitting.
592 */
593 if (ifp->if_snd.ifq_head != NULL)
594 fxp_start(ifp);
595 }
596 /*
597 * Process receiver interrupts. If a no-resource (RNR)
598 * condition exists, get whatever packets we can and
599 * re-start the receiver.
600 */
601 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
602 struct mbuf *m;
603 struct fxp_rfa *rfa;
604rcvloop:
605 m = sc->rfa_headm;
606 rfa = (struct fxp_rfa *)m->m_ext.ext_buf;
607
608 if (rfa->rfa_status & FXP_RFA_STATUS_C) {
609 /*
610 * Remove first packet from the chain.
611 */
612 sc->rfa_headm = m->m_next;
613 m->m_next = NULL;
614
615 /*
616 * Add a new buffer to the receive chain. If this
617 * fails, the old buffer is recycled instead.
618 */
619 if (fxp_add_rfabuf(sc, m) == 0) {
620 struct ether_header *eh;
621 u_short total_len;
622
623 total_len = rfa->actual_size & (MCLBYTES - 1);
624 if (total_len < sizeof(struct ether_header)) {
625 m_freem(m);
626 goto rcvloop;
627 }
628 m->m_pkthdr.rcvif = ifp;
629 m->m_pkthdr.len = m->m_len = total_len -
630 sizeof(struct ether_header);
631 eh = mtod(m, struct ether_header *);
632#if NBPFILTER > 0
633 if (ifp->if_bpf) {
634 bpf_tap(ifp, mtod(m, caddr_t), total_len);
635 /*
636 * Only pass this packet up if it is for us.
637 */
638 if ((ifp->if_flags & IFF_PROMISC) &&
639 (rfa->rfa_status & FXP_RFA_STATUS_IAMATCH) &&
640 (eh->ether_dhost[0] & 1) == 0) {
641 m_freem(m);
642 goto rcvloop;
643 }
644 }
645#endif
646 m->m_data += sizeof(struct ether_header);
647 ether_input(ifp, eh, m);
648 }
649 goto rcvloop;
650 }
651 if (statack & FXP_SCB_STATACK_RNR) {
652 fxp_scb_wait(csr);
653 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
654 csr->scb_command = FXP_SCB_COMMAND_RU_START;
655 }
656 }
657 }
658}
659
660/*
661 * Update packet in/out/collision statistics. The i82557 doesn't
662 * allow you to access these counters without doing a fairly
663 * expensive DMA to get _all_ of the statistics it maintains, so
664 * we do this operation here only once per second. The statistics
665 * counters in the kernel are updated from the previous dump-stats
666 * DMA and then a new dump-stats DMA is started. The on-chip
667 * counters are zeroed when the DMA completes. If we can't start
668 * the DMA immediately, we don't wait - we just prepare to read
669 * them again next time.
670 */
671void
672fxp_stats_update(arg)
673 void *arg;
674{
675 struct fxp_softc *sc = arg;
676 struct ifnet *ifp = &sc->arpcom.ac_if;
677 struct fxp_stats *sp = sc->fxp_stats;
678
679 ifp->if_opackets += sp->tx_good;
680 ifp->if_collisions += sp->tx_total_collisions;
681 ifp->if_ipackets += sp->rx_good;
682 ifp->if_ierrors +=
683 sp->rx_crc_errors +
684 sp->rx_alignment_errors +
685 sp->rx_rnr_errors +
686 sp->rx_overrun_errors;
687 /*
688 * If any transmit underruns occured, bump up the transmit
689 * threshold by another 512 bytes (64 * 8).
690 */
691 if (sp->tx_underruns) {
692 ifp->if_oerrors += sp->tx_underruns;
693 if (tx_threshold < 192)
694 tx_threshold += 64;
695 }
696 /*
697 * If there is no pending command, start another stats
698 * dump. Otherwise punt for now.
699 */
700 if ((sc->csr->scb_command & FXP_SCB_COMMAND_MASK) == 0) {
701 /*
702 * Start another stats dump. By waiting for it to be
703 * accepted, we avoid having to do splhigh locking when
704 * writing scb_command in other parts of the driver.
705 */
706 sc->csr->scb_command = FXP_SCB_COMMAND_CU_DUMPRESET;
707 fxp_scb_wait(sc->csr);
708 } else {
709 /*
710 * A previous command is still waiting to be accepted.
711 * Just zero our copy of the stats and wait for the
712 * next timer event to update them.
713 */
714 sp->tx_good = 0;
715 sp->tx_underruns = 0;
716 sp->tx_total_collisions = 0;
717
718 sp->rx_good = 0;
719 sp->rx_crc_errors = 0;
720 sp->rx_alignment_errors = 0;
721 sp->rx_rnr_errors = 0;
722 sp->rx_overrun_errors = 0;
723 }
724 /*
725 * Schedule another timeout one second from now.
726 */
727 timeout(fxp_stats_update, sc, hz);
728}
729
730/*
731 * Stop the interface. Cancels the statistics updater and resets
732 * the interface.
733 */
734static void
735fxp_stop(sc)
736 struct fxp_softc *sc;
737{
738 struct ifnet *ifp = &sc->arpcom.ac_if;
739 struct fxp_cb_tx *txp;
740 int i;
741
742 /*
743 * Cancel stats updater.
744 */
745 untimeout(fxp_stats_update, sc);
746
747 /*
748 * Issue software reset
749 */
750 sc->csr->port = FXP_PORT_SELECTIVE_RESET;
751 DELAY(10);
752
753 /*
754 * Release any xmit buffers.
755 */
756 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
757 txp = txp->next) {
758 m_freem(txp->mb_head);
759 txp->mb_head = NULL;
760 }
761 sc->tx_queued = 0;
762
763 /*
764 * Free all the receive buffers then reallocate/reinitialize
765 */
766 if (sc->rfa_headm != NULL)
767 m_freem(sc->rfa_headm);
768 sc->rfa_headm = NULL;
769 sc->rfa_tailm = NULL;
770 for (i = 0; i < FXP_NRFABUFS; i++) {
771 if (fxp_add_rfabuf(sc, NULL) != 0) {
772 /*
773 * This "can't happen" - we're at splimp()
774 * and we just freed all the buffers we need
775 * above.
776 */
777 panic("fxp_stop: no buffers!");
778 }
779 }
780
781 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
782 ifp->if_timer = 0;
783}
784
785/*
786 * Watchdog/transmission transmit timeout handler. Called when a
787 * transmission is started on the interface, but no interrupt is
788 * received before the timeout. This usually indicates that the
789 * card has wedged for some reason.
790 */
791static void
792fxp_watchdog(ifp)
793 struct ifnet *ifp;
794{
795 log(LOG_ERR, "fxp%d: device timeout\n", ifp->if_unit);
796 ifp->if_oerrors++;
797
798 fxp_init(ifp->if_softc);
799}
800
801static void
802fxp_init(xsc)
803 void *xsc;
804{
805 struct fxp_softc *sc = xsc;
806 struct ifnet *ifp = &sc->arpcom.ac_if;
807 struct fxp_cb_config *cbp;
808 struct fxp_cb_ias *cb_ias;
809 struct fxp_cb_tx *txp;
810 struct fxp_csr *csr = sc->csr;
811 int i, s, mcast, prm;
812
813 s = splimp();
814 /*
815 * Cancel any pending I/O
816 */
817 fxp_stop(sc);
818
819 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
820 sc->promisc_mode = prm;
821 /*
822 * Sleeze out here and enable reception of all multicasts if
823 * multicasts are enabled. Ideally, we'd program the multicast
824 * address filter to only accept specific multicasts.
825 */
826 mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0;
827
828 /*
829 * Initialize base of CBL and RFA memory. Loading with zero
830 * sets it up for regular linear addressing.
831 */
832 csr->scb_general = 0;
833 csr->scb_command = FXP_SCB_COMMAND_CU_BASE;
834
835 fxp_scb_wait(csr);
836 csr->scb_command = FXP_SCB_COMMAND_RU_BASE;
837
838 /*
839 * Initialize base of dump-stats buffer.
840 */
841 fxp_scb_wait(csr);
842 csr->scb_general = vtophys(sc->fxp_stats);
843 csr->scb_command = FXP_SCB_COMMAND_CU_DUMP_ADR;
844
845 /*
846 * We temporarily use memory that contains the TxCB list to
847 * construct the config CB. The TxCB list memory is rebuilt
848 * later.
849 */
850 cbp = (struct fxp_cb_config *) sc->cbl_base;
851
852 /*
853 * This bcopy is kind of disgusting, but there are a bunch of must be
854 * zero and must be one bits in this structure and this is the easiest
855 * way to initialize them all to proper values.
856 */
857 bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config));
858
859 cbp->cb_status = 0;
860 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
861 cbp->link_addr = -1; /* (no) next command */
862 cbp->byte_count = 22; /* (22) bytes to config */
863 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
864 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
865 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
866 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
867 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
868 cbp->dma_bce = 0; /* (disable) dma max counters */
869 cbp->late_scb = 0; /* (don't) defer SCB update */
870 cbp->tno_int = 0; /* (disable) tx not okay interrupt */
871 cbp->ci_int = 0; /* interrupt on CU not active */
872 cbp->save_bf = prm; /* save bad frames */
873 cbp->disc_short_rx = !prm; /* discard short packets */
874 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
875 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
876 cbp->nsai = 1; /* (don't) disable source addr insert */
877 cbp->preamble_length = 2; /* (7 byte) preamble */
878 cbp->loopback = 0; /* (don't) loopback */
879 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
880 cbp->linear_pri_mode = 0; /* (wait after xmit only) */
881 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
882 cbp->promiscuous = prm; /* promiscuous mode */
883 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
884 cbp->crscdt = 0; /* (CRS only) */
885 cbp->stripping = !prm; /* truncate rx packet to byte count */
886 cbp->padding = 1; /* (do) pad short tx packets */
887 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
888 cbp->force_fdx = 0; /* (don't) force full duplex */
889 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
890 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
891 cbp->mc_all = mcast; /* accept all multicasts */
892
893 /*
894 * Start the config command/DMA.
895 */
896 fxp_scb_wait(csr);
897 csr->scb_general = vtophys(cbp);
898 csr->scb_command = FXP_SCB_COMMAND_CU_START;
899 /* ...and wait for it to complete. */
900 while (!(cbp->cb_status & FXP_CB_STATUS_C));
901
902 /*
903 * Now initialize the station address. Temporarily use the TxCB
904 * memory area like we did above for the config CB.
905 */
906 cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
907 cb_ias->cb_status = 0;
908 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
909 cb_ias->link_addr = -1;
910 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
911 sizeof(sc->arpcom.ac_enaddr));
912
913 /*
914 * Start the IAS (Individual Address Setup) command/DMA.
915 */
916 fxp_scb_wait(csr);
917 csr->scb_command = FXP_SCB_COMMAND_CU_START;
918 /* ...and wait for it to complete. */
919 while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
920
921 /*
922 * Initialize transmit control block (TxCB) list.
923 */
924
925 txp = sc->cbl_base;
926 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
927 for (i = 0; i < FXP_NTXCB; i++) {
928 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
929 txp[i].cb_command = FXP_CB_COMMAND_NOP;
930 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]);
931 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
932 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
933 }
934 /*
935 * Set the stop flag on the first TxCB and start the control
936 * unit. It will execute the NOP and then suspend.
937 */
938 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
939 sc->cbl_first = sc->cbl_last = txp;
940 sc->tx_queued = 0;
941
942 fxp_scb_wait(csr);
943 csr->scb_command = FXP_SCB_COMMAND_CU_START;
944
945 /*
946 * Initialize receiver buffer area - RFA.
947 */
948 fxp_scb_wait(csr);
949 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
950 csr->scb_command = FXP_SCB_COMMAND_RU_START;
951
952 /*
953 * Toggle a few bits in the PHY.
954 */
955 switch (sc->phy_primary_device) {
956 case FXP_PHY_DP83840:
957 case FXP_PHY_DP83840A:
958 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR,
959 fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR) |
960 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
961 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
962 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
963 /* fall through */
964 case FXP_PHY_82555:
965 /*
966 * If link0 is set, disable auto-negotiation and then:
967 * If link1 is unset = 10Mbps
968 * If link1 is set = 100Mbps
969 * If link2 is unset = half duplex
970 * If link2 is set = full duplex
971 */
972 if (ifp->if_flags & IFF_LINK0) {
973 int flags;
974
975 flags = (ifp->if_flags & IFF_LINK1) ?
976 FXP_PHY_BMCR_SPEED_100M : 0;
977 flags |= (ifp->if_flags & IFF_LINK2) ?
978 FXP_PHY_BMCR_FULLDUPLEX : 0;
979 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
980 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) &
981 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
982 FXP_PHY_BMCR_FULLDUPLEX)) | flags);
983 } else {
984 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
985 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) |
986 FXP_PHY_BMCR_AUTOEN));
987 }
988 break;
989 /*
990 * The Seeq 80c24 doesn't have a PHY programming interface, so do
991 * nothing.
992 */
993 case FXP_PHY_80C24:
994 break;
995 default:
996 printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n",
997 ifp->if_unit, sc->phy_primary_device, sc->phy_primary_addr);
998 }
999
1000 ifp->if_flags |= IFF_RUNNING;
1001 ifp->if_flags &= ~IFF_OACTIVE;
1002 splx(s);
1003
1004 /*
1005 * Start stats updater.
1006 */
1007 timeout(fxp_stats_update, sc, hz);
1008}
1009
1010/*
1011 * Add a buffer to the end of the RFA buffer list.
1012 * Return 0 if successful, 1 for failure. A failure results in
1013 * adding the 'oldm' (if non-NULL) on to the end of the list -
1014 * tossing out it's old contents and recycling it.
1015 * The RFA struct is stuck at the beginning of mbuf cluster and the
1016 * data pointer is fixed up to point just past it.
1017 */
1018static int
1019fxp_add_rfabuf(sc, oldm)
1020 struct fxp_softc *sc;
1021 struct mbuf *oldm;
1022{
1023 struct mbuf *m;
1024 struct fxp_rfa *rfa, *p_rfa;
1025
1026 MGETHDR(m, M_DONTWAIT, MT_DATA);
1027 if (m != NULL) {
1028 MCLGET(m, M_DONTWAIT);
1029 if ((m->m_flags & M_EXT) == 0) {
1030 m_freem(m);
1031 if (oldm == NULL)
1032 return 1;
1033 m = oldm;
1034 m->m_data = m->m_ext.ext_buf;
1035 }
1036 } else {
1037 if (oldm == NULL)
1038 return 1;
1039 m = oldm;
1040 m->m_data = m->m_ext.ext_buf;
1041 }
1042 /*
1043 * Get a pointer to the base of the mbuf cluster and move
1044 * data start past it.
1045 */
1046 rfa = mtod(m, struct fxp_rfa *);
1047 m->m_data += sizeof(struct fxp_rfa);
1048 rfa->size = MCLBYTES - sizeof(struct fxp_rfa);
1049
1050 rfa->rfa_status = 0;
1051 rfa->rfa_control = FXP_RFA_CONTROL_EL;
1052 rfa->link_addr = -1;
1053 rfa->rbd_addr = -1;
1054 rfa->actual_size = 0;
1055 /*
1056 * If there are other buffers already on the list, attach this
1057 * one to the end by fixing up the tail to point to this one.
1058 */
1059 if (sc->rfa_headm != NULL) {
1060 p_rfa = (struct fxp_rfa *) sc->rfa_tailm->m_ext.ext_buf;
1061 sc->rfa_tailm->m_next = m;
1062 p_rfa->link_addr = vtophys(rfa);
1063 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
1064 } else {
1065 sc->rfa_headm = m;
1066 }
1067 sc->rfa_tailm = m;
1068
1069 return (m == oldm);
1070}
1071
1072static volatile int
1073fxp_mdi_read(csr, phy, reg)
1074 struct fxp_csr *csr;
1075 int phy;
1076 int reg;
1077{
1078 int count = 10000;
1079 int value;
1080
1081 csr->mdi_control = (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21);
1082
1083 while (((value = csr->mdi_control) & 0x10000000) == 0 && count--)
1084 DELAY(10);
1085
1086 if (count <= 0)
1087 printf("fxp_mdi_read: timed out\n");
1088
1089 return (value & 0xffff);
1090}
1091
1092static void
1093fxp_mdi_write(csr, phy, reg, value)
1094 struct fxp_csr *csr;
1095 int phy;
1096 int reg;
1097 int value;
1098{
1099 int count = 10000;
1100
1101 csr->mdi_control = (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21)
1102 | (value & 0xffff);
1103
1104 while ((csr->mdi_control & 0x10000000) == 0 && count--)
1105 DELAY(10);
1106
1107 if (count <= 0)
1108 printf("fxp_mdi_write: timed out\n");
1109}
1110
1111static int
1112fxp_ioctl(ifp, command, data)
1113 struct ifnet *ifp;
1114 int command;
1115 caddr_t data;
1116{
1117 struct ifaddr *ifa = (struct ifaddr *) data;
1118 struct fxp_softc *sc = ifp->if_softc;
1119 struct ifreq *ifr = (struct ifreq *) data;
1120 int s, error = 0;
1121
1122 s = splimp();
1123
1124 switch (command) {
1125
1126 case SIOCSIFADDR:
1127 case SIOCGIFADDR:
1128 case SIOCSIFMTU:
1129 error = ether_ioctl(ifp, command, data);
1130 break;
1131
1132 case SIOCSIFFLAGS:
1133
1134 /*
1135 * If interface is marked up and not running, then start it.
1136 * If it is marked down and running, stop it.
1137 * XXX If it's up then re-initialize it. This is so flags
1138 * such as IFF_PROMISC are handled.
1139 */
1140 if (ifp->if_flags & IFF_UP) {
1141 fxp_init(sc);
1142 } else {
1143 if (ifp->if_flags & IFF_RUNNING)
1144 fxp_stop(sc);
1145 }
1146 break;
1147
1148 case SIOCADDMULTI:
1149 case SIOCDELMULTI:
1150 /*
1151 * Multicast list has changed; set the hardware filter
1152 * accordingly.
1153 */
1154 fxp_init(sc);
1155 error = 0;
1156 break;
1157
1158 default:
1159 error = EINVAL;
1160 }
1161 (void) splx(s);
1162 return (error);
1163}
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $Id: if_fxp.c,v 1.37 1997/07/25 23:41:12 davidg Exp $
28 */
29
30/*
31 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
32 */
33
34#include "bpfilter.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/sockio.h>
39#include <sys/mbuf.h>
40#include <sys/malloc.h>
41#include <sys/kernel.h>
42#include <sys/socket.h>
43#include <sys/syslog.h>
44
45#include <net/if.h>
46
47#ifdef INET
48#include <netinet/in.h>
49#include <netinet/if_ether.h>
50#endif
51
52#ifdef NS
53#include <netns/ns.h>
54#include <netns/ns_if.h>
55#endif
56
57#if NBPFILTER > 0
58#include <net/bpf.h>
59#endif
60
61#include <vm/vm.h> /* for vtophys */
62#include <vm/pmap.h> /* for vtophys */
63#include <machine/clock.h> /* for DELAY */
64
65#include <pci/pcivar.h>
66#include <pci/if_fxpreg.h>
67
68struct fxp_softc {
69 struct arpcom arpcom; /* per-interface network data */
70 struct fxp_csr *csr; /* control/status registers */
71 struct fxp_cb_tx *cbl_base; /* base of TxCB list */
72 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
73 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
74 struct mbuf *rfa_headm; /* first mbuf in receive frame area */
75 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
76 struct fxp_stats *fxp_stats; /* Pointer to interface stats */
77 int tx_queued; /* # of active TxCB's */
78 int promisc_mode; /* promiscuous mode enabled */
79 int phy_primary_addr; /* address of primary PHY */
80 int phy_primary_device; /* device type of primary PHY */
81 int phy_10Mbps_only; /* PHY is 10Mbps-only device */
82};
83
84static u_long fxp_count;
85
86/*
87 * Template for default configuration parameters.
88 * See struct fxp_cb_config for the bit definitions.
89 */
90static u_char fxp_cb_config_template[] = {
91 0x0, 0x0, /* cb_status */
92 0x80, 0x2, /* cb_command */
93 0xff, 0xff, 0xff, 0xff, /* link_addr */
94 0x16, /* 0 */
95 0x8, /* 1 */
96 0x0, /* 2 */
97 0x0, /* 3 */
98 0x0, /* 4 */
99 0x80, /* 5 */
100 0xb2, /* 6 */
101 0x3, /* 7 */
102 0x1, /* 8 */
103 0x0, /* 9 */
104 0x26, /* 10 */
105 0x0, /* 11 */
106 0x60, /* 12 */
107 0x0, /* 13 */
108 0xf2, /* 14 */
109 0x48, /* 15 */
110 0x0, /* 16 */
111 0x40, /* 17 */
112 0xf3, /* 18 */
113 0x0, /* 19 */
114 0x3f, /* 20 */
115 0x5, /* 21 */
116 0x0, 0x0
117};
118
119static inline void fxp_scb_wait __P((struct fxp_csr *));
120static char *fxp_probe __P((pcici_t, pcidi_t));
121static void fxp_attach __P((pcici_t, int));
122static void fxp_intr __P((void *));
123static void fxp_start __P((struct ifnet *));
124static int fxp_ioctl __P((struct ifnet *, int, caddr_t));
125static void fxp_init __P((void *));
126static void fxp_stop __P((struct fxp_softc *));
127static void fxp_watchdog __P((struct ifnet *));
128static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
129static void fxp_shutdown __P((int, void *));
130static int fxp_mdi_read __P((struct fxp_csr *, int, int));
131static void fxp_mdi_write __P((struct fxp_csr *, int, int, int));
132static void fxp_read_eeprom __P((struct fxp_csr *, u_short *, int, int));
133
134
135timeout_t fxp_stats_update;
136
137static struct pci_device fxp_device = {
138 "fxp",
139 fxp_probe,
140 fxp_attach,
141 &fxp_count,
142 NULL
143};
144DATA_SET(pcidevice_set, fxp_device);
145
146/*
147 * Set initial transmit threshold at 64 (512 bytes). This is
148 * increased by 64 (512 bytes) at a time, to maximum of 192
149 * (1536 bytes), if an underrun occurs.
150 */
151static int tx_threshold = 64;
152
153/*
154 * Number of transmit control blocks. This determines the number
155 * of transmit buffers that can be chained in the CB list.
156 * This must be a power of two.
157 */
158#define FXP_NTXCB 128
159
160/*
161 * TxCB list index mask. This is used to do list wrap-around.
162 */
163#define FXP_TXCB_MASK (FXP_NTXCB - 1)
164
165/*
166 * Number of DMA segments in a TxCB. Note that this is carefully
167 * chosen to make the total struct size an even power of two. It's
168 * critical that no TxCB be split across a page boundry since
169 * no attempt is made to allocate physically contiguous memory.
170 *
171 * XXX - don't forget to change the hard-coded constant in the
172 * fxp_cb_tx struct (defined in if_fxpreg.h), too!
173 */
174#define FXP_NTXSEG 29
175
176/*
177 * Number of receive frame area buffers. These are large so chose
178 * wisely.
179 */
180#define FXP_NRFABUFS 32
181
182/*
183 * Wait for the previous command to be accepted (but not necessarily
184 * completed).
185 */
186static inline void
187fxp_scb_wait(csr)
188 struct fxp_csr *csr;
189{
190 int i = 10000;
191
192 while ((csr->scb_command & FXP_SCB_COMMAND_MASK) && --i);
193}
194
195/*
196 * Return identification string if this is device is ours.
197 */
198static char *
199fxp_probe(config_id, device_id)
200 pcici_t config_id;
201 pcidi_t device_id;
202{
203 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
204 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
205 return ("Intel EtherExpress Pro 10/100B Ethernet");
206
207 return NULL;
208}
209
210/*
211 * Allocate data structures and attach the device.
212 */
213static void
214fxp_attach(config_id, unit)
215 pcici_t config_id;
216 int unit;
217{
218 struct fxp_softc *sc;
219 struct ifnet *ifp;
220 vm_offset_t pbase;
221 int s, i;
222 u_short data;
223
224 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
225 if (sc == NULL)
226 return;
227 bzero(sc, sizeof(struct fxp_softc));
228
229 s = splimp();
230
231 /*
232 * Map control/status registers.
233 */
234 if (!pci_map_mem(config_id, FXP_PCI_MMBA,
235 (vm_offset_t *)&sc->csr, &pbase)) {
236 printf("fxp%d: couldn't map memory\n", unit);
237 goto fail;
238 }
239
240 /*
241 * Reset to a stable state.
242 */
243 sc->csr->port = FXP_PORT_SELECTIVE_RESET;
244 DELAY(10);
245
246 /*
247 * Allocate our interrupt.
248 */
249 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
250 printf("fxp%d: couldn't map interrupt\n", unit);
251 goto fail;
252 }
253
254 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
255 M_DEVBUF, M_NOWAIT);
256 if (sc->cbl_base == NULL)
257 goto malloc_fail;
258
259 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
260 if (sc->fxp_stats == NULL)
261 goto malloc_fail;
262 bzero(sc->fxp_stats, sizeof(struct fxp_stats));
263
264 /*
265 * Pre-allocate our receive buffers.
266 */
267 for (i = 0; i < FXP_NRFABUFS; i++) {
268 if (fxp_add_rfabuf(sc, NULL) != 0) {
269 goto malloc_fail;
270 }
271 }
272
273 /*
274 * Get info about the primary PHY
275 */
276 fxp_read_eeprom(sc->csr, (u_short *)&data, 6, 1);
277 sc->phy_primary_addr = data & 0xff;
278 sc->phy_primary_device = (data >> 8) & 0x3f;
279 sc->phy_10Mbps_only = data >> 15;
280
281 ifp = &sc->arpcom.ac_if;
282 ifp->if_softc = sc;
283 ifp->if_unit = unit;
284 ifp->if_name = "fxp";
285 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
286 ifp->if_ioctl = fxp_ioctl;
287 ifp->if_output = ether_output;
288 ifp->if_start = fxp_start;
289 ifp->if_watchdog = fxp_watchdog;
290 ifp->if_baudrate = 100000000;
291 ifp->if_init = fxp_init;
292
293 /*
294 * Read MAC address
295 */
296 fxp_read_eeprom(sc->csr, (u_short *)sc->arpcom.ac_enaddr, 0, 3);
297 printf("fxp%d: Ethernet address %6D", unit, sc->arpcom.ac_enaddr, ":");
298 if (sc->phy_10Mbps_only)
299 printf(", 10Mbps");
300 printf("\n");
301
302 /*
303 * Attach the interface.
304 */
305 if_attach(ifp);
306 ether_ifattach(ifp);
307
308#if NBPFILTER > 0
309 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
310#endif
311
312 /*
313 * Add shutdown hook so that DMA is disabled prior to reboot. Not
314 * doing do could allow DMA to corrupt kernel memory during the
315 * reboot before the driver initializes.
316 */
317 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
318
319 splx(s);
320 return;
321
322malloc_fail:
323 printf("fxp%d: Failed to malloc memory\n", unit);
324 (void) pci_unmap_int(config_id);
325 if (sc && sc->cbl_base)
326 free(sc->cbl_base, M_DEVBUF);
327 if (sc && sc->fxp_stats)
328 free(sc->fxp_stats, M_DEVBUF);
329 /* frees entire chain */
330 if (sc && sc->rfa_headm)
331 m_freem(sc->rfa_headm);
332fail:
333 if (sc)
334 free(sc, M_DEVBUF);
335 splx(s);
336}
337
338/*
339 * Read from the serial EEPROM. Basically, you manually shift in
340 * the read opcode (one bit at a time) and then shift in the address,
341 * and then you shift out the data (all of this one bit at a time).
342 * The word size is 16 bits, so you have to provide the address for
343 * every 16 bits of data.
344 */
345static void
346fxp_read_eeprom(csr, data, offset, words)
347 struct fxp_csr *csr;
348 u_short *data;
349 int offset;
350 int words;
351{
352 u_short reg;
353 int i, x;
354
355 for (i = 0; i < words; i++) {
356 csr->eeprom_control = FXP_EEPROM_EECS;
357 /*
358 * Shift in read opcode.
359 */
360 for (x = 3; x > 0; x--) {
361 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
362 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
363 } else {
364 reg = FXP_EEPROM_EECS;
365 }
366 csr->eeprom_control = reg;
367 csr->eeprom_control = reg | FXP_EEPROM_EESK;
368 DELAY(1);
369 csr->eeprom_control = reg;
370 DELAY(1);
371 }
372 /*
373 * Shift in address.
374 */
375 for (x = 6; x > 0; x--) {
376 if ((i + offset) & (1 << (x - 1))) {
377 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
378 } else {
379 reg = FXP_EEPROM_EECS;
380 }
381 csr->eeprom_control = reg;
382 csr->eeprom_control = reg | FXP_EEPROM_EESK;
383 DELAY(1);
384 csr->eeprom_control = reg;
385 DELAY(1);
386 }
387 reg = FXP_EEPROM_EECS;
388 data[i] = 0;
389 /*
390 * Shift out data.
391 */
392 for (x = 16; x > 0; x--) {
393 csr->eeprom_control = reg | FXP_EEPROM_EESK;
394 DELAY(1);
395 if (csr->eeprom_control & FXP_EEPROM_EEDO)
396 data[i] |= (1 << (x - 1));
397 csr->eeprom_control = reg;
398 DELAY(1);
399 }
400 csr->eeprom_control = 0;
401 DELAY(1);
402 }
403}
404
405/*
406 * Device shutdown routine. Called at system shutdown after sync. The
407 * main purpose of this routine is to shut off receiver DMA so that
408 * kernel memory doesn't get clobbered during warmboot.
409 */
410static void
411fxp_shutdown(howto, sc)
412 int howto;
413 void *sc;
414{
415 fxp_stop((struct fxp_softc *) sc);
416}
417
418/*
419 * Start packet transmission on the interface.
420 */
421static void
422fxp_start(ifp)
423 struct ifnet *ifp;
424{
425 struct fxp_softc *sc = ifp->if_softc;
426 struct fxp_csr *csr = sc->csr;
427 struct fxp_cb_tx *txp;
428 struct mbuf *m, *mb_head;
429 int segment, first = 1;
430
431txloop:
432 /*
433 * See if we're all filled up with buffers to transmit.
434 */
435 if (sc->tx_queued >= FXP_NTXCB)
436 return;
437
438 /*
439 * Grab a packet to transmit.
440 */
441 IF_DEQUEUE(&ifp->if_snd, mb_head);
442 if (mb_head == NULL) {
443 /*
444 * No more packets to send.
445 */
446 return;
447 }
448
449 /*
450 * Get pointer to next available (unused) descriptor.
451 */
452 txp = sc->cbl_last->next;
453
454 /*
455 * Go through each of the mbufs in the chain and initialize
456 * the transmit buffers descriptors with the physical address
457 * and size of the mbuf.
458 */
459tbdinit:
460 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
461 if (m->m_len != 0) {
462 if (segment == FXP_NTXSEG)
463 break;
464 txp->tbd[segment].tb_addr =
465 vtophys(mtod(m, vm_offset_t));
466 txp->tbd[segment].tb_size = m->m_len;
467 segment++;
468 }
469 }
470 if (m != NULL) {
471 struct mbuf *mn;
472
473 /*
474 * We ran out of segments. We have to recopy this mbuf
475 * chain first.
476 */
477 MGETHDR(mn, M_DONTWAIT, MT_DATA);
478 if (mn == NULL) {
479 m_freem(mb_head);
480 return;
481 }
482 if (mb_head->m_pkthdr.len > MHLEN) {
483 MCLGET(mn, M_DONTWAIT);
484 if ((mn->m_flags & M_EXT) == 0) {
485 m_freem(mn);
486 m_freem(mb_head);
487 return;
488 }
489 }
490 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(mn, caddr_t));
491 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
492 m_freem(mb_head);
493 mb_head = mn;
494 goto tbdinit;
495 }
496
497 txp->tbd_number = segment;
498 txp->mb_head = mb_head;
499
500 /*
501 * Finish the initialization of this TxCB.
502 */
503 txp->cb_status = 0;
504 txp->cb_command =
505 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
506 txp->tx_threshold = tx_threshold;
507
508 /*
509 * Advance the end-of-list forward.
510 */
511 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
512 sc->cbl_last = txp;
513
514 /*
515 * Advance the beginning of the list forward if there are
516 * no other packets queued (when nothing is queued, cbl_first
517 * sits on the last TxCB that was sent out)..
518 */
519 if (sc->tx_queued == 0)
520 sc->cbl_first = txp;
521
522 sc->tx_queued++;
523
524 /*
525 * Only need to wait prior to the first resume command.
526 */
527 if (first) {
528 first--;
529 fxp_scb_wait(csr);
530 }
531
532 /*
533 * Resume transmission if suspended.
534 */
535 csr->scb_command = FXP_SCB_COMMAND_CU_RESUME;
536
537#if NBPFILTER > 0
538 /*
539 * Pass packet to bpf if there is a listener.
540 */
541 if (ifp->if_bpf)
542 bpf_mtap(ifp, mb_head);
543#endif
544 /*
545 * Set a 5 second timer just in case we don't hear from the
546 * card again.
547 */
548 ifp->if_timer = 5;
549
550 goto txloop;
551}
552
553/*
554 * Process interface interrupts.
555 */
556static void
557fxp_intr(arg)
558 void *arg;
559{
560 struct fxp_softc *sc = arg;
561 struct fxp_csr *csr = sc->csr;
562 struct ifnet *ifp = &sc->arpcom.ac_if;
563 u_int8_t statack;
564
565 while ((statack = csr->scb_statack) != 0) {
566 /*
567 * First ACK all the interrupts in this pass.
568 */
569 csr->scb_statack = statack;
570
571 /*
572 * Free any finished transmit mbuf chains.
573 */
574 if (statack & FXP_SCB_STATACK_CNA) {
575 struct fxp_cb_tx *txp;
576
577 for (txp = sc->cbl_first;
578 (txp->cb_status & FXP_CB_STATUS_C) != 0;
579 txp = txp->next) {
580 if (txp->mb_head != NULL) {
581 m_freem(txp->mb_head);
582 txp->mb_head = NULL;
583 sc->tx_queued--;
584 }
585 if (txp == sc->cbl_last)
586 break;
587 }
588 sc->cbl_first = txp;
589 ifp->if_timer = 0;
590 /*
591 * Try to start more packets transmitting.
592 */
593 if (ifp->if_snd.ifq_head != NULL)
594 fxp_start(ifp);
595 }
596 /*
597 * Process receiver interrupts. If a no-resource (RNR)
598 * condition exists, get whatever packets we can and
599 * re-start the receiver.
600 */
601 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
602 struct mbuf *m;
603 struct fxp_rfa *rfa;
604rcvloop:
605 m = sc->rfa_headm;
606 rfa = (struct fxp_rfa *)m->m_ext.ext_buf;
607
608 if (rfa->rfa_status & FXP_RFA_STATUS_C) {
609 /*
610 * Remove first packet from the chain.
611 */
612 sc->rfa_headm = m->m_next;
613 m->m_next = NULL;
614
615 /*
616 * Add a new buffer to the receive chain. If this
617 * fails, the old buffer is recycled instead.
618 */
619 if (fxp_add_rfabuf(sc, m) == 0) {
620 struct ether_header *eh;
621 u_short total_len;
622
623 total_len = rfa->actual_size & (MCLBYTES - 1);
624 if (total_len < sizeof(struct ether_header)) {
625 m_freem(m);
626 goto rcvloop;
627 }
628 m->m_pkthdr.rcvif = ifp;
629 m->m_pkthdr.len = m->m_len = total_len -
630 sizeof(struct ether_header);
631 eh = mtod(m, struct ether_header *);
632#if NBPFILTER > 0
633 if (ifp->if_bpf) {
634 bpf_tap(ifp, mtod(m, caddr_t), total_len);
635 /*
636 * Only pass this packet up if it is for us.
637 */
638 if ((ifp->if_flags & IFF_PROMISC) &&
639 (rfa->rfa_status & FXP_RFA_STATUS_IAMATCH) &&
640 (eh->ether_dhost[0] & 1) == 0) {
641 m_freem(m);
642 goto rcvloop;
643 }
644 }
645#endif
646 m->m_data += sizeof(struct ether_header);
647 ether_input(ifp, eh, m);
648 }
649 goto rcvloop;
650 }
651 if (statack & FXP_SCB_STATACK_RNR) {
652 fxp_scb_wait(csr);
653 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
654 csr->scb_command = FXP_SCB_COMMAND_RU_START;
655 }
656 }
657 }
658}
659
660/*
661 * Update packet in/out/collision statistics. The i82557 doesn't
662 * allow you to access these counters without doing a fairly
663 * expensive DMA to get _all_ of the statistics it maintains, so
664 * we do this operation here only once per second. The statistics
665 * counters in the kernel are updated from the previous dump-stats
666 * DMA and then a new dump-stats DMA is started. The on-chip
667 * counters are zeroed when the DMA completes. If we can't start
668 * the DMA immediately, we don't wait - we just prepare to read
669 * them again next time.
670 */
671void
672fxp_stats_update(arg)
673 void *arg;
674{
675 struct fxp_softc *sc = arg;
676 struct ifnet *ifp = &sc->arpcom.ac_if;
677 struct fxp_stats *sp = sc->fxp_stats;
678
679 ifp->if_opackets += sp->tx_good;
680 ifp->if_collisions += sp->tx_total_collisions;
681 ifp->if_ipackets += sp->rx_good;
682 ifp->if_ierrors +=
683 sp->rx_crc_errors +
684 sp->rx_alignment_errors +
685 sp->rx_rnr_errors +
686 sp->rx_overrun_errors;
687 /*
688 * If any transmit underruns occured, bump up the transmit
689 * threshold by another 512 bytes (64 * 8).
690 */
691 if (sp->tx_underruns) {
692 ifp->if_oerrors += sp->tx_underruns;
693 if (tx_threshold < 192)
694 tx_threshold += 64;
695 }
696 /*
697 * If there is no pending command, start another stats
698 * dump. Otherwise punt for now.
699 */
700 if ((sc->csr->scb_command & FXP_SCB_COMMAND_MASK) == 0) {
701 /*
702 * Start another stats dump. By waiting for it to be
703 * accepted, we avoid having to do splhigh locking when
704 * writing scb_command in other parts of the driver.
705 */
706 sc->csr->scb_command = FXP_SCB_COMMAND_CU_DUMPRESET;
707 fxp_scb_wait(sc->csr);
708 } else {
709 /*
710 * A previous command is still waiting to be accepted.
711 * Just zero our copy of the stats and wait for the
712 * next timer event to update them.
713 */
714 sp->tx_good = 0;
715 sp->tx_underruns = 0;
716 sp->tx_total_collisions = 0;
717
718 sp->rx_good = 0;
719 sp->rx_crc_errors = 0;
720 sp->rx_alignment_errors = 0;
721 sp->rx_rnr_errors = 0;
722 sp->rx_overrun_errors = 0;
723 }
724 /*
725 * Schedule another timeout one second from now.
726 */
727 timeout(fxp_stats_update, sc, hz);
728}
729
730/*
731 * Stop the interface. Cancels the statistics updater and resets
732 * the interface.
733 */
734static void
735fxp_stop(sc)
736 struct fxp_softc *sc;
737{
738 struct ifnet *ifp = &sc->arpcom.ac_if;
739 struct fxp_cb_tx *txp;
740 int i;
741
742 /*
743 * Cancel stats updater.
744 */
745 untimeout(fxp_stats_update, sc);
746
747 /*
748 * Issue software reset
749 */
750 sc->csr->port = FXP_PORT_SELECTIVE_RESET;
751 DELAY(10);
752
753 /*
754 * Release any xmit buffers.
755 */
756 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
757 txp = txp->next) {
758 m_freem(txp->mb_head);
759 txp->mb_head = NULL;
760 }
761 sc->tx_queued = 0;
762
763 /*
764 * Free all the receive buffers then reallocate/reinitialize
765 */
766 if (sc->rfa_headm != NULL)
767 m_freem(sc->rfa_headm);
768 sc->rfa_headm = NULL;
769 sc->rfa_tailm = NULL;
770 for (i = 0; i < FXP_NRFABUFS; i++) {
771 if (fxp_add_rfabuf(sc, NULL) != 0) {
772 /*
773 * This "can't happen" - we're at splimp()
774 * and we just freed all the buffers we need
775 * above.
776 */
777 panic("fxp_stop: no buffers!");
778 }
779 }
780
781 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
782 ifp->if_timer = 0;
783}
784
785/*
786 * Watchdog/transmission transmit timeout handler. Called when a
787 * transmission is started on the interface, but no interrupt is
788 * received before the timeout. This usually indicates that the
789 * card has wedged for some reason.
790 */
791static void
792fxp_watchdog(ifp)
793 struct ifnet *ifp;
794{
795 log(LOG_ERR, "fxp%d: device timeout\n", ifp->if_unit);
796 ifp->if_oerrors++;
797
798 fxp_init(ifp->if_softc);
799}
800
801static void
802fxp_init(xsc)
803 void *xsc;
804{
805 struct fxp_softc *sc = xsc;
806 struct ifnet *ifp = &sc->arpcom.ac_if;
807 struct fxp_cb_config *cbp;
808 struct fxp_cb_ias *cb_ias;
809 struct fxp_cb_tx *txp;
810 struct fxp_csr *csr = sc->csr;
811 int i, s, mcast, prm;
812
813 s = splimp();
814 /*
815 * Cancel any pending I/O
816 */
817 fxp_stop(sc);
818
819 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
820 sc->promisc_mode = prm;
821 /*
822 * Sleeze out here and enable reception of all multicasts if
823 * multicasts are enabled. Ideally, we'd program the multicast
824 * address filter to only accept specific multicasts.
825 */
826 mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0;
827
828 /*
829 * Initialize base of CBL and RFA memory. Loading with zero
830 * sets it up for regular linear addressing.
831 */
832 csr->scb_general = 0;
833 csr->scb_command = FXP_SCB_COMMAND_CU_BASE;
834
835 fxp_scb_wait(csr);
836 csr->scb_command = FXP_SCB_COMMAND_RU_BASE;
837
838 /*
839 * Initialize base of dump-stats buffer.
840 */
841 fxp_scb_wait(csr);
842 csr->scb_general = vtophys(sc->fxp_stats);
843 csr->scb_command = FXP_SCB_COMMAND_CU_DUMP_ADR;
844
845 /*
846 * We temporarily use memory that contains the TxCB list to
847 * construct the config CB. The TxCB list memory is rebuilt
848 * later.
849 */
850 cbp = (struct fxp_cb_config *) sc->cbl_base;
851
852 /*
853 * This bcopy is kind of disgusting, but there are a bunch of must be
854 * zero and must be one bits in this structure and this is the easiest
855 * way to initialize them all to proper values.
856 */
857 bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config));
858
859 cbp->cb_status = 0;
860 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
861 cbp->link_addr = -1; /* (no) next command */
862 cbp->byte_count = 22; /* (22) bytes to config */
863 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
864 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
865 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
866 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
867 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
868 cbp->dma_bce = 0; /* (disable) dma max counters */
869 cbp->late_scb = 0; /* (don't) defer SCB update */
870 cbp->tno_int = 0; /* (disable) tx not okay interrupt */
871 cbp->ci_int = 0; /* interrupt on CU not active */
872 cbp->save_bf = prm; /* save bad frames */
873 cbp->disc_short_rx = !prm; /* discard short packets */
874 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
875 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
876 cbp->nsai = 1; /* (don't) disable source addr insert */
877 cbp->preamble_length = 2; /* (7 byte) preamble */
878 cbp->loopback = 0; /* (don't) loopback */
879 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
880 cbp->linear_pri_mode = 0; /* (wait after xmit only) */
881 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
882 cbp->promiscuous = prm; /* promiscuous mode */
883 cbp->bcast_disable = 0; /* (don't) disable broadcasts */
884 cbp->crscdt = 0; /* (CRS only) */
885 cbp->stripping = !prm; /* truncate rx packet to byte count */
886 cbp->padding = 1; /* (do) pad short tx packets */
887 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
888 cbp->force_fdx = 0; /* (don't) force full duplex */
889 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
890 cbp->multi_ia = 0; /* (don't) accept multiple IAs */
891 cbp->mc_all = mcast; /* accept all multicasts */
892
893 /*
894 * Start the config command/DMA.
895 */
896 fxp_scb_wait(csr);
897 csr->scb_general = vtophys(cbp);
898 csr->scb_command = FXP_SCB_COMMAND_CU_START;
899 /* ...and wait for it to complete. */
900 while (!(cbp->cb_status & FXP_CB_STATUS_C));
901
902 /*
903 * Now initialize the station address. Temporarily use the TxCB
904 * memory area like we did above for the config CB.
905 */
906 cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
907 cb_ias->cb_status = 0;
908 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
909 cb_ias->link_addr = -1;
910 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
911 sizeof(sc->arpcom.ac_enaddr));
912
913 /*
914 * Start the IAS (Individual Address Setup) command/DMA.
915 */
916 fxp_scb_wait(csr);
917 csr->scb_command = FXP_SCB_COMMAND_CU_START;
918 /* ...and wait for it to complete. */
919 while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
920
921 /*
922 * Initialize transmit control block (TxCB) list.
923 */
924
925 txp = sc->cbl_base;
926 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
927 for (i = 0; i < FXP_NTXCB; i++) {
928 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
929 txp[i].cb_command = FXP_CB_COMMAND_NOP;
930 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]);
931 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
932 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
933 }
934 /*
935 * Set the stop flag on the first TxCB and start the control
936 * unit. It will execute the NOP and then suspend.
937 */
938 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
939 sc->cbl_first = sc->cbl_last = txp;
940 sc->tx_queued = 0;
941
942 fxp_scb_wait(csr);
943 csr->scb_command = FXP_SCB_COMMAND_CU_START;
944
945 /*
946 * Initialize receiver buffer area - RFA.
947 */
948 fxp_scb_wait(csr);
949 csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
950 csr->scb_command = FXP_SCB_COMMAND_RU_START;
951
952 /*
953 * Toggle a few bits in the PHY.
954 */
955 switch (sc->phy_primary_device) {
956 case FXP_PHY_DP83840:
957 case FXP_PHY_DP83840A:
958 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR,
959 fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_DP83840_PCR) |
960 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
961 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
962 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
963 /* fall through */
964 case FXP_PHY_82555:
965 /*
966 * If link0 is set, disable auto-negotiation and then:
967 * If link1 is unset = 10Mbps
968 * If link1 is set = 100Mbps
969 * If link2 is unset = half duplex
970 * If link2 is set = full duplex
971 */
972 if (ifp->if_flags & IFF_LINK0) {
973 int flags;
974
975 flags = (ifp->if_flags & IFF_LINK1) ?
976 FXP_PHY_BMCR_SPEED_100M : 0;
977 flags |= (ifp->if_flags & IFF_LINK2) ?
978 FXP_PHY_BMCR_FULLDUPLEX : 0;
979 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
980 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) &
981 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
982 FXP_PHY_BMCR_FULLDUPLEX)) | flags);
983 } else {
984 fxp_mdi_write(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR,
985 (fxp_mdi_read(sc->csr, sc->phy_primary_addr, FXP_PHY_BMCR) |
986 FXP_PHY_BMCR_AUTOEN));
987 }
988 break;
989 /*
990 * The Seeq 80c24 doesn't have a PHY programming interface, so do
991 * nothing.
992 */
993 case FXP_PHY_80C24:
994 break;
995 default:
996 printf("fxp%d: warning: unsupported PHY, type = %d, addr = %d\n",
997 ifp->if_unit, sc->phy_primary_device, sc->phy_primary_addr);
998 }
999
1000 ifp->if_flags |= IFF_RUNNING;
1001 ifp->if_flags &= ~IFF_OACTIVE;
1002 splx(s);
1003
1004 /*
1005 * Start stats updater.
1006 */
1007 timeout(fxp_stats_update, sc, hz);
1008}
1009
1010/*
1011 * Add a buffer to the end of the RFA buffer list.
1012 * Return 0 if successful, 1 for failure. A failure results in
1013 * adding the 'oldm' (if non-NULL) on to the end of the list -
1014 * tossing out it's old contents and recycling it.
1015 * The RFA struct is stuck at the beginning of mbuf cluster and the
1016 * data pointer is fixed up to point just past it.
1017 */
1018static int
1019fxp_add_rfabuf(sc, oldm)
1020 struct fxp_softc *sc;
1021 struct mbuf *oldm;
1022{
1023 struct mbuf *m;
1024 struct fxp_rfa *rfa, *p_rfa;
1025
1026 MGETHDR(m, M_DONTWAIT, MT_DATA);
1027 if (m != NULL) {
1028 MCLGET(m, M_DONTWAIT);
1029 if ((m->m_flags & M_EXT) == 0) {
1030 m_freem(m);
1031 if (oldm == NULL)
1032 return 1;
1033 m = oldm;
1034 m->m_data = m->m_ext.ext_buf;
1035 }
1036 } else {
1037 if (oldm == NULL)
1038 return 1;
1039 m = oldm;
1040 m->m_data = m->m_ext.ext_buf;
1041 }
1042 /*
1043 * Get a pointer to the base of the mbuf cluster and move
1044 * data start past it.
1045 */
1046 rfa = mtod(m, struct fxp_rfa *);
1047 m->m_data += sizeof(struct fxp_rfa);
1048 rfa->size = MCLBYTES - sizeof(struct fxp_rfa);
1049
1050 rfa->rfa_status = 0;
1051 rfa->rfa_control = FXP_RFA_CONTROL_EL;
1052 rfa->link_addr = -1;
1053 rfa->rbd_addr = -1;
1054 rfa->actual_size = 0;
1055 /*
1056 * If there are other buffers already on the list, attach this
1057 * one to the end by fixing up the tail to point to this one.
1058 */
1059 if (sc->rfa_headm != NULL) {
1060 p_rfa = (struct fxp_rfa *) sc->rfa_tailm->m_ext.ext_buf;
1061 sc->rfa_tailm->m_next = m;
1062 p_rfa->link_addr = vtophys(rfa);
1063 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
1064 } else {
1065 sc->rfa_headm = m;
1066 }
1067 sc->rfa_tailm = m;
1068
1069 return (m == oldm);
1070}
1071
1072static volatile int
1073fxp_mdi_read(csr, phy, reg)
1074 struct fxp_csr *csr;
1075 int phy;
1076 int reg;
1077{
1078 int count = 10000;
1079 int value;
1080
1081 csr->mdi_control = (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21);
1082
1083 while (((value = csr->mdi_control) & 0x10000000) == 0 && count--)
1084 DELAY(10);
1085
1086 if (count <= 0)
1087 printf("fxp_mdi_read: timed out\n");
1088
1089 return (value & 0xffff);
1090}
1091
1092static void
1093fxp_mdi_write(csr, phy, reg, value)
1094 struct fxp_csr *csr;
1095 int phy;
1096 int reg;
1097 int value;
1098{
1099 int count = 10000;
1100
1101 csr->mdi_control = (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21)
1102 | (value & 0xffff);
1103
1104 while ((csr->mdi_control & 0x10000000) == 0 && count--)
1105 DELAY(10);
1106
1107 if (count <= 0)
1108 printf("fxp_mdi_write: timed out\n");
1109}
1110
1111static int
1112fxp_ioctl(ifp, command, data)
1113 struct ifnet *ifp;
1114 int command;
1115 caddr_t data;
1116{
1117 struct ifaddr *ifa = (struct ifaddr *) data;
1118 struct fxp_softc *sc = ifp->if_softc;
1119 struct ifreq *ifr = (struct ifreq *) data;
1120 int s, error = 0;
1121
1122 s = splimp();
1123
1124 switch (command) {
1125
1126 case SIOCSIFADDR:
1127 case SIOCGIFADDR:
1128 case SIOCSIFMTU:
1129 error = ether_ioctl(ifp, command, data);
1130 break;
1131
1132 case SIOCSIFFLAGS:
1133
1134 /*
1135 * If interface is marked up and not running, then start it.
1136 * If it is marked down and running, stop it.
1137 * XXX If it's up then re-initialize it. This is so flags
1138 * such as IFF_PROMISC are handled.
1139 */
1140 if (ifp->if_flags & IFF_UP) {
1141 fxp_init(sc);
1142 } else {
1143 if (ifp->if_flags & IFF_RUNNING)
1144 fxp_stop(sc);
1145 }
1146 break;
1147
1148 case SIOCADDMULTI:
1149 case SIOCDELMULTI:
1150 /*
1151 * Multicast list has changed; set the hardware filter
1152 * accordingly.
1153 */
1154 fxp_init(sc);
1155 error = 0;
1156 break;
1157
1158 default:
1159 error = EINVAL;
1160 }
1161 (void) splx(s);
1162 return (error);
1163}