1/*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold,
5 * in both source and binary form provided that the above copyright,
6 * these terms and the following disclaimer are retained. The name of
7 * the author and/or the contributor may not be used to endorse or
8 * promote products derived from this software without specific prior
9 * written permission.
10 *
11 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
12 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
14 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
15 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
16 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
17 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
18 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
19 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
20 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
21 * SUCH DAMAGE.
22 */
23
24#define FE_REG_VERSION "if_fereg.h ver. 0.8"
25
26/*
27 * Hardware specification of various 86960/86965 based Ethernet cards.
28 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp>
29 */
30
31/*
32 * Registers on FMV-180 series' ISA bus interface ASIC.
33 * I'm not sure the following register names are appropriate.
34 * Doesn't it look silly, eh? FIXME.
35 */
36
37#define FE_FMV0 16 /* Hardware status. */
38#define FE_FMV1 17 /* Hardware type? Always 0 */
39#define FE_FMV2 18 /* Hardware configuration. */
40#define FE_FMV3 19 /* Hardware enable. */
41#define FE_FMV4 20 /* Station address #1 */
42#define FE_FMV5 21 /* Station address #2 */
43#define FE_FMV6 22 /* Station address #3 */
44#define FE_FMV7 23 /* Station address #4 */
45#define FE_FMV8 24 /* Station address #5 */
46#define FE_FMV9 25 /* Station address #6 */
47#define FE_FMV10 26 /* Unknown; to be set to 0. */
48
49/*
50 * FMV-180 series' ASIC register values.
51 */
52
53/* Magic value in FMV0 register. */
54#define FE_FMV0_MAGIC_MASK 0x78
55#define FE_FMV0_MAGIC_VALUE 0x50
56
57/* Model identification. */
58#define FE_FMV0_MODEL 0x07
59#define FE_FMV0_MODEL_FMV181 0x05
60#define FE_FMV0_MODEL_FMV182 0x03
61
62/* Card type ID? Always 0? */
63#define FE_FMV1_CARDID_MASK 0xFF
64#define FE_FMV1_CARDID_ID 0x00
65
66/* I/O port address assignment. */
67#define FE_FMV2_ADDR 0x07
68#define FE_FMV2_ADDR_SHIFT 0
69
70/* Boot ROM address assignment. */
71#define FE_FMV2_ROM 0x38
72#define FE_FMV2_ROM_SHIFT 3
73
74/* IRQ assignment. */
75#define FE_FMV2_IRQ 0xC0
76#define FE_FMV2_IRQ_SHIFT 6
77
78/* Hardware(?) enable flag. */
79#define FE_FMV3_ENABLE_FLAG 0x80
80
81/* Extra bits in FMV3 register. Always 0? */
82#define FE_FMV3_EXTRA_MASK 0x7F
83#define FE_FMV3_EXTRA_VALUE 0x00
84
85/*
86 * EEPROM allocation of AT1700/RE2000.
87 */
88#define FE_EEP_ATI_ADDR 8 /* Station address. (8-13) */
89#define FE_EEP_ATI_TYPE 25 /* Hardware type? FIXME. */
90
91#define FE_EEP_ATI_TYPE_HIGHIRQ 0x04 /* IRQ delivery? FIXME. */
92
93/*
94 * Registers on MBH10302.
95 */
96
97#define FE_MBH0 0x10 /* ??? Including interrupt. */
98#define FE_MBH1 0x11 /* ??? */
99#define FE_MBH10 0x1A /* Station address. (10 - 15) */
100
101/* Values to be set in MBH0 register. */
102#define FE_MBH0_MAGIC 0x0D /* Just a magic constant? */
103#define FE_MBH0_INTR 0x10 /* Master interrupt control. */
104
105#define FE_MBH0_INTR_ENABLE 0x10 /* Enable interrupts. */
106#define FE_MBH0_INTR_DISABLE 0x00 /* Disable interrupts. */
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold,
5 * in both source and binary form provided that the above copyright,
6 * these terms and the following disclaimer are retained. The name of
7 * the author and/or the contributor may not be used to endorse or
8 * promote products derived from this software without specific prior
9 * written permission.
10 *
11 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
12 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
13 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
14 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
15 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
16 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
17 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
18 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
19 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
20 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
21 * SUCH DAMAGE.
22 */
23
24#define FE_REG_VERSION "if_fereg.h ver. 0.8"
25
26/*
27 * Hardware specification of various 86960/86965 based Ethernet cards.
28 * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp>
29 */
30
31/*
32 * Registers on FMV-180 series' ISA bus interface ASIC.
33 * I'm not sure the following register names are appropriate.
34 * Doesn't it look silly, eh? FIXME.
35 */
36
37#define FE_FMV0 16 /* Hardware status. */
38#define FE_FMV1 17 /* Hardware type? Always 0 */
39#define FE_FMV2 18 /* Hardware configuration. */
40#define FE_FMV3 19 /* Hardware enable. */
41#define FE_FMV4 20 /* Station address #1 */
42#define FE_FMV5 21 /* Station address #2 */
43#define FE_FMV6 22 /* Station address #3 */
44#define FE_FMV7 23 /* Station address #4 */
45#define FE_FMV8 24 /* Station address #5 */
46#define FE_FMV9 25 /* Station address #6 */
47#define FE_FMV10 26 /* Unknown; to be set to 0. */
48
49/*
50 * FMV-180 series' ASIC register values.
51 */
52
53/* Magic value in FMV0 register. */
54#define FE_FMV0_MAGIC_MASK 0x78
55#define FE_FMV0_MAGIC_VALUE 0x50
56
57/* Model identification. */
58#define FE_FMV0_MODEL 0x07
59#define FE_FMV0_MODEL_FMV181 0x05
60#define FE_FMV0_MODEL_FMV182 0x03
61
62/* Card type ID? Always 0? */
63#define FE_FMV1_CARDID_MASK 0xFF
64#define FE_FMV1_CARDID_ID 0x00
65
66/* I/O port address assignment. */
67#define FE_FMV2_ADDR 0x07
68#define FE_FMV2_ADDR_SHIFT 0
69
70/* Boot ROM address assignment. */
71#define FE_FMV2_ROM 0x38
72#define FE_FMV2_ROM_SHIFT 3
73
74/* IRQ assignment. */
75#define FE_FMV2_IRQ 0xC0
76#define FE_FMV2_IRQ_SHIFT 6
77
78/* Hardware(?) enable flag. */
79#define FE_FMV3_ENABLE_FLAG 0x80
80
81/* Extra bits in FMV3 register. Always 0? */
82#define FE_FMV3_EXTRA_MASK 0x7F
83#define FE_FMV3_EXTRA_VALUE 0x00
84
85/*
86 * EEPROM allocation of AT1700/RE2000.
87 */
88#define FE_EEP_ATI_ADDR 8 /* Station address. (8-13) */
89#define FE_EEP_ATI_TYPE 25 /* Hardware type? FIXME. */
90
91#define FE_EEP_ATI_TYPE_HIGHIRQ 0x04 /* IRQ delivery? FIXME. */
92
93/*
94 * Registers on MBH10302.
95 */
96
97#define FE_MBH0 0x10 /* ??? Including interrupt. */
98#define FE_MBH1 0x11 /* ??? */
99#define FE_MBH10 0x1A /* Station address. (10 - 15) */
100
101/* Values to be set in MBH0 register. */
102#define FE_MBH0_MAGIC 0x0D /* Just a magic constant? */
103#define FE_MBH0_INTR 0x10 /* Master interrupt control. */
104
105#define FE_MBH0_INTR_ENABLE 0x10 /* Enable interrupts. */
106#define FE_MBH0_INTR_DISABLE 0x00 /* Disable interrupts. */