| arswitch_phy.c (235288) | arswitch_phy.c (241578) |
|---|---|
| 1/*- 2 * Copyright (c) 2011-2012 Stefan Bethke. 3 * Copyright (c) 2012 Adrian Chadd. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2011-2012 Stefan Bethke. 3 * Copyright (c) 2012 Adrian Chadd. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/etherswitch/arswitch/arswitch_phy.c 235288 2012-05-11 20:53:20Z adrian $ | 27 * $FreeBSD: head/sys/dev/etherswitch/arswitch/arswitch_phy.c 241578 2012-10-15 12:20:40Z ray $ |
| 28 */ 29 30#include <sys/param.h> 31#include <sys/bus.h> 32#include <sys/errno.h> 33#include <sys/kernel.h> 34#include <sys/module.h> 35#include <sys/socket.h> --- 34 unchanged lines hidden (view full) --- 70 71/* 72 * access PHYs integrated into the switch chip through the switch's MDIO 73 * control register. 74 */ 75int 76arswitch_readphy(device_t dev, int phy, int reg) 77{ | 28 */ 29 30#include <sys/param.h> 31#include <sys/bus.h> 32#include <sys/errno.h> 33#include <sys/kernel.h> 34#include <sys/module.h> 35#include <sys/socket.h> --- 34 unchanged lines hidden (view full) --- 70 71/* 72 * access PHYs integrated into the switch chip through the switch's MDIO 73 * control register. 74 */ 75int 76arswitch_readphy(device_t dev, int phy, int reg) 77{ |
| 78 struct arswitch_softc *sc; |
|
| 78 uint32_t data = 0, ctrl; 79 int err, timeout; 80 | 79 uint32_t data = 0, ctrl; 80 int err, timeout; 81 |
| 82 sc = device_get_softc(dev); 83 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 84 |
|
| 81 if (phy < 0 || phy >= 32) 82 return (ENXIO); 83 if (reg < 0 || reg >= 32) 84 return (ENXIO); | 85 if (phy < 0 || phy >= 32) 86 return (ENXIO); 87 if (reg < 0 || reg >= 32) 88 return (ENXIO); |
| 89 90 ARSWITCH_LOCK(sc); |
|
| 85 err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL, 86 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN | 87 AR8X16_MDIO_CTRL_CMD_READ | 88 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 89 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); 90 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg); 91 if (err != 0) | 91 err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL, 92 AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN | 93 AR8X16_MDIO_CTRL_CMD_READ | 94 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 95 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); 96 DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg); 97 if (err != 0) |
| 92 return (-1); | 98 goto fail; |
| 93 for (timeout = 100; timeout--; ) { 94 ctrl = arswitch_readreg_msb(dev, AR8X16_REG_MDIO_CTRL); 95 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 96 break; 97 } 98 if (timeout < 0) | 99 for (timeout = 100; timeout--; ) { 100 ctrl = arswitch_readreg_msb(dev, AR8X16_REG_MDIO_CTRL); 101 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 102 break; 103 } 104 if (timeout < 0) |
| 99 err = EIO; | 105 goto fail; |
| 100 data = arswitch_readreg_lsb(dev, AR8X16_REG_MDIO_CTRL) & 101 AR8X16_MDIO_CTRL_DATA_MASK; | 106 data = arswitch_readreg_lsb(dev, AR8X16_REG_MDIO_CTRL) & 107 AR8X16_MDIO_CTRL_DATA_MASK; |
| 108 ARSWITCH_UNLOCK(sc); |
|
| 102 return (data); | 109 return (data); |
| 110 111fail: 112 ARSWITCH_UNLOCK(sc); 113 return (-1); |
|
| 103} 104 105int 106arswitch_writephy(device_t dev, int phy, int reg, int data) 107{ | 114} 115 116int 117arswitch_writephy(device_t dev, int phy, int reg, int data) 118{ |
| 119 struct arswitch_softc *sc; |
|
| 108 uint32_t ctrl; 109 int err, timeout; | 120 uint32_t ctrl; 121 int err, timeout; |
| 110 | 122 123 sc = device_get_softc(dev); 124 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 125 |
| 111 if (reg < 0 || reg >= 32) 112 return (ENXIO); | 126 if (reg < 0 || reg >= 32) 127 return (ENXIO); |
| 128 129 ARSWITCH_LOCK(sc); |
|
| 113 err = arswitch_writereg_lsb(dev, AR8X16_REG_MDIO_CTRL, 114 (data & AR8X16_MDIO_CTRL_DATA_MASK)); | 130 err = arswitch_writereg_lsb(dev, AR8X16_REG_MDIO_CTRL, 131 (data & AR8X16_MDIO_CTRL_DATA_MASK)); |
| 115 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg); | |
| 116 if (err != 0) | 132 if (err != 0) |
| 117 return (err); | 133 goto out; |
| 118 err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL, 119 AR8X16_MDIO_CTRL_BUSY | 120 AR8X16_MDIO_CTRL_MASTER_EN | 121 AR8X16_MDIO_CTRL_CMD_WRITE | 122 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 123 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); | 134 err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL, 135 AR8X16_MDIO_CTRL_BUSY | 136 AR8X16_MDIO_CTRL_MASTER_EN | 137 AR8X16_MDIO_CTRL_CMD_WRITE | 138 (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) | 139 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); |
| 124 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg); | |
| 125 if (err != 0) | 140 if (err != 0) |
| 126 return (err); | 141 goto out; |
| 127 for (timeout = 100; timeout--; ) { 128 ctrl = arswitch_readreg(dev, AR8X16_REG_MDIO_CTRL); 129 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 130 break; 131 } 132 if (timeout < 0) 133 err = EIO; | 142 for (timeout = 100; timeout--; ) { 143 ctrl = arswitch_readreg(dev, AR8X16_REG_MDIO_CTRL); 144 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0) 145 break; 146 } 147 if (timeout < 0) 148 err = EIO; |
| 149out: |
|
| 134 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg); | 150 DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg); |
| 151 ARSWITCH_UNLOCK(sc); |
|
| 135 return (err); 136} | 152 return (err); 153} |