62c62
< __FBSDID("$FreeBSD: head/sys/dev/esp/esp_sbus.c 226381 2011-10-15 09:29:43Z marius $");
---
> __FBSDID("$FreeBSD: head/sys/dev/esp/esp_sbus.c 226947 2011-10-30 21:17:42Z marius $");
70a71
> #include <sys/rman.h>
77d77
< #include <sys/rman.h>
95c95
< struct device *sc_dev;
---
> device_t sc_dev;
105,106d104
< static devclass_t esp_devclass;
<
121c119,120
< {0, 0}
---
>
> KOBJMETHOD_END
139c138,139
< {0, 0}
---
>
> KOBJMETHOD_END
178d177
< NULL, /* gl_clear_latched_intr */
248,250c247,249
< BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
< 0, /* nsegments */
< BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
---
> BUS_SPACE_MAXSIZE, /* maxsize */
> BUS_SPACE_UNRESTRICTED, /* nsegments */
> BUS_SPACE_MAXSIZE, /* maxsegsize */
295,296c294,297
< sbus_get_slot(children[i]) == sbus_get_slot(dev) &&
< strcmp(ofw_bus_get_name(children[i]), "dma") == 0) {
---
> sbus_get_slot(children[i]) ==
> sbus_get_slot(dev) &&
> strcmp(ofw_bus_get_name(children[i]),
> "dma") == 0) {
456,462d456
< /* Attach the DMA engine. */
< error = lsi64854_attach(esc->sc_dma);
< if (error != 0) {
< device_printf(esc->sc_dev, "lsi64854_attach failed\n");
< goto fail_lock;
< }
<
519c513
< (NCRCFG2_SCSI2 | NCRCFG2_RPE)) {
---
> (NCRCFG2_SCSI2 | NCRCFG2_RPE))
521c515
< } else {
---
> else {
529c523
< (NCRCFG3_CDB | NCRCFG3_FCLK)) {
---
> (NCRCFG3_CDB | NCRCFG3_FCLK))
531c525
< } else {
---
> else {
546c540,541
< sc->sc_rev = NCR_VARIANT_FAS216;
---
> sc->sc_rev =
> NCR_VARIANT_FAS216;
548c543,544
< sc->sc_rev = NCR_VARIANT_FAS236;
---
> sc->sc_rev =
> NCR_VARIANT_FAS236;
563c559,560
< goto fail_lsi;
---
> error = ENXIO;
> goto fail_lock;
574,579d570
< * XXX minsync and maxxfer _should_ be set up in MI code,
< * XXX but it appears to have some dependency on what sort
< * XXX of DMA we're hooked up to, etc.
< */
<
< /*
589a581,584
> /*
> * Except for some variants the maximum transfer size is 64k.
> */
> sc->sc_maxxfer = 64 * 1024;
595,596c590,591
< * only valid when can switch on FASTCLK and FASTSCSI bits
< * in config register 3...
---
> * only valid when we can switch on FASTCLK and FASTSCSI bits
> * in the config register 3...
601d595
< sc->sc_maxxfer = 64 * 1024;
606,611d599
< sc->sc_maxwidth = MSG_EXT_WDTR_BUS_8_BIT;
< sc->sc_maxxfer = 64 * 1024;
< /* Min clocks/byte is 5 */
< sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5);
< break;
<
614d601
< sc->sc_maxxfer = 16 * 1024 * 1024;
644a632,644
> /*
> * Given that we allocate resources based on sc->sc_maxxfer it doesn't
> * make sense to supply a value higher than the maximum actually used.
> */
> sc->sc_maxxfer = min(sc->sc_maxxfer, MAXPHYS);
>
> /* Attach the DMA engine. */
> error = lsi64854_attach(esc->sc_dma);
> if (error != 0) {
> device_printf(esc->sc_dev, "lsi64854_attach failed\n");
> goto fail_lock;
> }
>