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< * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 71324 2001-01-21 08:20:23Z imp $
---
> * $FreeBSD: head/sys/dev/ed/if_ed_pccard.c 73374 2001-03-03 08:31:37Z imp $
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> #include <net/if_media.h>
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> #include <dev/mii/mii.h>
> #include <dev/mii/miivar.h>
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> /* "device miibus" required. See GENERIC if you get errors here. */
> #include "miibus_if.h"
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> MODULE_DEPEND(ed, miibus, 1, 1, 1);
>
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> static void ed_pccard_dlink_mii_reset(struct ed_softc *sc);
> static u_int ed_pccard_dlink_mii_readbits(struct ed_softc *sc, int nbits);
> static void ed_pccard_dlink_mii_writebits(struct ed_softc *sc, u_int val,
> int nbits);
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>
> /* Probe for an MII bus, but continue as normal if there isn't one. */
> ed_pccard_dlink_mii_reset(sc);
> sc->mii_readbits = ed_pccard_dlink_mii_readbits;
> sc->mii_writebits = ed_pccard_dlink_mii_writebits;
> mii_phy_probe(dev, &sc->miibus, ed_ifmedia_upd, ed_ifmedia_sts);
>
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> /* MII bit-twiddling routines for cards using Dlink chipset */
> #define DLINK_MIISET(sc, x) ed_asic_outb(sc, ED_DLINK_MIIBUS, \
> ed_asic_inb(sc, ED_DLINK_MIIBUS) | (x))
> #define DLINK_MIICLR(sc, x) ed_asic_outb(sc, ED_DLINK_MIIBUS, \
> ed_asic_inb(sc, ED_DLINK_MIIBUS) & ~(x))
>
> static void
> ed_pccard_dlink_mii_reset(sc)
> struct ed_softc *sc;
> {
> ed_asic_outb(sc, ED_DLINK_MIIBUS, 0);
> DELAY(10);
> DLINK_MIISET(sc, ED_DLINK_MII_RESET2);
> DELAY(10);
> DLINK_MIISET(sc, ED_DLINK_MII_RESET1);
> DELAY(10);
> DLINK_MIICLR(sc, ED_DLINK_MII_RESET1);
> DELAY(10);
> DLINK_MIICLR(sc, ED_DLINK_MII_RESET2);
> DELAY(10);
> }
>
> static void
> ed_pccard_dlink_mii_writebits(sc, val, nbits)
> struct ed_softc *sc;
> u_int val;
> int nbits;
> {
> int i;
>
> DLINK_MIISET(sc, ED_DLINK_MII_DIROUT);
>
> for (i = nbits - 1; i >= 0; i--) {
> if ((val >> i) & 1)
> DLINK_MIISET(sc, ED_DLINK_MII_DATAOUT);
> else
> DLINK_MIICLR(sc, ED_DLINK_MII_DATAOUT);
> DELAY(10);
> DLINK_MIISET(sc, ED_DLINK_MII_CLK);
> DELAY(10);
> DLINK_MIICLR(sc, ED_DLINK_MII_CLK);
> DELAY(10);
> }
> }
>
> static u_int
> ed_pccard_dlink_mii_readbits(sc, nbits)
> struct ed_softc *sc;
> int nbits;
> {
> int i;
> u_int val = 0;
>
> DLINK_MIICLR(sc, ED_DLINK_MII_DIROUT);
>
> for (i = nbits - 1; i >= 0; i--) {
> DLINK_MIISET(sc, ED_DLINK_MII_CLK);
> DELAY(10);
> val <<= 1;
> if (ed_asic_inb(sc, ED_DLINK_MIIBUS) & ED_DLINK_MII_DATATIN)
> val++;
> DLINK_MIICLR(sc, ED_DLINK_MII_CLK);
> DELAY(10);
> }
>
> return val;
> }
>
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> /* Bus interface */
> DEVMETHOD(bus_child_detached, ed_child_detached),
>
> /* MII interface */
> DEVMETHOD(miibus_readreg, ed_miibus_readreg),
> DEVMETHOD(miibus_writereg, ed_miibus_writereg),
>
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> DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);