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if_em.c (295133) if_em.c (295323)
1/******************************************************************************
2
3 Copyright (c) 2001-2015, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
1/******************************************************************************
2
3 Copyright (c) 2001-2015, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/if_em.c 295133 2016-02-01 23:51:30Z marius $*/
33/*$FreeBSD: head/sys/dev/e1000/if_em.c 295323 2016-02-05 17:14:37Z erj $*/
34
35#include "opt_em.h"
36#include "opt_ddb.h"
37#include "opt_inet.h"
38#include "opt_inet6.h"
39
40#ifdef HAVE_KERNEL_OPTION_HEADERS
41#include "opt_device_polling.h"

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91#include <dev/pci/pcivar.h>
92#include <dev/pci/pcireg.h>
93
94#include "e1000_api.h"
95#include "e1000_82571.h"
96#include "if_em.h"
97
98/*********************************************************************
34
35#include "opt_em.h"
36#include "opt_ddb.h"
37#include "opt_inet.h"
38#include "opt_inet6.h"
39
40#ifdef HAVE_KERNEL_OPTION_HEADERS
41#include "opt_device_polling.h"

--- 49 unchanged lines hidden (view full) ---

91#include <dev/pci/pcivar.h>
92#include <dev/pci/pcireg.h>
93
94#include "e1000_api.h"
95#include "e1000_82571.h"
96#include "if_em.h"
97
98/*********************************************************************
99 * Set this to one to display debug statistics
100 *********************************************************************/
101int em_display_debug_stats = 0;
102
103/*********************************************************************
104 * Driver version:
105 *********************************************************************/
99 * Driver version:
100 *********************************************************************/
106char em_driver_version[] = "7.4.2";
101char em_driver_version[] = "7.6.1-k";
107
108/*********************************************************************
109 * PCI Device ID Table
110 *
111 * Used by probe to select devices to load on
112 * Last field stores an index into e1000_strings
113 * Last entry must be all 0s
114 *

--- 71 unchanged lines hidden (view full) ---

186 { 0x8086, E1000_DEV_ID_PCH_LPTLP_I218_LM,
187 PCI_ANY_ID, PCI_ANY_ID, 0},
188 { 0x8086, E1000_DEV_ID_PCH_LPTLP_I218_V,
189 PCI_ANY_ID, PCI_ANY_ID, 0},
190 { 0x8086, E1000_DEV_ID_PCH_I218_LM2, PCI_ANY_ID, PCI_ANY_ID, 0},
191 { 0x8086, E1000_DEV_ID_PCH_I218_V2, PCI_ANY_ID, PCI_ANY_ID, 0},
192 { 0x8086, E1000_DEV_ID_PCH_I218_LM3, PCI_ANY_ID, PCI_ANY_ID, 0},
193 { 0x8086, E1000_DEV_ID_PCH_I218_V3, PCI_ANY_ID, PCI_ANY_ID, 0},
102
103/*********************************************************************
104 * PCI Device ID Table
105 *
106 * Used by probe to select devices to load on
107 * Last field stores an index into e1000_strings
108 * Last entry must be all 0s
109 *

--- 71 unchanged lines hidden (view full) ---

181 { 0x8086, E1000_DEV_ID_PCH_LPTLP_I218_LM,
182 PCI_ANY_ID, PCI_ANY_ID, 0},
183 { 0x8086, E1000_DEV_ID_PCH_LPTLP_I218_V,
184 PCI_ANY_ID, PCI_ANY_ID, 0},
185 { 0x8086, E1000_DEV_ID_PCH_I218_LM2, PCI_ANY_ID, PCI_ANY_ID, 0},
186 { 0x8086, E1000_DEV_ID_PCH_I218_V2, PCI_ANY_ID, PCI_ANY_ID, 0},
187 { 0x8086, E1000_DEV_ID_PCH_I218_LM3, PCI_ANY_ID, PCI_ANY_ID, 0},
188 { 0x8086, E1000_DEV_ID_PCH_I218_V3, PCI_ANY_ID, PCI_ANY_ID, 0},
189 { 0x8086, E1000_DEV_ID_PCH_SPT_I219_LM, PCI_ANY_ID, PCI_ANY_ID, 0},
190 { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V, PCI_ANY_ID, PCI_ANY_ID, 0},
191 { 0x8086, E1000_DEV_ID_PCH_SPT_I219_LM2,
192 PCI_ANY_ID, PCI_ANY_ID, 0},
193 { 0x8086, E1000_DEV_ID_PCH_SPT_I219_V2, PCI_ANY_ID, PCI_ANY_ID, 0},
194 { 0x8086, E1000_DEV_ID_PCH_LBG_I219_LM3,
195 PCI_ANY_ID, PCI_ANY_ID, 0},
194 /* required last entry */
195 { 0, 0, 0, 0, 0}
196};
197
198/*********************************************************************
199 * Table of branding strings for all supported NICs.
200 *********************************************************************/
201

--- 31 unchanged lines hidden (view full) ---

233static int em_allocate_legacy(struct adapter *);
234static int em_allocate_msix(struct adapter *);
235static int em_allocate_queues(struct adapter *);
236static int em_setup_msix(struct adapter *);
237static void em_free_pci_resources(struct adapter *);
238static void em_local_timer(void *);
239static void em_reset(struct adapter *);
240static int em_setup_interface(device_t, struct adapter *);
196 /* required last entry */
197 { 0, 0, 0, 0, 0}
198};
199
200/*********************************************************************
201 * Table of branding strings for all supported NICs.
202 *********************************************************************/
203

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235static int em_allocate_legacy(struct adapter *);
236static int em_allocate_msix(struct adapter *);
237static int em_allocate_queues(struct adapter *);
238static int em_setup_msix(struct adapter *);
239static void em_free_pci_resources(struct adapter *);
240static void em_local_timer(void *);
241static void em_reset(struct adapter *);
242static int em_setup_interface(device_t, struct adapter *);
243static void em_flush_desc_rings(struct adapter *);
241
242static void em_setup_transmit_structures(struct adapter *);
243static void em_initialize_transmit_unit(struct adapter *);
244static int em_allocate_transmit_buffers(struct tx_ring *);
245static void em_free_transmit_structures(struct adapter *);
246static void em_free_transmit_buffers(struct tx_ring *);
247
248static int em_setup_receive_structures(struct adapter *);

--- 323 unchanged lines hidden (view full) ---

572 }
573 /* This is used in the shared code */
574 hw->flash_address = (u8 *)adapter->flash;
575 adapter->osdep.flash_bus_space_tag =
576 rman_get_bustag(adapter->flash);
577 adapter->osdep.flash_bus_space_handle =
578 rman_get_bushandle(adapter->flash);
579 }
244
245static void em_setup_transmit_structures(struct adapter *);
246static void em_initialize_transmit_unit(struct adapter *);
247static int em_allocate_transmit_buffers(struct tx_ring *);
248static void em_free_transmit_structures(struct adapter *);
249static void em_free_transmit_buffers(struct tx_ring *);
250
251static int em_setup_receive_structures(struct adapter *);

--- 323 unchanged lines hidden (view full) ---

575 }
576 /* This is used in the shared code */
577 hw->flash_address = (u8 *)adapter->flash;
578 adapter->osdep.flash_bus_space_tag =
579 rman_get_bustag(adapter->flash);
580 adapter->osdep.flash_bus_space_handle =
581 rman_get_bushandle(adapter->flash);
582 }
583 /*
584 ** In the new SPT device flash is not a
585 ** seperate BAR, rather it is also in BAR0,
586 ** so use the same tag and an offset handle for the
587 ** FLASH read/write macros in the shared code.
588 */
589 else if (hw->mac.type == e1000_pch_spt) {
590 adapter->osdep.flash_bus_space_tag =
591 adapter->osdep.mem_bus_space_tag;
592 adapter->osdep.flash_bus_space_handle =
593 adapter->osdep.mem_bus_space_handle
594 + E1000_FLASH_BASE_ADDR;
595 }
580
581 /* Do Shared Code initialization */
596
597 /* Do Shared Code initialization */
582 if (e1000_setup_init_funcs(hw, TRUE)) {
583 device_printf(dev, "Setup of Shared code failed\n");
598 error = e1000_setup_init_funcs(hw, TRUE);
599 if (error) {
600 device_printf(dev, "Setup of Shared code failed, error %d\n",
601 error);
584 error = ENXIO;
585 goto err_pci;
586 }
587
588 /*
589 * Setup MSI/X or MSI if PCI Express
590 */
591 adapter->msix = em_setup_msix(adapter);

--- 573 unchanged lines hidden (view full) ---

1165 EM_CORE_LOCK(adapter);
1166 switch (adapter->hw.mac.type) {
1167 case e1000_82571:
1168 case e1000_82572:
1169 case e1000_ich9lan:
1170 case e1000_ich10lan:
1171 case e1000_pch2lan:
1172 case e1000_pch_lpt:
602 error = ENXIO;
603 goto err_pci;
604 }
605
606 /*
607 * Setup MSI/X or MSI if PCI Express
608 */
609 adapter->msix = em_setup_msix(adapter);

--- 573 unchanged lines hidden (view full) ---

1183 EM_CORE_LOCK(adapter);
1184 switch (adapter->hw.mac.type) {
1185 case e1000_82571:
1186 case e1000_82572:
1187 case e1000_ich9lan:
1188 case e1000_ich10lan:
1189 case e1000_pch2lan:
1190 case e1000_pch_lpt:
1191 case e1000_pch_spt:
1173 case e1000_82574:
1174 case e1000_82583:
1175 case e1000_80003es2lan: /* 9K Jumbo Frame size */
1176 max_frame_size = 9234;
1177 break;
1178 case e1000_pchlan:
1179 max_frame_size = 4096;
1180 break;

--- 1173 unchanged lines hidden (view full) ---

2354 device_t dev = adapter->dev;
2355 struct tx_ring *txr = adapter->tx_rings;
2356 u32 link_check = 0;
2357
2358 /* Get the cached link value or read phy for real */
2359 switch (hw->phy.media_type) {
2360 case e1000_media_type_copper:
2361 if (hw->mac.get_link_status) {
1192 case e1000_82574:
1193 case e1000_82583:
1194 case e1000_80003es2lan: /* 9K Jumbo Frame size */
1195 max_frame_size = 9234;
1196 break;
1197 case e1000_pchlan:
1198 max_frame_size = 4096;
1199 break;

--- 1173 unchanged lines hidden (view full) ---

2373 device_t dev = adapter->dev;
2374 struct tx_ring *txr = adapter->tx_rings;
2375 u32 link_check = 0;
2376
2377 /* Get the cached link value or read phy for real */
2378 switch (hw->phy.media_type) {
2379 case e1000_media_type_copper:
2380 if (hw->mac.get_link_status) {
2381 if (hw->mac.type == e1000_pch_spt)
2382 msec_delay(50);
2362 /* Do the work to read phy */
2363 e1000_check_for_link(hw);
2364 link_check = !hw->mac.get_link_status;
2365 if (link_check) /* ESB2 fix */
2366 e1000_cfg_on_link_up(hw);
2367 } else
2368 link_check = TRUE;
2369 break;

--- 75 unchanged lines hidden (view full) ---

2445
2446 /* Disarm Hang Detection. */
2447 for (int i = 0; i < adapter->num_queues; i++, txr++) {
2448 EM_TX_LOCK(txr);
2449 txr->busy = EM_TX_IDLE;
2450 EM_TX_UNLOCK(txr);
2451 }
2452
2383 /* Do the work to read phy */
2384 e1000_check_for_link(hw);
2385 link_check = !hw->mac.get_link_status;
2386 if (link_check) /* ESB2 fix */
2387 e1000_cfg_on_link_up(hw);
2388 } else
2389 link_check = TRUE;
2390 break;

--- 75 unchanged lines hidden (view full) ---

2466
2467 /* Disarm Hang Detection. */
2468 for (int i = 0; i < adapter->num_queues; i++, txr++) {
2469 EM_TX_LOCK(txr);
2470 txr->busy = EM_TX_IDLE;
2471 EM_TX_UNLOCK(txr);
2472 }
2473
2474 /* I219 needs some special flushing to avoid hangs */
2475 if (adapter->hw.mac.type == e1000_pch_spt)
2476 em_flush_desc_rings(adapter);
2477
2453 e1000_reset_hw(&adapter->hw);
2454 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2455
2456 e1000_led_off(&adapter->hw);
2457 e1000_cleanup_led(&adapter->hw);
2458}
2459
2460

--- 403 unchanged lines hidden (view full) ---

2864 return (val);
2865 }
2866 /* Should only happen due to manual configuration */
2867 device_printf(adapter->dev,"No MSI/MSIX using a Legacy IRQ\n");
2868 return (0);
2869}
2870
2871
2478 e1000_reset_hw(&adapter->hw);
2479 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2480
2481 e1000_led_off(&adapter->hw);
2482 e1000_cleanup_led(&adapter->hw);
2483}
2484
2485

--- 403 unchanged lines hidden (view full) ---

2889 return (val);
2890 }
2891 /* Should only happen due to manual configuration */
2892 device_printf(adapter->dev,"No MSI/MSIX using a Legacy IRQ\n");
2893 return (0);
2894}
2895
2896
2897/*
2898** The 3 following flush routines are used as a workaround in the
2899** I219 client parts and only for them.
2900**
2901** em_flush_tx_ring - remove all descriptors from the tx_ring
2902**
2903** We want to clear all pending descriptors from the TX ring.
2904** zeroing happens when the HW reads the regs. We assign the ring itself as
2905** the data of the next descriptor. We don't care about the data we are about
2906** to reset the HW.
2907*/
2908static void
2909em_flush_tx_ring(struct adapter *adapter)
2910{
2911 struct e1000_hw *hw = &adapter->hw;
2912 struct tx_ring *txr = adapter->tx_rings;
2913 struct e1000_tx_desc *txd;
2914 u32 tctl, txd_lower = E1000_TXD_CMD_IFCS;
2915 u16 size = 512;
2916
2917 tctl = E1000_READ_REG(hw, E1000_TCTL);
2918 E1000_WRITE_REG(hw, E1000_TCTL, tctl | E1000_TCTL_EN);
2919
2920 txd = &txr->tx_base[txr->next_avail_desc++];
2921 if (txr->next_avail_desc == adapter->num_tx_desc)
2922 txr->next_avail_desc = 0;
2923
2924 /* Just use the ring as a dummy buffer addr */
2925 txd->buffer_addr = txr->txdma.dma_paddr;
2926 txd->lower.data = htole32(txd_lower | size);
2927 txd->upper.data = 0;
2928
2929 /* flush descriptors to memory before notifying the HW */
2930 wmb();
2931
2932 E1000_WRITE_REG(hw, E1000_TDT(0), txr->next_avail_desc);
2933 mb();
2934 usec_delay(250);
2935}
2936
2937/*
2938** em_flush_rx_ring - remove all descriptors from the rx_ring
2939**
2940** Mark all descriptors in the RX ring as consumed and disable the rx ring
2941*/
2942static void
2943em_flush_rx_ring(struct adapter *adapter)
2944{
2945 struct e1000_hw *hw = &adapter->hw;
2946 u32 rctl, rxdctl;
2947
2948 rctl = E1000_READ_REG(hw, E1000_RCTL);
2949 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
2950 E1000_WRITE_FLUSH(hw);
2951 usec_delay(150);
2952
2953 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));
2954 /* zero the lower 14 bits (prefetch and host thresholds) */
2955 rxdctl &= 0xffffc000;
2956 /*
2957 * update thresholds: prefetch threshold to 31, host threshold to 1
2958 * and make sure the granularity is "descriptors" and not "cache lines"
2959 */
2960 rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
2961 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl);
2962
2963 /* momentarily enable the RX ring for the changes to take effect */
2964 E1000_WRITE_REG(hw, E1000_RCTL, rctl | E1000_RCTL_EN);
2965 E1000_WRITE_FLUSH(hw);
2966 usec_delay(150);
2967 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
2968}
2969
2970/*
2971** em_flush_desc_rings - remove all descriptors from the descriptor rings
2972**
2973** In i219, the descriptor rings must be emptied before resetting the HW
2974** or before changing the device state to D3 during runtime (runtime PM).
2975**
2976** Failure to do this will cause the HW to enter a unit hang state which can
2977** only be released by PCI reset on the device
2978**
2979*/
2980static void
2981em_flush_desc_rings(struct adapter *adapter)
2982{
2983 struct e1000_hw *hw = &adapter->hw;
2984 device_t dev = adapter->dev;
2985 u16 hang_state;
2986 u32 fext_nvm11, tdlen;
2987
2988 /* First, disable MULR fix in FEXTNVM11 */
2989 fext_nvm11 = E1000_READ_REG(hw, E1000_FEXTNVM11);
2990 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
2991 E1000_WRITE_REG(hw, E1000_FEXTNVM11, fext_nvm11);
2992
2993 /* do nothing if we're not in faulty state, or if the queue is empty */
2994 tdlen = E1000_READ_REG(hw, E1000_TDLEN(0));
2995 hang_state = pci_read_config(dev, PCICFG_DESC_RING_STATUS, 2);
2996 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
2997 return;
2998 em_flush_tx_ring(adapter);
2999
3000 /* recheck, maybe the fault is caused by the rx ring */
3001 hang_state = pci_read_config(dev, PCICFG_DESC_RING_STATUS, 2);
3002 if (hang_state & FLUSH_DESC_REQUIRED)
3003 em_flush_rx_ring(adapter);
3004}
3005
3006
2872/*********************************************************************
2873 *
2874 * Initialize the hardware to a configuration
2875 * as specified by the adapter structure.
2876 *
2877 **********************************************************************/
2878static void
2879em_reset(struct adapter *adapter)

--- 45 unchanged lines hidden (view full) ---

2925 if (adapter->hw.mac.max_frame_size > 4096)
2926 pba = E1000_PBA_14K;
2927 else
2928 pba = E1000_PBA_10K;
2929 break;
2930 case e1000_pchlan:
2931 case e1000_pch2lan:
2932 case e1000_pch_lpt:
3007/*********************************************************************
3008 *
3009 * Initialize the hardware to a configuration
3010 * as specified by the adapter structure.
3011 *
3012 **********************************************************************/
3013static void
3014em_reset(struct adapter *adapter)

--- 45 unchanged lines hidden (view full) ---

3060 if (adapter->hw.mac.max_frame_size > 4096)
3061 pba = E1000_PBA_14K;
3062 else
3063 pba = E1000_PBA_10K;
3064 break;
3065 case e1000_pchlan:
3066 case e1000_pch2lan:
3067 case e1000_pch_lpt:
3068 case e1000_pch_spt:
2933 pba = E1000_PBA_26K;
2934 break;
2935 default:
2936 if (adapter->hw.mac.max_frame_size > 8192)
2937 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
2938 else
2939 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
2940 }

--- 42 unchanged lines hidden (view full) ---

2983 } else {
2984 hw->fc.high_water = 0x5000;
2985 hw->fc.low_water = 0x3000;
2986 }
2987 hw->fc.refresh_time = 0x1000;
2988 break;
2989 case e1000_pch2lan:
2990 case e1000_pch_lpt:
3069 pba = E1000_PBA_26K;
3070 break;
3071 default:
3072 if (adapter->hw.mac.max_frame_size > 8192)
3073 pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
3074 else
3075 pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
3076 }

--- 42 unchanged lines hidden (view full) ---

3119 } else {
3120 hw->fc.high_water = 0x5000;
3121 hw->fc.low_water = 0x3000;
3122 }
3123 hw->fc.refresh_time = 0x1000;
3124 break;
3125 case e1000_pch2lan:
3126 case e1000_pch_lpt:
3127 case e1000_pch_spt:
2991 hw->fc.high_water = 0x5C20;
2992 hw->fc.low_water = 0x5048;
2993 hw->fc.pause_time = 0x0650;
2994 hw->fc.refresh_time = 0x0400;
2995 /* Jumbos need adjusted PBA */
2996 if (if_getmtu(ifp) > ETHERMTU)
2997 E1000_WRITE_REG(hw, E1000_PBA, 12);
2998 else

--- 8 unchanged lines hidden (view full) ---

3007 }
3008 /* else fall thru */
3009 default:
3010 if (hw->mac.type == e1000_80003es2lan)
3011 hw->fc.pause_time = 0xFFFF;
3012 break;
3013 }
3014
3128 hw->fc.high_water = 0x5C20;
3129 hw->fc.low_water = 0x5048;
3130 hw->fc.pause_time = 0x0650;
3131 hw->fc.refresh_time = 0x0400;
3132 /* Jumbos need adjusted PBA */
3133 if (if_getmtu(ifp) > ETHERMTU)
3134 E1000_WRITE_REG(hw, E1000_PBA, 12);
3135 else

--- 8 unchanged lines hidden (view full) ---

3144 }
3145 /* else fall thru */
3146 default:
3147 if (hw->mac.type == e1000_80003es2lan)
3148 hw->fc.pause_time = 0xFFFF;
3149 break;
3150 }
3151
3152 /* I219 needs some special flushing to avoid hangs */
3153 if (hw->mac.type == e1000_pch_spt)
3154 em_flush_desc_rings(adapter);
3155
3015 /* Issue a global reset */
3016 e1000_reset_hw(hw);
3017 E1000_WRITE_REG(hw, E1000_WUC, 0);
3018 em_disable_aspm(adapter);
3019 /* and a re-init */
3020 if (e1000_init_hw(hw) < 0) {
3021 device_printf(dev, "Hardware Initialization Failed\n");
3022 return;

--- 580 unchanged lines hidden (view full) ---

3603 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT));
3604
3605 if (adapter->hw.mac.type >= e1000_82571)
3606 tctl |= E1000_TCTL_MULR;
3607
3608 /* This write will effectively turn on the transmit unit. */
3609 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
3610
3156 /* Issue a global reset */
3157 e1000_reset_hw(hw);
3158 E1000_WRITE_REG(hw, E1000_WUC, 0);
3159 em_disable_aspm(adapter);
3160 /* and a re-init */
3161 if (e1000_init_hw(hw) < 0) {
3162 device_printf(dev, "Hardware Initialization Failed\n");
3163 return;

--- 580 unchanged lines hidden (view full) ---

3744 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT));
3745
3746 if (adapter->hw.mac.type >= e1000_82571)
3747 tctl |= E1000_TCTL_MULR;
3748
3749 /* This write will effectively turn on the transmit unit. */
3750 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
3751
3752 if (hw->mac.type == e1000_pch_spt) {
3753 u32 reg;
3754 reg = E1000_READ_REG(hw, E1000_IOSFPC);
3755 reg |= E1000_RCTL_RDMTS_HEX;
3756 E1000_WRITE_REG(hw, E1000_IOSFPC, reg);
3757 reg = E1000_READ_REG(hw, E1000_TARC(0));
3758 reg |= E1000_TARC0_CB_MULTIQ_3_REQ;
3759 E1000_WRITE_REG(hw, E1000_TARC(0), reg);
3760 }
3611}
3612
3613
3614/*********************************************************************
3615 *
3616 * Free all transmit rings.
3617 *
3618 **********************************************************************/

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3762
3763
3764/*********************************************************************
3765 *
3766 * Free all transmit rings.
3767 *
3768 **********************************************************************/

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