| e1000_phy.h (194865) | e1000_phy.h (200243) |
|---|---|
| 1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ | 1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
| 33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.h 194865 2009-06-24 17:41:29Z jfv $*/ | 33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.h 200243 2009-12-08 01:07:44Z jfv $*/ |
| 34 35#ifndef _E1000_PHY_H_ 36#define _E1000_PHY_H_ 37 38void e1000_init_phy_ops_generic(struct e1000_hw *hw); 39s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data); 40void e1000_null_phy_generic(struct e1000_hw *hw); 41s32 e1000_null_lplu_state(struct e1000_hw *hw, bool active); 42s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data); 43s32 e1000_check_downshift_generic(struct e1000_hw *hw); 44s32 e1000_check_polarity_m88(struct e1000_hw *hw); 45s32 e1000_check_polarity_igp(struct e1000_hw *hw); 46s32 e1000_check_polarity_ife(struct e1000_hw *hw); 47s32 e1000_check_reset_block_generic(struct e1000_hw *hw); | 34 35#ifndef _E1000_PHY_H_ 36#define _E1000_PHY_H_ 37 38void e1000_init_phy_ops_generic(struct e1000_hw *hw); 39s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data); 40void e1000_null_phy_generic(struct e1000_hw *hw); 41s32 e1000_null_lplu_state(struct e1000_hw *hw, bool active); 42s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data); 43s32 e1000_check_downshift_generic(struct e1000_hw *hw); 44s32 e1000_check_polarity_m88(struct e1000_hw *hw); 45s32 e1000_check_polarity_igp(struct e1000_hw *hw); 46s32 e1000_check_polarity_ife(struct e1000_hw *hw); 47s32 e1000_check_reset_block_generic(struct e1000_hw *hw); |
| 48s32 e1000_phy_setup_autoneg(struct e1000_hw *hw); |
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| 48s32 e1000_copper_link_autoneg(struct e1000_hw *hw); 49s32 e1000_copper_link_setup_igp(struct e1000_hw *hw); 50s32 e1000_copper_link_setup_m88(struct e1000_hw *hw); 51s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw); 52s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw); 53s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); 54s32 e1000_get_cable_length_m88(struct e1000_hw *hw); 55s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw); 56s32 e1000_get_cfg_done_generic(struct e1000_hw *hw); 57s32 e1000_get_phy_id(struct e1000_hw *hw); 58s32 e1000_get_phy_info_igp(struct e1000_hw *hw); 59s32 e1000_get_phy_info_m88(struct e1000_hw *hw); | 49s32 e1000_copper_link_autoneg(struct e1000_hw *hw); 50s32 e1000_copper_link_setup_igp(struct e1000_hw *hw); 51s32 e1000_copper_link_setup_m88(struct e1000_hw *hw); 52s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw); 53s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw); 54s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); 55s32 e1000_get_cable_length_m88(struct e1000_hw *hw); 56s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw); 57s32 e1000_get_cfg_done_generic(struct e1000_hw *hw); 58s32 e1000_get_phy_id(struct e1000_hw *hw); 59s32 e1000_get_phy_info_igp(struct e1000_hw *hw); 60s32 e1000_get_phy_info_m88(struct e1000_hw *hw); |
| 61s32 e1000_get_phy_info_ife(struct e1000_hw *hw); |
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| 60s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw); 61void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 62s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw); 63s32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw); | 62s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw); 63void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 64s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw); 65s32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw); |
| 64s32 e1000_phy_setup_autoneg(struct e1000_hw *hw); | |
| 65s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data); | 66s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data); |
| 67s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data); |
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| 66s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); | 68s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); |
| 69s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data); |
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| 67s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 68s32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active); 69s32 e1000_setup_copper_link_generic(struct e1000_hw *hw); 70s32 e1000_wait_autoneg_generic(struct e1000_hw *hw); 71s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data); | 70s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); 71s32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active); 72s32 e1000_setup_copper_link_generic(struct e1000_hw *hw); 73s32 e1000_wait_autoneg_generic(struct e1000_hw *hw); 74s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data); |
| 75s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data); |
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| 72s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); | 76s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); |
| 77s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data); |
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| 73s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 74s32 e1000_phy_reset_dsp(struct e1000_hw *hw); 75s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 76 u32 usec_interval, bool *success); 77s32 e1000_phy_init_script_igp3(struct e1000_hw *hw); 78enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id); 79s32 e1000_determine_phy_address(struct e1000_hw *hw); 80s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 81s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 82s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); 83s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 84void e1000_power_up_phy_copper(struct e1000_hw *hw); 85void e1000_power_down_phy_copper(struct e1000_hw *hw); 86s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); 87s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); | 78s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); 79s32 e1000_phy_reset_dsp(struct e1000_hw *hw); 80s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 81 u32 usec_interval, bool *success); 82s32 e1000_phy_init_script_igp3(struct e1000_hw *hw); 83enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id); 84s32 e1000_determine_phy_address(struct e1000_hw *hw); 85s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); 86s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); 87s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); 88s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 89void e1000_power_up_phy_copper(struct e1000_hw *hw); 90void e1000_power_down_phy_copper(struct e1000_hw *hw); 91s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); 92s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); |
| 93s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data); 94s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data); |
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| 88s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); | 95s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); |
| 96s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data); |
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| 89s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); | 97s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); |
| 98s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data); |
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| 90s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); 91s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 92s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 93s32 e1000_check_polarity_82577(struct e1000_hw *hw); 94s32 e1000_get_phy_info_82577(struct e1000_hw *hw); 95s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); 96s32 e1000_get_cable_length_82577(struct e1000_hw *hw); 97 --- 37 unchanged lines hidden (view full) --- 135 136#define HV_INTC_FC_PAGE_START 768 137#define I82578_ADDR_REG 29 138#define I82577_ADDR_REG 16 139#define I82577_CFG_REG 22 140#define I82577_CFG_ASSERT_CRS_ON_TX (1 << 15) 141#define I82577_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */ 142#define I82577_CTRL_REG 23 | 99s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); 100s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 101s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 102s32 e1000_check_polarity_82577(struct e1000_hw *hw); 103s32 e1000_get_phy_info_82577(struct e1000_hw *hw); 104s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); 105s32 e1000_get_cable_length_82577(struct e1000_hw *hw); 106 --- 37 unchanged lines hidden (view full) --- 144 145#define HV_INTC_FC_PAGE_START 768 146#define I82578_ADDR_REG 29 147#define I82577_ADDR_REG 16 148#define I82577_CFG_REG 22 149#define I82577_CFG_ASSERT_CRS_ON_TX (1 << 15) 150#define I82577_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */ 151#define I82577_CTRL_REG 23 |
| 143#define I82577_CTRL_DOWNSHIFT_MASK (7 << 10) | |
| 144 145/* 82577 specific PHY registers */ 146#define I82577_PHY_CTRL_2 18 147#define I82577_PHY_LBK_CTRL 19 148#define I82577_PHY_STATUS_2 26 149#define I82577_PHY_DIAG_STATUS 31 150 151/* I82577 PHY Status 2 */ --- 18 unchanged lines hidden (view full) --- 170/* BM PHY Copper Specific Status */ 171#define BM_CS_STATUS 17 172#define BM_CS_STATUS_ENERGY_DETECT 0x0010 /* Energy Detect Status */ 173#define BM_CS_STATUS_LINK_UP 0x0400 174#define BM_CS_STATUS_RESOLVED 0x0800 175#define BM_CS_STATUS_SPEED_MASK 0xC000 176#define BM_CS_STATUS_SPEED_1000 0x8000 177 | 152 153/* 82577 specific PHY registers */ 154#define I82577_PHY_CTRL_2 18 155#define I82577_PHY_LBK_CTRL 19 156#define I82577_PHY_STATUS_2 26 157#define I82577_PHY_DIAG_STATUS 31 158 159/* I82577 PHY Status 2 */ --- 18 unchanged lines hidden (view full) --- 178/* BM PHY Copper Specific Status */ 179#define BM_CS_STATUS 17 180#define BM_CS_STATUS_ENERGY_DETECT 0x0010 /* Energy Detect Status */ 181#define BM_CS_STATUS_LINK_UP 0x0400 182#define BM_CS_STATUS_RESOLVED 0x0800 183#define BM_CS_STATUS_SPEED_MASK 0xC000 184#define BM_CS_STATUS_SPEED_1000 0x8000 185 |
| 186/* 82577 Mobile Phy Status Register */ 187#define HV_M_STATUS 26 188#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 189#define HV_M_STATUS_SPEED_MASK 0x0300 190#define HV_M_STATUS_SPEED_1000 0x0200 191#define HV_M_STATUS_LINK_UP 0x0040 192 |
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| 178#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 179#define IGP01E1000_PHY_POLARITY_MASK 0x0078 180 181#define IGP01E1000_PSCR_AUTO_MDIX 0x1000 182#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */ 183 184#define IGP01E1000_PSCFR_SMART_SPEED 0x0080 185 --- 29 unchanged lines hidden (view full) --- 215 216#define E1000_KMRNCTRLSTA_OFFSET 0x001F0000 217#define E1000_KMRNCTRLSTA_OFFSET_SHIFT 16 218#define E1000_KMRNCTRLSTA_REN 0x00200000 219#define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ 220#define E1000_KMRNCTRLSTA_TIMEOUTS 0x4 /* Kumeran Timeouts */ 221#define E1000_KMRNCTRLSTA_INBAND_PARAM 0x9 /* Kumeran InBand Parameters */ 222#define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ | 193#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 194#define IGP01E1000_PHY_POLARITY_MASK 0x0078 195 196#define IGP01E1000_PSCR_AUTO_MDIX 0x1000 197#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */ 198 199#define IGP01E1000_PSCFR_SMART_SPEED 0x0080 200 --- 29 unchanged lines hidden (view full) --- 230 231#define E1000_KMRNCTRLSTA_OFFSET 0x001F0000 232#define E1000_KMRNCTRLSTA_OFFSET_SHIFT 16 233#define E1000_KMRNCTRLSTA_REN 0x00200000 234#define E1000_KMRNCTRLSTA_DIAG_OFFSET 0x3 /* Kumeran Diagnostic */ 235#define E1000_KMRNCTRLSTA_TIMEOUTS 0x4 /* Kumeran Timeouts */ 236#define E1000_KMRNCTRLSTA_INBAND_PARAM 0x9 /* Kumeran InBand Parameters */ 237#define E1000_KMRNCTRLSTA_DIAG_NELPBK 0x1000 /* Nearend Loopback mode */ |
| 238#define E1000_KMRNCTRLSTA_K1_CONFIG 0x7 239#define E1000_KMRNCTRLSTA_K1_ENABLE 0x0002 |
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| 223 224#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 225#define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY Special Control */ 226#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */ 227#define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control */ 228 229/* IFE PHY Extended Status Control */ 230#define IFE_PESC_POLARITY_REVERSED 0x0100 --- 17 unchanged lines hidden --- | 240 241#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10 242#define IFE_PHY_SPECIAL_CONTROL 0x11 /* 100BaseTx PHY Special Control */ 243#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */ 244#define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control */ 245 246/* IFE PHY Extended Status Control */ 247#define IFE_PESC_POLARITY_REVERSED 0x0100 --- 17 unchanged lines hidden --- |