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e1000_nvm.c (169589) e1000_nvm.c (173788)
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_nvm.c 169589 2007-05-16 00:14:23Z jfv $*/
33/* $FreeBSD: head/sys/dev/em/e1000_nvm.c 173788 2007-11-20 21:41:22Z jfv $ */
34
35
36#include "e1000_api.h"
37#include "e1000_nvm.h"
38
39/**
40 * e1000_raise_eec_clk - Raise EEPROM clock
41 * @hw: pointer to the HW structure
42 * @eecd: pointer to the EEPROM
43 *
44 * Enable/Raise the EEPROM clock bit.
45 **/
34
35
36#include "e1000_api.h"
37#include "e1000_nvm.h"
38
39/**
40 * e1000_raise_eec_clk - Raise EEPROM clock
41 * @hw: pointer to the HW structure
42 * @eecd: pointer to the EEPROM
43 *
44 * Enable/Raise the EEPROM clock bit.
45 **/
46static void
47e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
46static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
48{
49 *eecd = *eecd | E1000_EECD_SK;
50 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
51 E1000_WRITE_FLUSH(hw);
52 usec_delay(hw->nvm.delay_usec);
53}
54
55/**
56 * e1000_lower_eec_clk - Lower EEPROM clock
57 * @hw: pointer to the HW structure
58 * @eecd: pointer to the EEPROM
59 *
60 * Clear/Lower the EEPROM clock bit.
61 **/
47{
48 *eecd = *eecd | E1000_EECD_SK;
49 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
50 E1000_WRITE_FLUSH(hw);
51 usec_delay(hw->nvm.delay_usec);
52}
53
54/**
55 * e1000_lower_eec_clk - Lower EEPROM clock
56 * @hw: pointer to the HW structure
57 * @eecd: pointer to the EEPROM
58 *
59 * Clear/Lower the EEPROM clock bit.
60 **/
62static void
63e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
61static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
64{
65 *eecd = *eecd & ~E1000_EECD_SK;
66 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
67 E1000_WRITE_FLUSH(hw);
68 usec_delay(hw->nvm.delay_usec);
69}
70
71/**
72 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
73 * @hw: pointer to the HW structure
74 * @data: data to send to the EEPROM
75 * @count: number of bits to shift out
76 *
77 * We need to shift 'count' bits out to the EEPROM. So, the value in the
78 * "data" parameter will be shifted out to the EEPROM one bit at a time.
79 * In order to do this, "data" must be broken down into bits.
80 **/
62{
63 *eecd = *eecd & ~E1000_EECD_SK;
64 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
65 E1000_WRITE_FLUSH(hw);
66 usec_delay(hw->nvm.delay_usec);
67}
68
69/**
70 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
71 * @hw: pointer to the HW structure
72 * @data: data to send to the EEPROM
73 * @count: number of bits to shift out
74 *
75 * We need to shift 'count' bits out to the EEPROM. So, the value in the
76 * "data" parameter will be shifted out to the EEPROM one bit at a time.
77 * In order to do this, "data" must be broken down into bits.
78 **/
81static void
82e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
79static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
83{
84 struct e1000_nvm_info *nvm = &hw->nvm;
85 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
86 u32 mask;
87
88 DEBUGFUNC("e1000_shift_out_eec_bits");
89
90 mask = 0x01 << (count - 1);

--- 29 unchanged lines hidden (view full) ---

120 * @count: number of bits to shift in
121 *
122 * In order to read a register from the EEPROM, we need to shift 'count' bits
123 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
124 * the EEPROM (setting the SK bit), and then reading the value of the data out
125 * "DO" bit. During this "shifting in" process the data in "DI" bit should
126 * always be clear.
127 **/
80{
81 struct e1000_nvm_info *nvm = &hw->nvm;
82 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
83 u32 mask;
84
85 DEBUGFUNC("e1000_shift_out_eec_bits");
86
87 mask = 0x01 << (count - 1);

--- 29 unchanged lines hidden (view full) ---

117 * @count: number of bits to shift in
118 *
119 * In order to read a register from the EEPROM, we need to shift 'count' bits
120 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
121 * the EEPROM (setting the SK bit), and then reading the value of the data out
122 * "DO" bit. During this "shifting in" process the data in "DI" bit should
123 * always be clear.
124 **/
128static u16
129e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
125static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
130{
131 u32 eecd;
132 u32 i;
133 u16 data;
134
135 DEBUGFUNC("e1000_shift_in_eec_bits");
136
137 eecd = E1000_READ_REG(hw, E1000_EECD);

--- 20 unchanged lines hidden (view full) ---

158/**
159 * e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
160 * @hw: pointer to the HW structure
161 * @ee_reg: EEPROM flag for polling
162 *
163 * Polls the EEPROM status bit for either read or write completion based
164 * upon the value of 'ee_reg'.
165 **/
126{
127 u32 eecd;
128 u32 i;
129 u16 data;
130
131 DEBUGFUNC("e1000_shift_in_eec_bits");
132
133 eecd = E1000_READ_REG(hw, E1000_EECD);

--- 20 unchanged lines hidden (view full) ---

154/**
155 * e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
156 * @hw: pointer to the HW structure
157 * @ee_reg: EEPROM flag for polling
158 *
159 * Polls the EEPROM status bit for either read or write completion based
160 * upon the value of 'ee_reg'.
161 **/
166s32
167e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
162s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
168{
169 u32 attempts = 100000;
170 u32 i, reg = 0;
171 s32 ret_val = -E1000_ERR_NVM;
172
173 DEBUGFUNC("e1000_poll_eerd_eewr_done");
174
175 for (i = 0; i < attempts; i++) {

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192/**
193 * e1000_acquire_nvm_generic - Generic request for access to EEPROM
194 * @hw: pointer to the HW structure
195 *
196 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
197 * Return successful if access grant bit set, else clear the request for
198 * EEPROM access and return -E1000_ERR_NVM (-1).
199 **/
163{
164 u32 attempts = 100000;
165 u32 i, reg = 0;
166 s32 ret_val = -E1000_ERR_NVM;
167
168 DEBUGFUNC("e1000_poll_eerd_eewr_done");
169
170 for (i = 0; i < attempts; i++) {

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187/**
188 * e1000_acquire_nvm_generic - Generic request for access to EEPROM
189 * @hw: pointer to the HW structure
190 *
191 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
192 * Return successful if access grant bit set, else clear the request for
193 * EEPROM access and return -E1000_ERR_NVM (-1).
194 **/
200s32
201e1000_acquire_nvm_generic(struct e1000_hw *hw)
195s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
202{
203 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
204 s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
205 s32 ret_val = E1000_SUCCESS;
206
207 DEBUGFUNC("e1000_acquire_nvm_generic");
208
209 E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);

--- 18 unchanged lines hidden (view full) ---

228}
229
230/**
231 * e1000_standby_nvm - Return EEPROM to standby state
232 * @hw: pointer to the HW structure
233 *
234 * Return the EEPROM to a standby state.
235 **/
196{
197 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
198 s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
199 s32 ret_val = E1000_SUCCESS;
200
201 DEBUGFUNC("e1000_acquire_nvm_generic");
202
203 E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);

--- 18 unchanged lines hidden (view full) ---

222}
223
224/**
225 * e1000_standby_nvm - Return EEPROM to standby state
226 * @hw: pointer to the HW structure
227 *
228 * Return the EEPROM to a standby state.
229 **/
236static void
237e1000_standby_nvm(struct e1000_hw *hw)
230static void e1000_standby_nvm(struct e1000_hw *hw)
238{
239 struct e1000_nvm_info *nvm = &hw->nvm;
240 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
241
242 DEBUGFUNC("e1000_standby_nvm");
243
244 if (nvm->type == e1000_nvm_eeprom_microwire) {
245 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);

--- 24 unchanged lines hidden (view full) ---

270}
271
272/**
273 * e1000_stop_nvm - Terminate EEPROM command
274 * @hw: pointer to the HW structure
275 *
276 * Terminates the current command by inverting the EEPROM's chip select pin.
277 **/
231{
232 struct e1000_nvm_info *nvm = &hw->nvm;
233 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
234
235 DEBUGFUNC("e1000_standby_nvm");
236
237 if (nvm->type == e1000_nvm_eeprom_microwire) {
238 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);

--- 24 unchanged lines hidden (view full) ---

263}
264
265/**
266 * e1000_stop_nvm - Terminate EEPROM command
267 * @hw: pointer to the HW structure
268 *
269 * Terminates the current command by inverting the EEPROM's chip select pin.
270 **/
278void
279e1000_stop_nvm(struct e1000_hw *hw)
271void e1000_stop_nvm(struct e1000_hw *hw)
280{
281 u32 eecd;
282
283 DEBUGFUNC("e1000_stop_nvm");
284
285 eecd = E1000_READ_REG(hw, E1000_EECD);
286 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
287 /* Pull CS high */

--- 9 unchanged lines hidden (view full) ---

297}
298
299/**
300 * e1000_release_nvm_generic - Release exclusive access to EEPROM
301 * @hw: pointer to the HW structure
302 *
303 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
304 **/
272{
273 u32 eecd;
274
275 DEBUGFUNC("e1000_stop_nvm");
276
277 eecd = E1000_READ_REG(hw, E1000_EECD);
278 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
279 /* Pull CS high */

--- 9 unchanged lines hidden (view full) ---

289}
290
291/**
292 * e1000_release_nvm_generic - Release exclusive access to EEPROM
293 * @hw: pointer to the HW structure
294 *
295 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
296 **/
305void
306e1000_release_nvm_generic(struct e1000_hw *hw)
297void e1000_release_nvm_generic(struct e1000_hw *hw)
307{
308 u32 eecd;
309
310 DEBUGFUNC("e1000_release_nvm_generic");
311
312 e1000_stop_nvm(hw);
313
314 eecd = E1000_READ_REG(hw, E1000_EECD);
315 eecd &= ~E1000_EECD_REQ;
316 E1000_WRITE_REG(hw, E1000_EECD, eecd);
317}
318
319/**
320 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
321 * @hw: pointer to the HW structure
322 *
323 * Setups the EEPROM for reading and writing.
324 **/
298{
299 u32 eecd;
300
301 DEBUGFUNC("e1000_release_nvm_generic");
302
303 e1000_stop_nvm(hw);
304
305 eecd = E1000_READ_REG(hw, E1000_EECD);
306 eecd &= ~E1000_EECD_REQ;
307 E1000_WRITE_REG(hw, E1000_EECD, eecd);
308}
309
310/**
311 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
312 * @hw: pointer to the HW structure
313 *
314 * Setups the EEPROM for reading and writing.
315 **/
325static s32
326e1000_ready_nvm_eeprom(struct e1000_hw *hw)
316static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
327{
328 struct e1000_nvm_info *nvm = &hw->nvm;
329 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
330 s32 ret_val = E1000_SUCCESS;
331 u16 timeout = 0;
332 u8 spi_stat_reg;
333
334 DEBUGFUNC("e1000_ready_nvm_eeprom");

--- 7 unchanged lines hidden (view full) ---

342 E1000_WRITE_REG(hw, E1000_EECD, eecd);
343 } else if (nvm->type == e1000_nvm_eeprom_spi) {
344 /* Clear SK and CS */
345 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
346 E1000_WRITE_REG(hw, E1000_EECD, eecd);
347 usec_delay(1);
348 timeout = NVM_MAX_RETRY_SPI;
349
317{
318 struct e1000_nvm_info *nvm = &hw->nvm;
319 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
320 s32 ret_val = E1000_SUCCESS;
321 u16 timeout = 0;
322 u8 spi_stat_reg;
323
324 DEBUGFUNC("e1000_ready_nvm_eeprom");

--- 7 unchanged lines hidden (view full) ---

332 E1000_WRITE_REG(hw, E1000_EECD, eecd);
333 } else if (nvm->type == e1000_nvm_eeprom_spi) {
334 /* Clear SK and CS */
335 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
336 E1000_WRITE_REG(hw, E1000_EECD, eecd);
337 usec_delay(1);
338 timeout = NVM_MAX_RETRY_SPI;
339
350 /* Read "Status Register" repeatedly until the LSB is cleared.
340 /*
341 * Read "Status Register" repeatedly until the LSB is cleared.
351 * The EEPROM will signal that the command has been completed
352 * by clearing bit 0 of the internal status register. If it's
342 * The EEPROM will signal that the command has been completed
343 * by clearing bit 0 of the internal status register. If it's
353 * not cleared within 'timeout', then error out. */
344 * not cleared within 'timeout', then error out.
345 */
354 while (timeout) {
355 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
356 hw->nvm.opcode_bits);
357 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
358 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
359 break;
360
361 usec_delay(5);

--- 16 unchanged lines hidden (view full) ---

378 * e1000_read_nvm_spi - Read EEPROM's using SPI
379 * @hw: pointer to the HW structure
380 * @offset: offset of word in the EEPROM to read
381 * @words: number of words to read
382 * @data: word read from the EEPROM
383 *
384 * Reads a 16 bit word from the EEPROM.
385 **/
346 while (timeout) {
347 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
348 hw->nvm.opcode_bits);
349 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
350 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
351 break;
352
353 usec_delay(5);

--- 16 unchanged lines hidden (view full) ---

370 * e1000_read_nvm_spi - Read EEPROM's using SPI
371 * @hw: pointer to the HW structure
372 * @offset: offset of word in the EEPROM to read
373 * @words: number of words to read
374 * @data: word read from the EEPROM
375 *
376 * Reads a 16 bit word from the EEPROM.
377 **/
386s32
387e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
378s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
388{
389 struct e1000_nvm_info *nvm = &hw->nvm;
390 u32 i = 0;
391 s32 ret_val;
392 u16 word_in;
393 u8 read_opcode = NVM_READ_OPCODE_SPI;
394
395 DEBUGFUNC("e1000_read_nvm_spi");
396
379{
380 struct e1000_nvm_info *nvm = &hw->nvm;
381 u32 i = 0;
382 s32 ret_val;
383 u16 word_in;
384 u8 read_opcode = NVM_READ_OPCODE_SPI;
385
386 DEBUGFUNC("e1000_read_nvm_spi");
387
397 /* A check for invalid values: offset too large, too many words,
398 * and not enough words. */
388 /*
389 * A check for invalid values: offset too large, too many words,
390 * and not enough words.
391 */
399 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
400 (words == 0)) {
401 DEBUGOUT("nvm parameter(s) out of bounds\n");
402 ret_val = -E1000_ERR_NVM;
403 goto out;
404 }
405
406 ret_val = e1000_acquire_nvm(hw);

--- 8 unchanged lines hidden (view full) ---

415
416 if ((nvm->address_bits == 8) && (offset >= 128))
417 read_opcode |= NVM_A8_OPCODE_SPI;
418
419 /* Send the READ command (opcode + addr) */
420 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
421 e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
422
392 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
393 (words == 0)) {
394 DEBUGOUT("nvm parameter(s) out of bounds\n");
395 ret_val = -E1000_ERR_NVM;
396 goto out;
397 }
398
399 ret_val = e1000_acquire_nvm(hw);

--- 8 unchanged lines hidden (view full) ---

408
409 if ((nvm->address_bits == 8) && (offset >= 128))
410 read_opcode |= NVM_A8_OPCODE_SPI;
411
412 /* Send the READ command (opcode + addr) */
413 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
414 e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
415
423 /* Read the data. SPI NVMs increment the address with each byte
416 /*
417 * Read the data. SPI NVMs increment the address with each byte
424 * read and will roll over if reading beyond the end. This allows
418 * read and will roll over if reading beyond the end. This allows
425 * us to read the whole NVM from any offset */
419 * us to read the whole NVM from any offset
420 */
426 for (i = 0; i < words; i++) {
427 word_in = e1000_shift_in_eec_bits(hw, 16);
428 data[i] = (word_in >> 8) | (word_in << 8);
429 }
430
431release:
432 e1000_release_nvm(hw);
433

--- 5 unchanged lines hidden (view full) ---

439 * e1000_read_nvm_microwire - Reads EEPROM's using microwire
440 * @hw: pointer to the HW structure
441 * @offset: offset of word in the EEPROM to read
442 * @words: number of words to read
443 * @data: word read from the EEPROM
444 *
445 * Reads a 16 bit word from the EEPROM.
446 **/
421 for (i = 0; i < words; i++) {
422 word_in = e1000_shift_in_eec_bits(hw, 16);
423 data[i] = (word_in >> 8) | (word_in << 8);
424 }
425
426release:
427 e1000_release_nvm(hw);
428

--- 5 unchanged lines hidden (view full) ---

434 * e1000_read_nvm_microwire - Reads EEPROM's using microwire
435 * @hw: pointer to the HW structure
436 * @offset: offset of word in the EEPROM to read
437 * @words: number of words to read
438 * @data: word read from the EEPROM
439 *
440 * Reads a 16 bit word from the EEPROM.
441 **/
447s32
448e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
442s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
443 u16 *data)
449{
450 struct e1000_nvm_info *nvm = &hw->nvm;
451 u32 i = 0;
452 s32 ret_val;
453 u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
454
455 DEBUGFUNC("e1000_read_nvm_microwire");
456
444{
445 struct e1000_nvm_info *nvm = &hw->nvm;
446 u32 i = 0;
447 s32 ret_val;
448 u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
449
450 DEBUGFUNC("e1000_read_nvm_microwire");
451
457 /* A check for invalid values: offset too large, too many words,
458 * and not enough words. */
452 /*
453 * A check for invalid values: offset too large, too many words,
454 * and not enough words.
455 */
459 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
460 (words == 0)) {
461 DEBUGOUT("nvm parameter(s) out of bounds\n");
462 ret_val = -E1000_ERR_NVM;
463 goto out;
464 }
465
466 ret_val = e1000_acquire_nvm(hw);

--- 5 unchanged lines hidden (view full) ---

472 goto release;
473
474 for (i = 0; i < words; i++) {
475 /* Send the READ command (opcode + addr) */
476 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
477 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
478 nvm->address_bits);
479
456 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
457 (words == 0)) {
458 DEBUGOUT("nvm parameter(s) out of bounds\n");
459 ret_val = -E1000_ERR_NVM;
460 goto out;
461 }
462
463 ret_val = e1000_acquire_nvm(hw);

--- 5 unchanged lines hidden (view full) ---

469 goto release;
470
471 for (i = 0; i < words; i++) {
472 /* Send the READ command (opcode + addr) */
473 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
474 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
475 nvm->address_bits);
476
480 /* Read the data. For microwire, each word requires the
481 * overhead of setup and tear-down. */
477 /*
478 * Read the data. For microwire, each word requires the
479 * overhead of setup and tear-down.
480 */
482 data[i] = e1000_shift_in_eec_bits(hw, 16);
483 e1000_standby_nvm(hw);
484 }
485
486release:
487 e1000_release_nvm(hw);
488
489out:

--- 4 unchanged lines hidden (view full) ---

494 * e1000_read_nvm_eerd - Reads EEPROM using EERD register
495 * @hw: pointer to the HW structure
496 * @offset: offset of word in the EEPROM to read
497 * @words: number of words to read
498 * @data: word read from the EEPROM
499 *
500 * Reads a 16 bit word from the EEPROM using the EERD register.
501 **/
481 data[i] = e1000_shift_in_eec_bits(hw, 16);
482 e1000_standby_nvm(hw);
483 }
484
485release:
486 e1000_release_nvm(hw);
487
488out:

--- 4 unchanged lines hidden (view full) ---

493 * e1000_read_nvm_eerd - Reads EEPROM using EERD register
494 * @hw: pointer to the HW structure
495 * @offset: offset of word in the EEPROM to read
496 * @words: number of words to read
497 * @data: word read from the EEPROM
498 *
499 * Reads a 16 bit word from the EEPROM using the EERD register.
500 **/
502s32
503e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
501s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
504{
505 struct e1000_nvm_info *nvm = &hw->nvm;
506 u32 i, eerd = 0;
507 s32 ret_val = E1000_SUCCESS;
508
509 DEBUGFUNC("e1000_read_nvm_eerd");
510
502{
503 struct e1000_nvm_info *nvm = &hw->nvm;
504 u32 i, eerd = 0;
505 s32 ret_val = E1000_SUCCESS;
506
507 DEBUGFUNC("e1000_read_nvm_eerd");
508
511 /* A check for invalid values: offset too large, too many words,
512 * and not enough words. */
509 /*
510 * A check for invalid values: offset too large, too many words,
511 * too many words for the offset, and not enough words.
512 */
513 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
514 (words == 0)) {
515 DEBUGOUT("nvm parameter(s) out of bounds\n");
516 ret_val = -E1000_ERR_NVM;
517 goto out;
518 }
519
520 for (i = 0; i < words; i++) {
521 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
522 E1000_NVM_RW_REG_START;
523
524 E1000_WRITE_REG(hw, E1000_EERD, eerd);
525 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
526 if (ret_val)
527 break;
528
513 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
514 (words == 0)) {
515 DEBUGOUT("nvm parameter(s) out of bounds\n");
516 ret_val = -E1000_ERR_NVM;
517 goto out;
518 }
519
520 for (i = 0; i < words; i++) {
521 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
522 E1000_NVM_RW_REG_START;
523
524 E1000_WRITE_REG(hw, E1000_EERD, eerd);
525 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
526 if (ret_val)
527 break;
528
529 data[i] = (E1000_READ_REG(hw, E1000_EERD) >> E1000_NVM_RW_REG_DATA);
529 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
530 E1000_NVM_RW_REG_DATA);
530 }
531
532out:
533 return ret_val;
534}
535
536/**
537 * e1000_write_nvm_spi - Write to EEPROM using SPI
538 * @hw: pointer to the HW structure
539 * @offset: offset within the EEPROM to be written to
540 * @words: number of words to write
541 * @data: 16 bit word(s) to be written to the EEPROM
542 *
543 * Writes data to EEPROM at offset using SPI interface.
544 *
545 * If e1000_update_nvm_checksum is not called after this function , the
546 * EEPROM will most likley contain an invalid checksum.
547 **/
531 }
532
533out:
534 return ret_val;
535}
536
537/**
538 * e1000_write_nvm_spi - Write to EEPROM using SPI
539 * @hw: pointer to the HW structure
540 * @offset: offset within the EEPROM to be written to
541 * @words: number of words to write
542 * @data: 16 bit word(s) to be written to the EEPROM
543 *
544 * Writes data to EEPROM at offset using SPI interface.
545 *
546 * If e1000_update_nvm_checksum is not called after this function , the
547 * EEPROM will most likley contain an invalid checksum.
548 **/
548s32
549e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
549s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
550{
551 struct e1000_nvm_info *nvm = &hw->nvm;
552 s32 ret_val;
553 u16 widx = 0;
554
555 DEBUGFUNC("e1000_write_nvm_spi");
556
550{
551 struct e1000_nvm_info *nvm = &hw->nvm;
552 s32 ret_val;
553 u16 widx = 0;
554
555 DEBUGFUNC("e1000_write_nvm_spi");
556
557 /* A check for invalid values: offset too large, too many words,
558 * and not enough words. */
557 /*
558 * A check for invalid values: offset too large, too many words,
559 * and not enough words.
560 */
559 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
560 (words == 0)) {
561 DEBUGOUT("nvm parameter(s) out of bounds\n");
562 ret_val = -E1000_ERR_NVM;
563 goto out;
564 }
565
566 ret_val = e1000_acquire_nvm(hw);

--- 12 unchanged lines hidden (view full) ---

579 e1000_standby_nvm(hw);
580
581 /* Send the WRITE ENABLE command (8 bit opcode) */
582 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
583 nvm->opcode_bits);
584
585 e1000_standby_nvm(hw);
586
561 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
562 (words == 0)) {
563 DEBUGOUT("nvm parameter(s) out of bounds\n");
564 ret_val = -E1000_ERR_NVM;
565 goto out;
566 }
567
568 ret_val = e1000_acquire_nvm(hw);

--- 12 unchanged lines hidden (view full) ---

581 e1000_standby_nvm(hw);
582
583 /* Send the WRITE ENABLE command (8 bit opcode) */
584 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
585 nvm->opcode_bits);
586
587 e1000_standby_nvm(hw);
588
587 /* Some SPI eeproms use the 8th address bit embedded in the
588 * opcode */
589 /*
590 * Some SPI eeproms use the 8th address bit embedded in the
591 * opcode
592 */
589 if ((nvm->address_bits == 8) && (offset >= 128))
590 write_opcode |= NVM_A8_OPCODE_SPI;
591
592 /* Send the Write command (8-bit opcode + addr) */
593 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
594 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
595 nvm->address_bits);
596

--- 26 unchanged lines hidden (view full) ---

623 * @words: number of words to write
624 * @data: 16 bit word(s) to be written to the EEPROM
625 *
626 * Writes data to EEPROM at offset using microwire interface.
627 *
628 * If e1000_update_nvm_checksum is not called after this function , the
629 * EEPROM will most likley contain an invalid checksum.
630 **/
593 if ((nvm->address_bits == 8) && (offset >= 128))
594 write_opcode |= NVM_A8_OPCODE_SPI;
595
596 /* Send the Write command (8-bit opcode + addr) */
597 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
598 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
599 nvm->address_bits);
600

--- 26 unchanged lines hidden (view full) ---

627 * @words: number of words to write
628 * @data: 16 bit word(s) to be written to the EEPROM
629 *
630 * Writes data to EEPROM at offset using microwire interface.
631 *
632 * If e1000_update_nvm_checksum is not called after this function , the
633 * EEPROM will most likley contain an invalid checksum.
634 **/
631s32
632e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
635s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
636 u16 *data)
633{
634 struct e1000_nvm_info *nvm = &hw->nvm;
635 s32 ret_val;
636 u32 eecd;
637 u16 words_written = 0;
638 u16 widx = 0;
639
640 DEBUGFUNC("e1000_write_nvm_microwire");
641
637{
638 struct e1000_nvm_info *nvm = &hw->nvm;
639 s32 ret_val;
640 u32 eecd;
641 u16 words_written = 0;
642 u16 widx = 0;
643
644 DEBUGFUNC("e1000_write_nvm_microwire");
645
642 /* A check for invalid values: offset too large, too many words,
643 * and not enough words. */
646 /*
647 * A check for invalid values: offset too large, too many words,
648 * and not enough words.
649 */
644 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
645 (words == 0)) {
646 DEBUGOUT("nvm parameter(s) out of bounds\n");
647 ret_val = -E1000_ERR_NVM;
648 goto out;
649 }
650
651 ret_val = e1000_acquire_nvm(hw);

--- 48 unchanged lines hidden (view full) ---

700release:
701 e1000_release_nvm(hw);
702
703out:
704 return ret_val;
705}
706
707/**
650 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
651 (words == 0)) {
652 DEBUGOUT("nvm parameter(s) out of bounds\n");
653 ret_val = -E1000_ERR_NVM;
654 goto out;
655 }
656
657 ret_val = e1000_acquire_nvm(hw);

--- 48 unchanged lines hidden (view full) ---

706release:
707 e1000_release_nvm(hw);
708
709out:
710 return ret_val;
711}
712
713/**
708 * e1000_read_part_num_generic - Read device part number
714 * e1000_read_pba_num_generic - Read device part number
709 * @hw: pointer to the HW structure
715 * @hw: pointer to the HW structure
710 * @part_num: pointer to device part number
716 * @pba_num: pointer to device part number
711 *
712 * Reads the product board assembly (PBA) number from the EEPROM and stores
717 *
718 * Reads the product board assembly (PBA) number from the EEPROM and stores
713 * the value in part_num.
719 * the value in pba_num.
714 **/
720 **/
715s32
716e1000_read_part_num_generic(struct e1000_hw *hw, u32 *part_num)
721s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
717{
718 s32 ret_val;
719 u16 nvm_data;
720
722{
723 s32 ret_val;
724 u16 nvm_data;
725
721 DEBUGFUNC("e1000_read_part_num_generic");
726 DEBUGFUNC("e1000_read_pba_num_generic");
722
723 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
724 if (ret_val) {
725 DEBUGOUT("NVM Read Error\n");
726 goto out;
727 }
727
728 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
729 if (ret_val) {
730 DEBUGOUT("NVM Read Error\n");
731 goto out;
732 }
728 *part_num = (u32)(nvm_data << 16);
733 *pba_num = (u32)(nvm_data << 16);
729
730 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
731 if (ret_val) {
732 DEBUGOUT("NVM Read Error\n");
733 goto out;
734 }
734
735 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
736 if (ret_val) {
737 DEBUGOUT("NVM Read Error\n");
738 goto out;
739 }
735 *part_num |= nvm_data;
740 *pba_num |= nvm_data;
736
737out:
738 return ret_val;
739}
740
741/**
742 * e1000_read_mac_addr_generic - Read device MAC address
743 * @hw: pointer to the HW structure
744 *
745 * Reads the device MAC address from the EEPROM and stores the value.
746 * Since devices with two ports use the same EEPROM, we increment the
747 * last bit in the MAC address for the second port.
748 **/
741
742out:
743 return ret_val;
744}
745
746/**
747 * e1000_read_mac_addr_generic - Read device MAC address
748 * @hw: pointer to the HW structure
749 *
750 * Reads the device MAC address from the EEPROM and stores the value.
751 * Since devices with two ports use the same EEPROM, we increment the
752 * last bit in the MAC address for the second port.
753 **/
749s32
750e1000_read_mac_addr_generic(struct e1000_hw *hw)
754s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
751{
752 s32 ret_val = E1000_SUCCESS;
753 u16 offset, nvm_data, i;
754
755 DEBUGFUNC("e1000_read_mac_addr");
756
757 for (i = 0; i < ETH_ADDR_LEN; i += 2) {
758 offset = i >> 1;

--- 19 unchanged lines hidden (view full) ---

778
779/**
780 * e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
781 * @hw: pointer to the HW structure
782 *
783 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
784 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
785 **/
755{
756 s32 ret_val = E1000_SUCCESS;
757 u16 offset, nvm_data, i;
758
759 DEBUGFUNC("e1000_read_mac_addr");
760
761 for (i = 0; i < ETH_ADDR_LEN; i += 2) {
762 offset = i >> 1;

--- 19 unchanged lines hidden (view full) ---

782
783/**
784 * e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
785 * @hw: pointer to the HW structure
786 *
787 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
788 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
789 **/
786s32
787e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
790s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
788{
789 s32 ret_val = E1000_SUCCESS;
790 u16 checksum = 0;
791 u16 i, nvm_data;
792
793 DEBUGFUNC("e1000_validate_nvm_checksum_generic");
794
795 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {

--- 18 unchanged lines hidden (view full) ---

814/**
815 * e1000_update_nvm_checksum_generic - Update EEPROM checksum
816 * @hw: pointer to the HW structure
817 *
818 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
819 * up to the checksum. Then calculates the EEPROM checksum and writes the
820 * value to the EEPROM.
821 **/
791{
792 s32 ret_val = E1000_SUCCESS;
793 u16 checksum = 0;
794 u16 i, nvm_data;
795
796 DEBUGFUNC("e1000_validate_nvm_checksum_generic");
797
798 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {

--- 18 unchanged lines hidden (view full) ---

817/**
818 * e1000_update_nvm_checksum_generic - Update EEPROM checksum
819 * @hw: pointer to the HW structure
820 *
821 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
822 * up to the checksum. Then calculates the EEPROM checksum and writes the
823 * value to the EEPROM.
824 **/
822s32
823e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
825s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
824{
825 s32 ret_val;
826 u16 checksum = 0;
827 u16 i, nvm_data;
828
829 DEBUGFUNC("e1000_update_nvm_checksum");
830
831 for (i = 0; i < NVM_CHECKSUM_REG; i++) {

--- 16 unchanged lines hidden (view full) ---

848
849/**
850 * e1000_reload_nvm_generic - Reloads EEPROM
851 * @hw: pointer to the HW structure
852 *
853 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
854 * extended control register.
855 **/
826{
827 s32 ret_val;
828 u16 checksum = 0;
829 u16 i, nvm_data;
830
831 DEBUGFUNC("e1000_update_nvm_checksum");
832
833 for (i = 0; i < NVM_CHECKSUM_REG; i++) {

--- 16 unchanged lines hidden (view full) ---

850
851/**
852 * e1000_reload_nvm_generic - Reloads EEPROM
853 * @hw: pointer to the HW structure
854 *
855 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
856 * extended control register.
857 **/
856void
857e1000_reload_nvm_generic(struct e1000_hw *hw)
858void e1000_reload_nvm_generic(struct e1000_hw *hw)
858{
859 u32 ctrl_ext;
860
861 DEBUGFUNC("e1000_reload_nvm_generic");
862
863 usec_delay(10);
864 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
865 ctrl_ext |= E1000_CTRL_EXT_EE_RST;

--- 5 unchanged lines hidden (view full) ---

871
872/**
873 * e1000_acquire_nvm - Acquire exclusive access to EEPROM
874 * @hw: pointer to the HW structure
875 *
876 * For those silicon families which have implemented a NVM acquire function,
877 * run the defined function else return success.
878 **/
859{
860 u32 ctrl_ext;
861
862 DEBUGFUNC("e1000_reload_nvm_generic");
863
864 usec_delay(10);
865 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
866 ctrl_ext |= E1000_CTRL_EXT_EE_RST;

--- 5 unchanged lines hidden (view full) ---

872
873/**
874 * e1000_acquire_nvm - Acquire exclusive access to EEPROM
875 * @hw: pointer to the HW structure
876 *
877 * For those silicon families which have implemented a NVM acquire function,
878 * run the defined function else return success.
879 **/
879s32
880e1000_acquire_nvm(struct e1000_hw *hw)
880s32 e1000_acquire_nvm(struct e1000_hw *hw)
881{
881{
882 if (hw->func.acquire_nvm != NULL)
882 if (hw->func.acquire_nvm)
883 return hw->func.acquire_nvm(hw);
883 return hw->func.acquire_nvm(hw);
884 else
885 return E1000_SUCCESS;
884
885 return E1000_SUCCESS;
886}
887
888/**
889 * e1000_release_nvm - Release exclusive access to EEPROM
890 * @hw: pointer to the HW structure
891 *
892 * For those silicon families which have implemented a NVM release function,
893 * run the defined fucntion else return success.
894 **/
886}
887
888/**
889 * e1000_release_nvm - Release exclusive access to EEPROM
890 * @hw: pointer to the HW structure
891 *
892 * For those silicon families which have implemented a NVM release function,
893 * run the defined fucntion else return success.
894 **/
895void
896e1000_release_nvm(struct e1000_hw *hw)
895void e1000_release_nvm(struct e1000_hw *hw)
897{
896{
898 if (hw->func.release_nvm != NULL)
897 if (hw->func.release_nvm)
899 hw->func.release_nvm(hw);
900}
901
898 hw->func.release_nvm(hw);
899}
900