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e1000_mac.c (169248) e1000_mac.c (169589)
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_mac.c 169589 2007-05-16 00:14:23Z jfv $*/
33
34
34#include <sys/cdefs.h>
35__FBSDID("$FreeBSD: head/sys/dev/em/e1000_mac.c 169248 2007-05-04 13:30:44Z rwatson $");
36
35
37
36#include "e1000_api.h"
38#include "e1000_mac.h"
39
40/**
41 * e1000_remove_device_generic - Free device specific structure
37#include "e1000_mac.h"
38
39/**
40 * e1000_remove_device_generic - Free device specific structure
42 * @hw - pointer to the HW structure
41 * @hw: pointer to the HW structure
43 *
44 * If a device specific structure was allocated, this function will
45 * free it.
46 **/
47void
48e1000_remove_device_generic(struct e1000_hw *hw)
49{
50 DEBUGFUNC("e1000_remove_device_generic");
51
52 /* Freeing the dev_spec member of e1000_hw structure */
53 e1000_free_dev_spec_struct(hw);
54}
55
56/**
57 * e1000_get_bus_info_pci_generic - Get PCI(x) bus information
42 *
43 * If a device specific structure was allocated, this function will
44 * free it.
45 **/
46void
47e1000_remove_device_generic(struct e1000_hw *hw)
48{
49 DEBUGFUNC("e1000_remove_device_generic");
50
51 /* Freeing the dev_spec member of e1000_hw structure */
52 e1000_free_dev_spec_struct(hw);
53}
54
55/**
56 * e1000_get_bus_info_pci_generic - Get PCI(x) bus information
58 * @hw - pointer to the HW structure
57 * @hw: pointer to the HW structure
59 *
60 * Determines and stores the system bus information for a particular
61 * network interface. The following bus information is determined and stored:
62 * bus speed, bus width, type (PCI/PCIx), and PCI(-x) function.
63 **/
64s32
65e1000_get_bus_info_pci_generic(struct e1000_hw *hw)
66{

--- 44 unchanged lines hidden (view full) ---

111 else
112 bus->func = 0;
113
114 return ret_val;
115}
116
117/**
118 * e1000_get_bus_info_pcie_generic - Get PCIe bus information
58 *
59 * Determines and stores the system bus information for a particular
60 * network interface. The following bus information is determined and stored:
61 * bus speed, bus width, type (PCI/PCIx), and PCI(-x) function.
62 **/
63s32
64e1000_get_bus_info_pci_generic(struct e1000_hw *hw)
65{

--- 44 unchanged lines hidden (view full) ---

110 else
111 bus->func = 0;
112
113 return ret_val;
114}
115
116/**
117 * e1000_get_bus_info_pcie_generic - Get PCIe bus information
119 * @hw - pointer to the HW structure
118 * @hw: pointer to the HW structure
120 *
121 * Determines and stores the system bus information for a particular
122 * network interface. The following bus information is determined and stored:
123 * bus speed, bus width, type (PCIe), and PCIe function.
124 **/
125s32
126e1000_get_bus_info_pcie_generic(struct e1000_hw *hw)
127{

--- 25 unchanged lines hidden (view full) ---

153 } else
154 bus->func = 0;
155
156 return E1000_SUCCESS;
157}
158
159/**
160 * e1000_clear_vfta_generic - Clear VLAN filter table
119 *
120 * Determines and stores the system bus information for a particular
121 * network interface. The following bus information is determined and stored:
122 * bus speed, bus width, type (PCIe), and PCIe function.
123 **/
124s32
125e1000_get_bus_info_pcie_generic(struct e1000_hw *hw)
126{

--- 25 unchanged lines hidden (view full) ---

152 } else
153 bus->func = 0;
154
155 return E1000_SUCCESS;
156}
157
158/**
159 * e1000_clear_vfta_generic - Clear VLAN filter table
161 * @hw - pointer to the HW structure
160 * @hw: pointer to the HW structure
162 *
163 * Clears the register array which contains the VLAN filter table by
164 * setting all the values to 0.
165 **/
166void
167e1000_clear_vfta_generic(struct e1000_hw *hw)
168{
169 u32 offset;
170
171 DEBUGFUNC("e1000_clear_vfta_generic");
172
173 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
174 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
175 E1000_WRITE_FLUSH(hw);
176 }
177}
178
179/**
180 * e1000_write_vfta_generic - Write value to VLAN filter table
161 *
162 * Clears the register array which contains the VLAN filter table by
163 * setting all the values to 0.
164 **/
165void
166e1000_clear_vfta_generic(struct e1000_hw *hw)
167{
168 u32 offset;
169
170 DEBUGFUNC("e1000_clear_vfta_generic");
171
172 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
173 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
174 E1000_WRITE_FLUSH(hw);
175 }
176}
177
178/**
179 * e1000_write_vfta_generic - Write value to VLAN filter table
181 * @hw - pointer to the HW structure
182 * @offset - register offset in VLAN filter table
183 * @value - register value written to VLAN filter table
180 * @hw: pointer to the HW structure
181 * @offset: register offset in VLAN filter table
182 * @value: register value written to VLAN filter table
184 *
185 * Writes value at the given offset in the register array which stores
186 * the VLAN filter table.
187 **/
188void
189e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
190{
191 DEBUGFUNC("e1000_write_vfta_generic");
192
193 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
194 E1000_WRITE_FLUSH(hw);
195}
196
197/**
198 * e1000_init_rx_addrs_generic - Initialize receive address's
183 *
184 * Writes value at the given offset in the register array which stores
185 * the VLAN filter table.
186 **/
187void
188e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
189{
190 DEBUGFUNC("e1000_write_vfta_generic");
191
192 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
193 E1000_WRITE_FLUSH(hw);
194}
195
196/**
197 * e1000_init_rx_addrs_generic - Initialize receive address's
199 * @hw - pointer to the HW structure
200 * @rar_count - receive address registers
198 * @hw: pointer to the HW structure
199 * @rar_count: receive address registers
201 *
202 * Setups the receive address registers by setting the base receive address
203 * register to the devices MAC address and clearing all the other receive
204 * address registers to 0.
205 **/
206void
207e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)
208{

--- 13 unchanged lines hidden (view full) ---

222 E1000_WRITE_FLUSH(hw);
223 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((i << 1) + 1), 0);
224 E1000_WRITE_FLUSH(hw);
225 }
226}
227
228/**
229 * e1000_rar_set_generic - Set receive address register
200 *
201 * Setups the receive address registers by setting the base receive address
202 * register to the devices MAC address and clearing all the other receive
203 * address registers to 0.
204 **/
205void
206e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)
207{

--- 13 unchanged lines hidden (view full) ---

221 E1000_WRITE_FLUSH(hw);
222 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((i << 1) + 1), 0);
223 E1000_WRITE_FLUSH(hw);
224 }
225}
226
227/**
228 * e1000_rar_set_generic - Set receive address register
230 * @hw - pointer to the HW structure
231 * @addr - pointer to the receive address
232 * @index - receive address array register
229 * @hw: pointer to the HW structure
230 * @addr: pointer to the receive address
231 * @index: receive address array register
233 *
234 * Sets the receive address array register at index to the address passed
235 * in by addr.
236 **/
237void
238e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
239{
240 u32 rar_low, rar_high;

--- 13 unchanged lines hidden (view full) ---

254 rar_high |= E1000_RAH_AV;
255
256 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low);
257 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);
258}
259
260/**
261 * e1000_mta_set_generic - Set multicast filter table address
232 *
233 * Sets the receive address array register at index to the address passed
234 * in by addr.
235 **/
236void
237e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
238{
239 u32 rar_low, rar_high;

--- 13 unchanged lines hidden (view full) ---

253 rar_high |= E1000_RAH_AV;
254
255 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low);
256 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);
257}
258
259/**
260 * e1000_mta_set_generic - Set multicast filter table address
262 * @hw - pointer to the HW structure
263 * @hash_value - determines the MTA register and bit to set
261 * @hw: pointer to the HW structure
262 * @hash_value: determines the MTA register and bit to set
264 *
265 * The multicast table address is a register array of 32-bit registers.
266 * The hash_value is used to determine what register the bit is in, the
267 * current value is read, the new bit is OR'd in and the new value is
268 * written back into the register.
269 **/
270void
271e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value)

--- 18 unchanged lines hidden (view full) ---

290 mta |= (1 << hash_bit);
291
292 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
293 E1000_WRITE_FLUSH(hw);
294}
295
296/**
297 * e1000_mc_addr_list_update_generic - Update Multicast addresses
263 *
264 * The multicast table address is a register array of 32-bit registers.
265 * The hash_value is used to determine what register the bit is in, the
266 * current value is read, the new bit is OR'd in and the new value is
267 * written back into the register.
268 **/
269void
270e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value)

--- 18 unchanged lines hidden (view full) ---

289 mta |= (1 << hash_bit);
290
291 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
292 E1000_WRITE_FLUSH(hw);
293}
294
295/**
296 * e1000_mc_addr_list_update_generic - Update Multicast addresses
298 * @hw - pointer to the HW structure
299 * @mc_addr_list - array of multicast addresses to program
300 * @mc_addr_count - number of multicast addresses to program
301 * @rar_used_count - the first RAR register free to program
302 * @rar_count - total number of supported Receive Address Registers
297 * @hw: pointer to the HW structure
298 * @mc_addr_list: array of multicast addresses to program
299 * @mc_addr_count: number of multicast addresses to program
300 * @rar_used_count: the first RAR register free to program
301 * @rar_count: total number of supported Receive Address Registers
303 *
304 * Updates the Receive Address Registers and Multicast Table Array.
305 * The caller must have a packed mc_addr_list of multicast addresses.
306 * The parameter rar_count will usually be hw->mac.rar_entry_count
307 * unless there are workarounds that change this.
308 **/
309void
310e1000_mc_addr_list_update_generic(struct e1000_hw *hw,

--- 35 unchanged lines hidden (view full) ---

346 DEBUGOUT1("Hash value = 0x%03X\n", hash_value);
347 e1000_mta_set(hw, hash_value);
348 mc_addr_list += ETH_ADDR_LEN;
349 }
350}
351
352/**
353 * e1000_hash_mc_addr_generic - Generate a multicast hash value
302 *
303 * Updates the Receive Address Registers and Multicast Table Array.
304 * The caller must have a packed mc_addr_list of multicast addresses.
305 * The parameter rar_count will usually be hw->mac.rar_entry_count
306 * unless there are workarounds that change this.
307 **/
308void
309e1000_mc_addr_list_update_generic(struct e1000_hw *hw,

--- 35 unchanged lines hidden (view full) ---

345 DEBUGOUT1("Hash value = 0x%03X\n", hash_value);
346 e1000_mta_set(hw, hash_value);
347 mc_addr_list += ETH_ADDR_LEN;
348 }
349}
350
351/**
352 * e1000_hash_mc_addr_generic - Generate a multicast hash value
354 * @hw - pointer to the HW structure
355 * @mc_addr - pointer to a multicast address
353 * @hw: pointer to the HW structure
354 * @mc_addr: pointer to a multicast address
356 *
357 * Generates a multicast address hash value which is used to determine
358 * the multicast filter table array address and new table value. See
359 * e1000_mta_set_generic()
360 **/
361u32
362e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
363{

--- 53 unchanged lines hidden (view full) ---

417 hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
418 (((u16) mc_addr[5]) << bit_shift)));
419
420 return hash_value;
421}
422
423/**
424 * e1000_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value
355 *
356 * Generates a multicast address hash value which is used to determine
357 * the multicast filter table array address and new table value. See
358 * e1000_mta_set_generic()
359 **/
360u32
361e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
362{

--- 53 unchanged lines hidden (view full) ---

416 hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
417 (((u16) mc_addr[5]) << bit_shift)));
418
419 return hash_value;
420}
421
422/**
423 * e1000_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value
425 * @hw - pointer to the HW structure
424 * @hw: pointer to the HW structure
426 *
427 * In certain situations, a system BIOS may report that the PCIx maximum
428 * memory read byte count (MMRBC) value is higher than than the actual
429 * value. We check the PCIx command regsiter with the current PCIx status
430 * regsiter.
431 **/
432void
433e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw)

--- 21 unchanged lines hidden (view full) ---

455 pcix_cmd &= ~PCIX_COMMAND_MMRBC_MASK;
456 pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;
457 e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
458 }
459}
460
461/**
462 * e1000_clear_hw_cntrs_base_generic - Clear base hardware counters
425 *
426 * In certain situations, a system BIOS may report that the PCIx maximum
427 * memory read byte count (MMRBC) value is higher than than the actual
428 * value. We check the PCIx command regsiter with the current PCIx status
429 * regsiter.
430 **/
431void
432e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw)

--- 21 unchanged lines hidden (view full) ---

454 pcix_cmd &= ~PCIX_COMMAND_MMRBC_MASK;
455 pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;
456 e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
457 }
458}
459
460/**
461 * e1000_clear_hw_cntrs_base_generic - Clear base hardware counters
463 * @hw - pointer to the HW structure
462 * @hw: pointer to the HW structure
464 *
465 * Clears the base hardware counters by reading the counter registers.
466 **/
467void
468e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw)
469{
470 volatile u32 temp;
471

--- 35 unchanged lines hidden (view full) ---

507 temp = E1000_READ_REG(hw, E1000_TPR);
508 temp = E1000_READ_REG(hw, E1000_TPT);
509 temp = E1000_READ_REG(hw, E1000_MPTC);
510 temp = E1000_READ_REG(hw, E1000_BPTC);
511}
512
513/**
514 * e1000_check_for_copper_link_generic - Check for link (Copper)
463 *
464 * Clears the base hardware counters by reading the counter registers.
465 **/
466void
467e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw)
468{
469 volatile u32 temp;
470

--- 35 unchanged lines hidden (view full) ---

506 temp = E1000_READ_REG(hw, E1000_TPR);
507 temp = E1000_READ_REG(hw, E1000_TPT);
508 temp = E1000_READ_REG(hw, E1000_MPTC);
509 temp = E1000_READ_REG(hw, E1000_BPTC);
510}
511
512/**
513 * e1000_check_for_copper_link_generic - Check for link (Copper)
515 * @hw - pointer to the HW structure
514 * @hw: pointer to the HW structure
516 *
517 * Checks to see of the link status of the hardware has changed. If a
518 * change in link status has been detected, then we read the PHY registers
519 * to get the current speed/duplex if link exists.
520 **/
521s32
522e1000_check_for_copper_link_generic(struct e1000_hw *hw)
523{

--- 55 unchanged lines hidden (view full) ---

579 }
580
581out:
582 return ret_val;
583}
584
585/**
586 * e1000_check_for_fiber_link_generic - Check for link (Fiber)
515 *
516 * Checks to see of the link status of the hardware has changed. If a
517 * change in link status has been detected, then we read the PHY registers
518 * to get the current speed/duplex if link exists.
519 **/
520s32
521e1000_check_for_copper_link_generic(struct e1000_hw *hw)
522{

--- 55 unchanged lines hidden (view full) ---

578 }
579
580out:
581 return ret_val;
582}
583
584/**
585 * e1000_check_for_fiber_link_generic - Check for link (Fiber)
587 * @hw - pointer to the HW structure
586 * @hw: pointer to the HW structure
588 *
589 * Checks for link up on the hardware. If link is not up and we have
590 * a signal, then we need to force link up.
591 **/
592s32
593e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
594{
595 struct e1000_mac_info *mac = &hw->mac;

--- 52 unchanged lines hidden (view full) ---

648 }
649
650out:
651 return ret_val;
652}
653
654/**
655 * e1000_check_for_serdes_link_generic - Check for link (Serdes)
587 *
588 * Checks for link up on the hardware. If link is not up and we have
589 * a signal, then we need to force link up.
590 **/
591s32
592e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
593{
594 struct e1000_mac_info *mac = &hw->mac;

--- 52 unchanged lines hidden (view full) ---

647 }
648
649out:
650 return ret_val;
651}
652
653/**
654 * e1000_check_for_serdes_link_generic - Check for link (Serdes)
656 * @hw - pointer to the HW structure
655 * @hw: pointer to the HW structure
657 *
658 * Checks for link up on the hardware. If link is not up and we have
659 * a signal, then we need to force link up.
660 **/
661s32
662e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
663{
664 struct e1000_mac_info *mac = &hw->mac;

--- 73 unchanged lines hidden (view full) ---

738 }
739
740out:
741 return ret_val;
742}
743
744/**
745 * e1000_setup_link_generic - Setup flow control and link settings
656 *
657 * Checks for link up on the hardware. If link is not up and we have
658 * a signal, then we need to force link up.
659 **/
660s32
661e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
662{
663 struct e1000_mac_info *mac = &hw->mac;

--- 73 unchanged lines hidden (view full) ---

737 }
738
739out:
740 return ret_val;
741}
742
743/**
744 * e1000_setup_link_generic - Setup flow control and link settings
746 * @hw - pointer to the HW structure
745 * @hw: pointer to the HW structure
747 *
748 * Determines which flow control settings to use, then configures flow
749 * control. Calls the appropriate media-specific link configuration
750 * function. Assuming the adapter has a valid link partner, a valid link
751 * should be established. Assumes the hardware has previously been reset
752 * and the transmitter and receiver are not enabled.
753 **/
754s32

--- 43 unchanged lines hidden (view full) ---

798 ret_val = e1000_set_fc_watermarks_generic(hw);
799
800out:
801 return ret_val;
802}
803
804/**
805 * e1000_setup_fiber_serdes_link_generic - Setup link for fiber/serdes
746 *
747 * Determines which flow control settings to use, then configures flow
748 * control. Calls the appropriate media-specific link configuration
749 * function. Assuming the adapter has a valid link partner, a valid link
750 * should be established. Assumes the hardware has previously been reset
751 * and the transmitter and receiver are not enabled.
752 **/
753s32

--- 43 unchanged lines hidden (view full) ---

797 ret_val = e1000_set_fc_watermarks_generic(hw);
798
799out:
800 return ret_val;
801}
802
803/**
804 * e1000_setup_fiber_serdes_link_generic - Setup link for fiber/serdes
806 * @hw - pointer to the HW structure
805 * @hw: pointer to the HW structure
807 *
808 * Configures collision distance and flow control for fiber and serdes
809 * links. Upon successful setup, poll for link.
810 **/
811s32
812e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
813{
814 u32 ctrl;

--- 36 unchanged lines hidden (view full) ---

851 }
852
853out:
854 return ret_val;
855}
856
857/**
858 * e1000_config_collision_dist_generic - Configure collision distance
806 *
807 * Configures collision distance and flow control for fiber and serdes
808 * links. Upon successful setup, poll for link.
809 **/
810s32
811e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
812{
813 u32 ctrl;

--- 36 unchanged lines hidden (view full) ---

850 }
851
852out:
853 return ret_val;
854}
855
856/**
857 * e1000_config_collision_dist_generic - Configure collision distance
859 * @hw - pointer to the HW structure
858 * @hw: pointer to the HW structure
860 *
861 * Configures the collision distance to the default value and is used
862 * during link setup. Currently no func pointer exists and all
863 * implementations are handled in the generic version of this function.
864 **/
865void
866e1000_config_collision_dist_generic(struct e1000_hw *hw)
867{

--- 7 unchanged lines hidden (view full) ---

875 tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
876
877 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
878 E1000_WRITE_FLUSH(hw);
879}
880
881/**
882 * e1000_poll_fiber_serdes_link_generic - Poll for link up
859 *
860 * Configures the collision distance to the default value and is used
861 * during link setup. Currently no func pointer exists and all
862 * implementations are handled in the generic version of this function.
863 **/
864void
865e1000_config_collision_dist_generic(struct e1000_hw *hw)
866{

--- 7 unchanged lines hidden (view full) ---

874 tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
875
876 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
877 E1000_WRITE_FLUSH(hw);
878}
879
880/**
881 * e1000_poll_fiber_serdes_link_generic - Poll for link up
883 * @hw - pointer to the HW structure
882 * @hw: pointer to the HW structure
884 *
885 * Polls for link up by reading the status register, if link fails to come
886 * up with auto-negotiation, then the link is forced if a signal is detected.
887 **/
888s32
889e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
890{
891 struct e1000_mac_info *mac = &hw->mac;

--- 34 unchanged lines hidden (view full) ---

926 }
927
928out:
929 return ret_val;
930}
931
932/**
933 * e1000_commit_fc_settings_generic - Configure flow control
883 *
884 * Polls for link up by reading the status register, if link fails to come
885 * up with auto-negotiation, then the link is forced if a signal is detected.
886 **/
887s32
888e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
889{
890 struct e1000_mac_info *mac = &hw->mac;

--- 34 unchanged lines hidden (view full) ---

925 }
926
927out:
928 return ret_val;
929}
930
931/**
932 * e1000_commit_fc_settings_generic - Configure flow control
934 * @hw - pointer to the HW structure
933 * @hw: pointer to the HW structure
935 *
936 * Write the flow control settings to the Transmit Config Word Register (TXCW)
937 * base on the flow control settings in e1000_mac_info.
938 **/
939s32
940e1000_commit_fc_settings_generic(struct e1000_hw *hw)
941{
942 struct e1000_mac_info *mac = &hw->mac;

--- 56 unchanged lines hidden (view full) ---

999 mac->txcw = txcw;
1000
1001out:
1002 return ret_val;
1003}
1004
1005/**
1006 * e1000_set_fc_watermarks_generic - Set flow control high/low watermarks
934 *
935 * Write the flow control settings to the Transmit Config Word Register (TXCW)
936 * base on the flow control settings in e1000_mac_info.
937 **/
938s32
939e1000_commit_fc_settings_generic(struct e1000_hw *hw)
940{
941 struct e1000_mac_info *mac = &hw->mac;

--- 56 unchanged lines hidden (view full) ---

998 mac->txcw = txcw;
999
1000out:
1001 return ret_val;
1002}
1003
1004/**
1005 * e1000_set_fc_watermarks_generic - Set flow control high/low watermarks
1007 * @hw - pointer to the HW structure
1006 * @hw: pointer to the HW structure
1008 *
1009 * Sets the flow control high/low threshold (watermark) registers. If
1010 * flow control XON frame transmission is enabled, then set XON frame
1011 * tansmission as well.
1012 **/
1013s32
1014e1000_set_fc_watermarks_generic(struct e1000_hw *hw)
1015{

--- 23 unchanged lines hidden (view full) ---

1039 E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl);
1040 E1000_WRITE_REG(hw, E1000_FCRTH, fcrth);
1041
1042 return ret_val;
1043}
1044
1045/**
1046 * e1000_set_default_fc_generic - Set flow control default values
1007 *
1008 * Sets the flow control high/low threshold (watermark) registers. If
1009 * flow control XON frame transmission is enabled, then set XON frame
1010 * tansmission as well.
1011 **/
1012s32
1013e1000_set_fc_watermarks_generic(struct e1000_hw *hw)
1014{

--- 23 unchanged lines hidden (view full) ---

1038 E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl);
1039 E1000_WRITE_REG(hw, E1000_FCRTH, fcrth);
1040
1041 return ret_val;
1042}
1043
1044/**
1045 * e1000_set_default_fc_generic - Set flow control default values
1047 * @hw - pointer to the HW structure
1046 * @hw: pointer to the HW structure
1048 *
1049 * Read the EEPROM for the default values for flow control and store the
1050 * values.
1051 **/
1052s32
1053e1000_set_default_fc_generic(struct e1000_hw *hw)
1054{
1055 struct e1000_mac_info *mac = &hw->mac;

--- 29 unchanged lines hidden (view full) ---

1085 mac->fc = e1000_fc_full;
1086
1087out:
1088 return ret_val;
1089}
1090
1091/**
1092 * e1000_force_mac_fc_generic - Force the MAC's flow control settings
1047 *
1048 * Read the EEPROM for the default values for flow control and store the
1049 * values.
1050 **/
1051s32
1052e1000_set_default_fc_generic(struct e1000_hw *hw)
1053{
1054 struct e1000_mac_info *mac = &hw->mac;

--- 29 unchanged lines hidden (view full) ---

1084 mac->fc = e1000_fc_full;
1085
1086out:
1087 return ret_val;
1088}
1089
1090/**
1091 * e1000_force_mac_fc_generic - Force the MAC's flow control settings
1093 * @hw - pointer to the HW structure
1092 * @hw: pointer to the HW structure
1094 *
1095 * Force the MAC's flow control settings. Sets the TFCE and RFCE bits in the
1096 * device control register to reflect the adapter settings. TFCE and RFCE
1097 * need to be explicitly set by software when a copper PHY is used because
1098 * autonegotiation is managed by the PHY rather than the MAC. Software must
1099 * also configure these bits when link is forced on a fiber connection.
1100 **/
1101s32

--- 50 unchanged lines hidden (view full) ---

1152 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1153
1154out:
1155 return ret_val;
1156}
1157
1158/**
1159 * e1000_config_fc_after_link_up_generic - Configures flow control after link
1093 *
1094 * Force the MAC's flow control settings. Sets the TFCE and RFCE bits in the
1095 * device control register to reflect the adapter settings. TFCE and RFCE
1096 * need to be explicitly set by software when a copper PHY is used because
1097 * autonegotiation is managed by the PHY rather than the MAC. Software must
1098 * also configure these bits when link is forced on a fiber connection.
1099 **/
1100s32

--- 50 unchanged lines hidden (view full) ---

1151 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
1152
1153out:
1154 return ret_val;
1155}
1156
1157/**
1158 * e1000_config_fc_after_link_up_generic - Configures flow control after link
1160 * @hw - pointer to the HW structure
1159 * @hw: pointer to the HW structure
1161 *
1162 * Checks the status of auto-negotiation after link up to ensure that the
1163 * speed and duplex were not forced. If the link needed to be forced, then
1164 * flow control needs to be forced also. If auto-negotiation is enabled
1165 * and did not fail, then we configure flow control based on our link
1166 * partner.
1167 **/
1168s32

--- 197 unchanged lines hidden (view full) ---

1366 }
1367
1368out:
1369 return ret_val;
1370}
1371
1372/**
1373 * e1000_get_speed_and_duplex_copper_generic - Retreive current speed/duplex
1160 *
1161 * Checks the status of auto-negotiation after link up to ensure that the
1162 * speed and duplex were not forced. If the link needed to be forced, then
1163 * flow control needs to be forced also. If auto-negotiation is enabled
1164 * and did not fail, then we configure flow control based on our link
1165 * partner.
1166 **/
1167s32

--- 197 unchanged lines hidden (view full) ---

1365 }
1366
1367out:
1368 return ret_val;
1369}
1370
1371/**
1372 * e1000_get_speed_and_duplex_copper_generic - Retreive current speed/duplex
1374 * @hw - pointer to the HW structure
1375 * @speed - stores the current speed
1376 * @duplex - stores the current duplex
1373 * @hw: pointer to the HW structure
1374 * @speed: stores the current speed
1375 * @duplex: stores the current duplex
1377 *
1378 * Read the status register for the current speed/duplex and store the current
1379 * speed and duplex for copper connections.
1380 **/
1381s32
1382e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
1383 u16 *duplex)
1384{

--- 21 unchanged lines hidden (view full) ---

1406 DEBUGOUT("Half Duplex\n");
1407 }
1408
1409 return E1000_SUCCESS;
1410}
1411
1412/**
1413 * e1000_get_speed_and_duplex_fiber_generic - Retreive current speed/duplex
1376 *
1377 * Read the status register for the current speed/duplex and store the current
1378 * speed and duplex for copper connections.
1379 **/
1380s32
1381e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
1382 u16 *duplex)
1383{

--- 21 unchanged lines hidden (view full) ---

1405 DEBUGOUT("Half Duplex\n");
1406 }
1407
1408 return E1000_SUCCESS;
1409}
1410
1411/**
1412 * e1000_get_speed_and_duplex_fiber_generic - Retreive current speed/duplex
1414 * @hw - pointer to the HW structure
1415 * @speed - stores the current speed
1416 * @duplex - stores the current duplex
1413 * @hw: pointer to the HW structure
1414 * @speed: stores the current speed
1415 * @duplex: stores the current duplex
1417 *
1418 * Sets the speed and duplex to gigabit full duplex (the only possible option)
1419 * for fiber/serdes links.
1420 **/
1421s32
1422e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw, u16 *speed,
1423 u16 *duplex)
1424{
1425 DEBUGFUNC("e1000_get_speed_and_duplex_fiber_serdes_generic");
1426
1427 *speed = SPEED_1000;
1428 *duplex = FULL_DUPLEX;
1429
1430 return E1000_SUCCESS;
1431}
1432
1433/**
1434 * e1000_get_hw_semaphore_generic - Acquire hardware semaphore
1416 *
1417 * Sets the speed and duplex to gigabit full duplex (the only possible option)
1418 * for fiber/serdes links.
1419 **/
1420s32
1421e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw, u16 *speed,
1422 u16 *duplex)
1423{
1424 DEBUGFUNC("e1000_get_speed_and_duplex_fiber_serdes_generic");
1425
1426 *speed = SPEED_1000;
1427 *duplex = FULL_DUPLEX;
1428
1429 return E1000_SUCCESS;
1430}
1431
1432/**
1433 * e1000_get_hw_semaphore_generic - Acquire hardware semaphore
1435 * @hw - pointer to the HW structure
1434 * @hw: pointer to the HW structure
1436 *
1435 *
1437 * Request a hardware semaphore by setting the firmware semaphore bit, once
1438 * bit has been set, semaphore has been acquired.
1436 * Acquire the HW semaphore to access the PHY or NVM
1439 **/
1440s32
1441e1000_get_hw_semaphore_generic(struct e1000_hw *hw)
1442{
1443 u32 swsm;
1444 s32 ret_val = E1000_SUCCESS;
1445 s32 timeout = hw->nvm.word_size + 1;
1446 s32 i = 0;
1447
1448 DEBUGFUNC("e1000_get_hw_semaphore_generic");
1449
1437 **/
1438s32
1439e1000_get_hw_semaphore_generic(struct e1000_hw *hw)
1440{
1441 u32 swsm;
1442 s32 ret_val = E1000_SUCCESS;
1443 s32 timeout = hw->nvm.word_size + 1;
1444 s32 i = 0;
1445
1446 DEBUGFUNC("e1000_get_hw_semaphore_generic");
1447
1448 /* Get the SW semaphore */
1449 while (i < timeout) {
1450 swsm = E1000_READ_REG(hw, E1000_SWSM);
1451 if (!(swsm & E1000_SWSM_SMBI))
1452 break;
1453
1454 usec_delay(50);
1455 i++;
1456 }
1457
1458 if (i == timeout) {
1459 DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
1460 ret_val = -E1000_ERR_NVM;
1461 goto out;
1462 }
1463
1450 /* Get the FW semaphore. */
1451 for (i = 0; i < timeout; i++) {
1452 swsm = E1000_READ_REG(hw, E1000_SWSM);
1453 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
1454
1455 /* Semaphore acquired if bit latched */
1456 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
1457 break;

--- 10 unchanged lines hidden (view full) ---

1468 }
1469
1470out:
1471 return ret_val;
1472}
1473
1474/**
1475 * e1000_put_hw_semaphore_generic - Release hardware semaphore
1464 /* Get the FW semaphore. */
1465 for (i = 0; i < timeout; i++) {
1466 swsm = E1000_READ_REG(hw, E1000_SWSM);
1467 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
1468
1469 /* Semaphore acquired if bit latched */
1470 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
1471 break;

--- 10 unchanged lines hidden (view full) ---

1482 }
1483
1484out:
1485 return ret_val;
1486}
1487
1488/**
1489 * e1000_put_hw_semaphore_generic - Release hardware semaphore
1476 * @hw - pointer to the HW structure
1490 * @hw: pointer to the HW structure
1477 *
1491 *
1478 * Release hardware semaphore by clearing in the firmware semaphore bit.
1492 * Release hardware semaphore used to access the PHY or NVM
1479 **/
1480void
1481e1000_put_hw_semaphore_generic(struct e1000_hw *hw)
1482{
1483 u32 swsm;
1484
1485 DEBUGFUNC("e1000_put_hw_semaphore_generic");
1486
1487 swsm = E1000_READ_REG(hw, E1000_SWSM);
1488
1493 **/
1494void
1495e1000_put_hw_semaphore_generic(struct e1000_hw *hw)
1496{
1497 u32 swsm;
1498
1499 DEBUGFUNC("e1000_put_hw_semaphore_generic");
1500
1501 swsm = E1000_READ_REG(hw, E1000_SWSM);
1502
1489 swsm &= ~E1000_SWSM_SWESMBI;
1503 swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
1490
1491 E1000_WRITE_REG(hw, E1000_SWSM, swsm);
1492}
1493
1494/**
1495 * e1000_get_auto_rd_done_generic - Check for auto read completion
1504
1505 E1000_WRITE_REG(hw, E1000_SWSM, swsm);
1506}
1507
1508/**
1509 * e1000_get_auto_rd_done_generic - Check for auto read completion
1496 * @hw - pointer to the HW structure
1510 * @hw: pointer to the HW structure
1497 *
1498 * Check EEPROM for Auto Read done bit.
1499 **/
1500s32
1501e1000_get_auto_rd_done_generic(struct e1000_hw *hw)
1502{
1503 s32 i = 0;
1504 s32 ret_val = E1000_SUCCESS;

--- 14 unchanged lines hidden (view full) ---

1519 }
1520
1521out:
1522 return ret_val;
1523}
1524
1525/**
1526 * e1000_valid_led_default_generic - Verify a valid default LED config
1511 *
1512 * Check EEPROM for Auto Read done bit.
1513 **/
1514s32
1515e1000_get_auto_rd_done_generic(struct e1000_hw *hw)
1516{
1517 s32 i = 0;
1518 s32 ret_val = E1000_SUCCESS;

--- 14 unchanged lines hidden (view full) ---

1533 }
1534
1535out:
1536 return ret_val;
1537}
1538
1539/**
1540 * e1000_valid_led_default_generic - Verify a valid default LED config
1527 * @hw - pointer to the HW structure
1528 * @data - pointer to the NVM (EEPROM)
1541 * @hw: pointer to the HW structure
1542 * @data: pointer to the NVM (EEPROM)
1529 *
1530 * Read the EEPROM for the current default LED configuration. If the
1531 * LED configuration is not valid, set to a valid LED configuration.
1532 **/
1533s32
1534e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)
1535{
1536 s32 ret_val;

--- 10 unchanged lines hidden (view full) ---

1547 *data = ID_LED_DEFAULT;
1548
1549out:
1550 return ret_val;
1551}
1552
1553/**
1554 * e1000_id_led_init_generic -
1543 *
1544 * Read the EEPROM for the current default LED configuration. If the
1545 * LED configuration is not valid, set to a valid LED configuration.
1546 **/
1547s32
1548e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)
1549{
1550 s32 ret_val;

--- 10 unchanged lines hidden (view full) ---

1561 *data = ID_LED_DEFAULT;
1562
1563out:
1564 return ret_val;
1565}
1566
1567/**
1568 * e1000_id_led_init_generic -
1555 * @hw - pointer to the HW structure
1569 * @hw: pointer to the HW structure
1556 *
1557 **/
1558s32
1559e1000_id_led_init_generic(struct e1000_hw * hw)
1560{
1561 struct e1000_mac_info *mac = &hw->mac;
1562 s32 ret_val;
1563 const u32 ledctl_mask = 0x000000FF;

--- 51 unchanged lines hidden (view full) ---

1615 }
1616
1617out:
1618 return ret_val;
1619}
1620
1621/**
1622 * e1000_setup_led_generic - Configures SW controllable LED
1570 *
1571 **/
1572s32
1573e1000_id_led_init_generic(struct e1000_hw * hw)
1574{
1575 struct e1000_mac_info *mac = &hw->mac;
1576 s32 ret_val;
1577 const u32 ledctl_mask = 0x000000FF;

--- 51 unchanged lines hidden (view full) ---

1629 }
1630
1631out:
1632 return ret_val;
1633}
1634
1635/**
1636 * e1000_setup_led_generic - Configures SW controllable LED
1623 * @hw - pointer to the HW structure
1637 * @hw: pointer to the HW structure
1624 *
1625 * This prepares the SW controllable LED for use and saves the current state
1626 * of the LED so it can be later restored.
1627 **/
1628s32
1629e1000_setup_led_generic(struct e1000_hw *hw)
1630{
1631 u32 ledctl;

--- 21 unchanged lines hidden (view full) ---

1653 }
1654
1655out:
1656 return ret_val;
1657}
1658
1659/**
1660 * e1000_cleanup_led_generic - Set LED config to default operation
1638 *
1639 * This prepares the SW controllable LED for use and saves the current state
1640 * of the LED so it can be later restored.
1641 **/
1642s32
1643e1000_setup_led_generic(struct e1000_hw *hw)
1644{
1645 u32 ledctl;

--- 21 unchanged lines hidden (view full) ---

1667 }
1668
1669out:
1670 return ret_val;
1671}
1672
1673/**
1674 * e1000_cleanup_led_generic - Set LED config to default operation
1661 * @hw - pointer to the HW structure
1675 * @hw: pointer to the HW structure
1662 *
1663 * Remove the current LED configuration and set the LED configuration
1664 * to the default value, saved from the EEPROM.
1665 **/
1666s32
1667e1000_cleanup_led_generic(struct e1000_hw *hw)
1668{
1669 s32 ret_val = E1000_SUCCESS;

--- 8 unchanged lines hidden (view full) ---

1678 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
1679
1680out:
1681 return ret_val;
1682}
1683
1684/**
1685 * e1000_blink_led_generic - Blink LED
1676 *
1677 * Remove the current LED configuration and set the LED configuration
1678 * to the default value, saved from the EEPROM.
1679 **/
1680s32
1681e1000_cleanup_led_generic(struct e1000_hw *hw)
1682{
1683 s32 ret_val = E1000_SUCCESS;

--- 8 unchanged lines hidden (view full) ---

1692 E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
1693
1694out:
1695 return ret_val;
1696}
1697
1698/**
1699 * e1000_blink_led_generic - Blink LED
1686 * @hw - pointer to the HW structure
1700 * @hw: pointer to the HW structure
1687 *
1688 * Blink the led's which are set to be on.
1689 **/
1690s32
1691e1000_blink_led_generic(struct e1000_hw *hw)
1692{
1693 u32 ledctl_blink = 0;
1694 u32 i;

--- 17 unchanged lines hidden (view full) ---

1712
1713 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink);
1714
1715 return E1000_SUCCESS;
1716}
1717
1718/**
1719 * e1000_led_on_generic - Turn LED on
1701 *
1702 * Blink the led's which are set to be on.
1703 **/
1704s32
1705e1000_blink_led_generic(struct e1000_hw *hw)
1706{
1707 u32 ledctl_blink = 0;
1708 u32 i;

--- 17 unchanged lines hidden (view full) ---

1726
1727 E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink);
1728
1729 return E1000_SUCCESS;
1730}
1731
1732/**
1733 * e1000_led_on_generic - Turn LED on
1720 * @hw - pointer to the HW structure
1734 * @hw: pointer to the HW structure
1721 *
1722 * Turn LED on.
1723 **/
1724s32
1725e1000_led_on_generic(struct e1000_hw *hw)
1726{
1727 u32 ctrl;
1728

--- 13 unchanged lines hidden (view full) ---

1742 break;
1743 }
1744
1745 return E1000_SUCCESS;
1746}
1747
1748/**
1749 * e1000_led_off_generic - Turn LED off
1735 *
1736 * Turn LED on.
1737 **/
1738s32
1739e1000_led_on_generic(struct e1000_hw *hw)
1740{
1741 u32 ctrl;
1742

--- 13 unchanged lines hidden (view full) ---

1756 break;
1757 }
1758
1759 return E1000_SUCCESS;
1760}
1761
1762/**
1763 * e1000_led_off_generic - Turn LED off
1750 * @hw - pointer to the HW structure
1764 * @hw: pointer to the HW structure
1751 *
1752 * Turn LED off.
1753 **/
1754s32
1755e1000_led_off_generic(struct e1000_hw *hw)
1756{
1757 u32 ctrl;
1758

--- 13 unchanged lines hidden (view full) ---

1772 break;
1773 }
1774
1775 return E1000_SUCCESS;
1776}
1777
1778/**
1779 * e1000_set_pcie_no_snoop_generic - Set PCI-express capabilities
1765 *
1766 * Turn LED off.
1767 **/
1768s32
1769e1000_led_off_generic(struct e1000_hw *hw)
1770{
1771 u32 ctrl;
1772

--- 13 unchanged lines hidden (view full) ---

1786 break;
1787 }
1788
1789 return E1000_SUCCESS;
1790}
1791
1792/**
1793 * e1000_set_pcie_no_snoop_generic - Set PCI-express capabilities
1780 * @hw - pointer to the HW structure
1781 * @no_snoop - bitmap of snoop events
1794 * @hw: pointer to the HW structure
1795 * @no_snoop: bitmap of snoop events
1782 *
1783 * Set the PCI-express register to snoop for events enabled in 'no_snoop'.
1784 **/
1785void
1786e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)
1787{
1788 u32 gcr;
1789

--- 9 unchanged lines hidden (view full) ---

1799 E1000_WRITE_REG(hw, E1000_GCR, gcr);
1800 }
1801out:
1802 return;
1803}
1804
1805/**
1806 * e1000_disable_pcie_master_generic - Disables PCI-express master access
1796 *
1797 * Set the PCI-express register to snoop for events enabled in 'no_snoop'.
1798 **/
1799void
1800e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)
1801{
1802 u32 gcr;
1803

--- 9 unchanged lines hidden (view full) ---

1813 E1000_WRITE_REG(hw, E1000_GCR, gcr);
1814 }
1815out:
1816 return;
1817}
1818
1819/**
1820 * e1000_disable_pcie_master_generic - Disables PCI-express master access
1807 * @hw - pointer to the HW structure
1821 * @hw: pointer to the HW structure
1808 *
1809 * Returns 0 (E1000_SUCCESS) if successful, else returns -10
1810 * (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not casued
1811 * the master requests to be disabled.
1812 *
1813 * Disables PCI-Express master access and verifies there are no pending
1814 * requests.
1815 **/

--- 28 unchanged lines hidden (view full) ---

1844 }
1845
1846out:
1847 return ret_val;
1848}
1849
1850/**
1851 * e1000_reset_adaptive_generic - Reset Adaptive Interframe Spacing
1822 *
1823 * Returns 0 (E1000_SUCCESS) if successful, else returns -10
1824 * (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not casued
1825 * the master requests to be disabled.
1826 *
1827 * Disables PCI-Express master access and verifies there are no pending
1828 * requests.
1829 **/

--- 28 unchanged lines hidden (view full) ---

1858 }
1859
1860out:
1861 return ret_val;
1862}
1863
1864/**
1865 * e1000_reset_adaptive_generic - Reset Adaptive Interframe Spacing
1852 * @hw - pointer to the HW structure
1866 * @hw: pointer to the HW structure
1853 *
1854 * Reset the Adaptive Interframe Spacing throttle to default values.
1855 **/
1856void
1857e1000_reset_adaptive_generic(struct e1000_hw *hw)
1858{
1859 struct e1000_mac_info *mac = &hw->mac;
1860

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1876 mac->in_ifs_mode = FALSE;
1877 E1000_WRITE_REG(hw, E1000_AIT, 0);
1878out:
1879 return;
1880}
1881
1882/**
1883 * e1000_update_adaptive_generic - Update Adaptive Interframe Spacing
1867 *
1868 * Reset the Adaptive Interframe Spacing throttle to default values.
1869 **/
1870void
1871e1000_reset_adaptive_generic(struct e1000_hw *hw)
1872{
1873 struct e1000_mac_info *mac = &hw->mac;
1874

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1890 mac->in_ifs_mode = FALSE;
1891 E1000_WRITE_REG(hw, E1000_AIT, 0);
1892out:
1893 return;
1894}
1895
1896/**
1897 * e1000_update_adaptive_generic - Update Adaptive Interframe Spacing
1884 * @hw - pointer to the HW structure
1898 * @hw: pointer to the HW structure
1885 *
1886 * Update the Adaptive Interframe Spacing Throttle value based on the
1887 * time between transmitted packets and time between collisions.
1888 **/
1889void
1890e1000_update_adaptive_generic(struct e1000_hw *hw)
1891{
1892 struct e1000_mac_info *mac = &hw->mac;

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1919 }
1920 }
1921out:
1922 return;
1923}
1924
1925/**
1926 * e1000_validate_mdi_setting_generic - Verify MDI/MDIx settings
1899 *
1900 * Update the Adaptive Interframe Spacing Throttle value based on the
1901 * time between transmitted packets and time between collisions.
1902 **/
1903void
1904e1000_update_adaptive_generic(struct e1000_hw *hw)
1905{
1906 struct e1000_mac_info *mac = &hw->mac;

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1933 }
1934 }
1935out:
1936 return;
1937}
1938
1939/**
1940 * e1000_validate_mdi_setting_generic - Verify MDI/MDIx settings
1927 * @hw - pointer to the HW structure
1941 * @hw: pointer to the HW structure
1928 *
1929 * Verify that when not using auto-negotitation that MDI/MDIx is correctly
1930 * set, which is forced to MDI mode only.
1931 **/
1932s32
1933e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
1934{
1935 s32 ret_val = E1000_SUCCESS;

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1944 }
1945
1946out:
1947 return ret_val;
1948}
1949
1950/**
1951 * e1000_write_8bit_ctrl_reg_generic - Write a 8bit CTRL register
1942 *
1943 * Verify that when not using auto-negotitation that MDI/MDIx is correctly
1944 * set, which is forced to MDI mode only.
1945 **/
1946s32
1947e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
1948{
1949 s32 ret_val = E1000_SUCCESS;

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1958 }
1959
1960out:
1961 return ret_val;
1962}
1963
1964/**
1965 * e1000_write_8bit_ctrl_reg_generic - Write a 8bit CTRL register
1952 * @hw - pointer to the HW structure
1953 * @reg - 32bit register offset such as E1000_SCTL
1954 * @offset - register offset to write to
1955 * @data - data to write at register offset
1966 * @hw: pointer to the HW structure
1967 * @reg: 32bit register offset such as E1000_SCTL
1968 * @offset: register offset to write to
1969 * @data: data to write at register offset
1956 *
1957 * Writes an address/data control type register. There are several of these
1958 * and they all have the format address << 8 | data and bit 31 is polled for
1959 * completion.
1960 **/
1961s32
1962e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
1963 u32 offset, u8 data)

--- 26 unchanged lines hidden --- 		1970 *
1971 * Writes an address/data control type register. There are several of these
1972 * and they all have the format address << 8 | data and bit 31 is polled for
1973 * completion.
1974 **/
1975s32
1976e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
1977 u32 offset, u8 data)

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