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e1000_hw.h (169589) e1000_hw.h (173788)
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_hw.h 169589 2007-05-16 00:14:23Z jfv $*/
33/* $FreeBSD: head/sys/dev/em/e1000_hw.h 173788 2007-11-20 21:41:22Z jfv $ */
34
35
36#ifndef _E1000_HW_H_
37#define _E1000_HW_H_
38
39#include "e1000_osdep.h"
40#include "e1000_regs.h"
41#include "e1000_defines.h"

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81#define E1000_DEV_ID_82547EI_MOBILE 0x101A
82#define E1000_DEV_ID_82547GI 0x1075
83#define E1000_DEV_ID_82571EB_COPPER 0x105E
84#define E1000_DEV_ID_82571EB_FIBER 0x105F
85#define E1000_DEV_ID_82571EB_SERDES 0x1060
86#define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9
87#define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA
88#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4
34
35
36#ifndef _E1000_HW_H_
37#define _E1000_HW_H_
38
39#include "e1000_osdep.h"
40#include "e1000_regs.h"
41#include "e1000_defines.h"

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81#define E1000_DEV_ID_82547EI_MOBILE 0x101A
82#define E1000_DEV_ID_82547GI 0x1075
83#define E1000_DEV_ID_82571EB_COPPER 0x105E
84#define E1000_DEV_ID_82571EB_FIBER 0x105F
85#define E1000_DEV_ID_82571EB_SERDES 0x1060
86#define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9
87#define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA
88#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4
89#define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5
89#define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5
90#define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC
91#define E1000_DEV_ID_82572EI_COPPER 0x107D
92#define E1000_DEV_ID_82572EI_FIBER 0x107E
93#define E1000_DEV_ID_82572EI_SERDES 0x107F
94#define E1000_DEV_ID_82572EI 0x10B9
95#define E1000_DEV_ID_82573E 0x108B
96#define E1000_DEV_ID_82573E_IAMT 0x108C

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108#define E1000_DEV_ID_ICH8_IGP_M 0x104D
109#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
110#define E1000_DEV_ID_ICH9_IGP_C 0x294C
111#define E1000_DEV_ID_ICH9_IFE 0x10C0
112#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3
113#define E1000_DEV_ID_ICH9_IFE_G 0x10C2
114#define E1000_DEV_ID_82575EB_COPPER 0x10A7
115#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
90#define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5
91#define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC
92#define E1000_DEV_ID_82572EI_COPPER 0x107D
93#define E1000_DEV_ID_82572EI_FIBER 0x107E
94#define E1000_DEV_ID_82572EI_SERDES 0x107F
95#define E1000_DEV_ID_82572EI 0x10B9
96#define E1000_DEV_ID_82573E 0x108B
97#define E1000_DEV_ID_82573E_IAMT 0x108C

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109#define E1000_DEV_ID_ICH8_IGP_M 0x104D
110#define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD
111#define E1000_DEV_ID_ICH9_IGP_C 0x294C
112#define E1000_DEV_ID_ICH9_IFE 0x10C0
113#define E1000_DEV_ID_ICH9_IFE_GT 0x10C3
114#define E1000_DEV_ID_ICH9_IFE_G 0x10C2
115#define E1000_DEV_ID_82575EB_COPPER 0x10A7
116#define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
116#define E1000_DEV_ID_82575EM_COPPER 0x10AA
117#define E1000_DEV_ID_82575EM_FIBER_SERDES 0x10AC
118#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
119
120#define E1000_REVISION_0 0
121#define E1000_REVISION_1 1
122#define E1000_REVISION_2 2
123#define E1000_REVISION_3 3
124#define E1000_REVISION_4 4
125

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199typedef enum {
200 e1000_bus_speed_unknown = 0,
201 e1000_bus_speed_33,
202 e1000_bus_speed_66,
203 e1000_bus_speed_100,
204 e1000_bus_speed_120,
205 e1000_bus_speed_133,
206 e1000_bus_speed_2500,
117#define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
118
119#define E1000_REVISION_0 0
120#define E1000_REVISION_1 1
121#define E1000_REVISION_2 2
122#define E1000_REVISION_3 3
123#define E1000_REVISION_4 4
124

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198typedef enum {
199 e1000_bus_speed_unknown = 0,
200 e1000_bus_speed_33,
201 e1000_bus_speed_66,
202 e1000_bus_speed_100,
203 e1000_bus_speed_120,
204 e1000_bus_speed_133,
205 e1000_bus_speed_2500,
206 e1000_bus_speed_5000,
207 e1000_bus_speed_reserved
208} e1000_bus_speed;
209
210typedef enum {
211 e1000_bus_width_unknown = 0,
212 e1000_bus_width_pcie_x1,
213 e1000_bus_width_pcie_x2,
214 e1000_bus_width_pcie_x4 = 4,
207 e1000_bus_speed_reserved
208} e1000_bus_speed;
209
210typedef enum {
211 e1000_bus_width_unknown = 0,
212 e1000_bus_width_pcie_x1,
213 e1000_bus_width_pcie_x2,
214 e1000_bus_width_pcie_x4 = 4,
215 e1000_bus_width_pcie_x8 = 8,
215 e1000_bus_width_32,
216 e1000_bus_width_64,
217 e1000_bus_width_reserved
218} e1000_bus_width;
219
220typedef enum {
221 e1000_1000t_rx_status_not_ok = 0,
222 e1000_1000t_rx_status_ok,

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230} e1000_rev_polarity;
231
232typedef enum {
233 e1000_fc_none = 0,
234 e1000_fc_rx_pause,
235 e1000_fc_tx_pause,
236 e1000_fc_full,
237 e1000_fc_default = 0xFF
216 e1000_bus_width_32,
217 e1000_bus_width_64,
218 e1000_bus_width_reserved
219} e1000_bus_width;
220
221typedef enum {
222 e1000_1000t_rx_status_not_ok = 0,
223 e1000_1000t_rx_status_ok,

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231} e1000_rev_polarity;
232
233typedef enum {
234 e1000_fc_none = 0,
235 e1000_fc_rx_pause,
236 e1000_fc_tx_pause,
237 e1000_fc_full,
238 e1000_fc_default = 0xFF
238} e1000_fc_mode;
239} e1000_fc_type;
239
240typedef enum {
241 e1000_ffe_config_enabled = 0,
242 e1000_ffe_config_active,
243 e1000_ffe_config_blocked
244} e1000_ffe_config;
245
246typedef enum {

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377 u8 cmd;
378 } flags;
379 } lower;
380 union {
381 u32 data;
382 struct {
383 u8 status; /* Descriptor status */
384 u8 popts; /* Packet Options */
240
241typedef enum {
242 e1000_ffe_config_enabled = 0,
243 e1000_ffe_config_active,
244 e1000_ffe_config_blocked
245} e1000_ffe_config;
246
247typedef enum {

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378 u8 cmd;
379 } flags;
380 } lower;
381 union {
382 u32 data;
383 struct {
384 u8 status; /* Descriptor status */
385 u8 popts; /* Packet Options */
385 u16 special; /* */
386 u16 special;
386 } fields;
387 } upper;
388};
389
390/* Statistics counters collected by the MAC */
391struct e1000_hw_stats {
392 u64 crcerrs;
393 u64 algnerrc;

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414 u64 prc255;
415 u64 prc511;
416 u64 prc1023;
417 u64 prc1522;
418 u64 gprc;
419 u64 bprc;
420 u64 mprc;
421 u64 gptc;
387 } fields;
388 } upper;
389};
390
391/* Statistics counters collected by the MAC */
392struct e1000_hw_stats {
393 u64 crcerrs;
394 u64 algnerrc;

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415 u64 prc255;
416 u64 prc511;
417 u64 prc1023;
418 u64 prc1522;
419 u64 gprc;
420 u64 bprc;
421 u64 mprc;
422 u64 gptc;
422 u64 gorcl;
423 u64 gorch;
424 u64 gotcl;
425 u64 gotch;
423 u64 gorc;
424 u64 gotc;
426 u64 rnbc;
427 u64 ruc;
428 u64 rfc;
429 u64 roc;
430 u64 rjc;
431 u64 mgprc;
432 u64 mgpdc;
433 u64 mgptc;
425 u64 rnbc;
426 u64 ruc;
427 u64 rfc;
428 u64 roc;
429 u64 rjc;
430 u64 mgprc;
431 u64 mgpdc;
432 u64 mgptc;
434 u64 torl;
435 u64 torh;
436 u64 totl;
437 u64 toth;
433 u64 tor;
434 u64 tot;
438 u64 tpr;
439 u64 tpt;
440 u64 ptc64;
441 u64 ptc127;
442 u64 ptc255;
443 u64 ptc511;
444 u64 ptc1023;
445 u64 ptc1522;

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458 u64 icrxoc;
459 u64 cbtmpc;
460 u64 htdpmc;
461 u64 cbrdpc;
462 u64 cbrmpc;
463 u64 rpthc;
464 u64 hgptc;
465 u64 htcbdpc;
435 u64 tpr;
436 u64 tpt;
437 u64 ptc64;
438 u64 ptc127;
439 u64 ptc255;
440 u64 ptc511;
441 u64 ptc1023;
442 u64 ptc1522;

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455 u64 icrxoc;
456 u64 cbtmpc;
457 u64 htdpmc;
458 u64 cbrdpc;
459 u64 cbrmpc;
460 u64 rpthc;
461 u64 hgptc;
462 u64 htcbdpc;
466 u64 hgorcl;
467 u64 hgorch;
468 u64 hgotcl;
469 u64 hgotch;
463 u64 hgorc;
464 u64 hgotc;
470 u64 lenerrs;
471 u64 scvpc;
472 u64 hrmpc;
473};
474
475struct e1000_phy_stats {
476 u32 idle_errors;
477 u32 receive_errors;

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519
520#include "e1000_mac.h"
521#include "e1000_phy.h"
522#include "e1000_nvm.h"
523#include "e1000_manage.h"
524
525struct e1000_functions {
526 /* Function pointers for the MAC. */
465 u64 lenerrs;
466 u64 scvpc;
467 u64 hrmpc;
468};
469
470struct e1000_phy_stats {
471 u32 idle_errors;
472 u32 receive_errors;

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514
515#include "e1000_mac.h"
516#include "e1000_phy.h"
517#include "e1000_nvm.h"
518#include "e1000_manage.h"
519
520struct e1000_functions {
521 /* Function pointers for the MAC. */
527 s32 (*init_mac_params)(struct e1000_hw *);
528 s32 (*blink_led)(struct e1000_hw *);
529 s32 (*check_for_link)(struct e1000_hw *);
530 boolean_t (*check_mng_mode)(struct e1000_hw *hw);
531 s32 (*cleanup_led)(struct e1000_hw *);
532 void (*clear_hw_cntrs)(struct e1000_hw *);
533 void (*clear_vfta)(struct e1000_hw *);
534 s32 (*get_bus_info)(struct e1000_hw *);
535 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
536 s32 (*led_on)(struct e1000_hw *);
537 s32 (*led_off)(struct e1000_hw *);
538 void (*mc_addr_list_update)(struct e1000_hw *, u8 *, u32, u32,
539 u32);
540 void (*remove_device)(struct e1000_hw *);
541 s32 (*reset_hw)(struct e1000_hw *);
542 s32 (*init_hw)(struct e1000_hw *);
543 s32 (*setup_link)(struct e1000_hw *);
544 s32 (*setup_physical_interface)(struct e1000_hw *);
545 s32 (*setup_led)(struct e1000_hw *);
546 void (*write_vfta)(struct e1000_hw *, u32, u32);
547 void (*mta_set)(struct e1000_hw *, u32);
548 void (*config_collision_dist)(struct e1000_hw*);
549 void (*rar_set)(struct e1000_hw*, u8*, u32);
550 s32 (*validate_mdi_setting)(struct e1000_hw*);
551 s32 (*mng_host_if_write)(struct e1000_hw*, u8*, u16, u16, u8*);
552 s32 (*mng_write_cmd_header)(struct e1000_hw *hw,
553 struct e1000_host_mng_command_header*);
554 s32 (*mng_enable_host_if)(struct e1000_hw*);
555 s32 (*wait_autoneg)(struct e1000_hw*);
522 s32 (*init_mac_params)(struct e1000_hw *);
523 s32 (*blink_led)(struct e1000_hw *);
524 s32 (*check_for_link)(struct e1000_hw *);
525 bool (*check_mng_mode)(struct e1000_hw *hw);
526 s32 (*cleanup_led)(struct e1000_hw *);
527 void (*clear_hw_cntrs)(struct e1000_hw *);
528 void (*clear_vfta)(struct e1000_hw *);
529 s32 (*get_bus_info)(struct e1000_hw *);
530 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
531 s32 (*led_on)(struct e1000_hw *);
532 s32 (*led_off)(struct e1000_hw *);
533 void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32, u32,
534 u32);
535 void (*remove_device)(struct e1000_hw *);
536 s32 (*reset_hw)(struct e1000_hw *);
537 s32 (*init_hw)(struct e1000_hw *);
538 s32 (*setup_link)(struct e1000_hw *);
539 s32 (*setup_physical_interface)(struct e1000_hw *);
540 s32 (*setup_led)(struct e1000_hw *);
541 void (*write_vfta)(struct e1000_hw *, u32, u32);
542 void (*mta_set)(struct e1000_hw *, u32);
543 void (*config_collision_dist)(struct e1000_hw*);
544 void (*rar_set)(struct e1000_hw*, u8*, u32);
545 s32 (*read_mac_addr)(struct e1000_hw*);
546 s32 (*validate_mdi_setting)(struct e1000_hw*);
547 s32 (*mng_host_if_write)(struct e1000_hw*, u8*, u16, u16, u8*);
548 s32 (*mng_write_cmd_header)(struct e1000_hw *hw,
549 struct e1000_host_mng_command_header*);
550 s32 (*mng_enable_host_if)(struct e1000_hw*);
551 s32 (*wait_autoneg)(struct e1000_hw*);
556
557 /* Function pointers for the PHY. */
552
553 /* Function pointers for the PHY. */
558 s32 (*init_phy_params)(struct e1000_hw *);
559 s32 (*acquire_phy)(struct e1000_hw *);
560 s32 (*check_polarity)(struct e1000_hw *);
561 s32 (*check_reset_block)(struct e1000_hw *);
562 s32 (*commit_phy)(struct e1000_hw *);
563 s32 (*force_speed_duplex)(struct e1000_hw *);
564 s32 (*get_cfg_done)(struct e1000_hw *hw);
565 s32 (*get_cable_length)(struct e1000_hw *);
566 s32 (*get_phy_info)(struct e1000_hw *);
567 s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *);
568 void (*release_phy)(struct e1000_hw *);
569 s32 (*reset_phy)(struct e1000_hw *);
570 s32 (*set_d0_lplu_state)(struct e1000_hw *, boolean_t);
571 s32 (*set_d3_lplu_state)(struct e1000_hw *, boolean_t);
572 s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
554 s32 (*init_phy_params)(struct e1000_hw *);
555 s32 (*acquire_phy)(struct e1000_hw *);
556 s32 (*check_polarity)(struct e1000_hw *);
557 s32 (*check_reset_block)(struct e1000_hw *);
558 s32 (*commit_phy)(struct e1000_hw *);
559 s32 (*force_speed_duplex)(struct e1000_hw *);
560 s32 (*get_cfg_done)(struct e1000_hw *hw);
561 s32 (*get_cable_length)(struct e1000_hw *);
562 s32 (*get_phy_info)(struct e1000_hw *);
563 s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *);
564 void (*release_phy)(struct e1000_hw *);
565 s32 (*reset_phy)(struct e1000_hw *);
566 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
567 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
568 s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
569 void (*power_up_phy)(struct e1000_hw *);
570 void (*power_down_phy)(struct e1000_hw *);
573
574 /* Function pointers for the NVM. */
571
572 /* Function pointers for the NVM. */
575 s32 (*init_nvm_params)(struct e1000_hw *);
576 s32 (*acquire_nvm)(struct e1000_hw *);
577 s32 (*read_nvm)(struct e1000_hw *, u16, u16, u16 *);
578 void (*release_nvm)(struct e1000_hw *);
579 void (*reload_nvm)(struct e1000_hw *);
580 s32 (*update_nvm)(struct e1000_hw *);
581 s32 (*valid_led_default)(struct e1000_hw *, u16 *);
582 s32 (*validate_nvm)(struct e1000_hw *);
583 s32 (*write_nvm)(struct e1000_hw *, u16, u16, u16 *);
573 s32 (*init_nvm_params)(struct e1000_hw *);
574 s32 (*acquire_nvm)(struct e1000_hw *);
575 s32 (*read_nvm)(struct e1000_hw *, u16, u16, u16 *);
576 void (*release_nvm)(struct e1000_hw *);
577 void (*reload_nvm)(struct e1000_hw *);
578 s32 (*update_nvm)(struct e1000_hw *);
579 s32 (*valid_led_default)(struct e1000_hw *, u16 *);
580 s32 (*validate_nvm)(struct e1000_hw *);
581 s32 (*write_nvm)(struct e1000_hw *, u16, u16, u16 *);
584};
585
586struct e1000_mac_info {
587 u8 addr[6];
588 u8 perm_addr[6];
589
590 e1000_mac_type type;
582};
583
584struct e1000_mac_info {
585 u8 addr[6];
586 u8 perm_addr[6];
587
588 e1000_mac_type type;
591 e1000_fc_mode fc;
592 e1000_fc_mode original_fc;
593
594 u32 collision_delta;
595 u32 ledctl_default;
596 u32 ledctl_mode1;
597 u32 ledctl_mode2;
589
590 u32 collision_delta;
591 u32 ledctl_default;
592 u32 ledctl_mode1;
593 u32 ledctl_mode2;
598 u32 max_frame_size;
599 u32 mc_filter_type;
594 u32 mc_filter_type;
600 u32 min_frame_size;
601 u32 tx_packet_delta;
602 u32 txcw;
603
604 u16 current_ifs_val;
605 u16 ifs_max_val;
606 u16 ifs_min_val;
607 u16 ifs_ratio;
608 u16 ifs_step_size;
609 u16 mta_reg_count;
610 u16 rar_entry_count;
595 u32 tx_packet_delta;
596 u32 txcw;
597
598 u16 current_ifs_val;
599 u16 ifs_max_val;
600 u16 ifs_min_val;
601 u16 ifs_ratio;
602 u16 ifs_step_size;
603 u16 mta_reg_count;
604 u16 rar_entry_count;
611 u16 fc_high_water;
612 u16 fc_low_water;
613 u16 fc_pause_time;
614
615 u8 forced_speed_duplex;
616
605
606 u8 forced_speed_duplex;
607
617 boolean_t adaptive_ifs;
618 boolean_t arc_subsystem_valid;
619 boolean_t asf_firmware_present;
620 boolean_t autoneg;
621 boolean_t autoneg_failed;
622 boolean_t disable_av;
623 boolean_t disable_hw_init_bits;
624 boolean_t fc_send_xon;
625 boolean_t fc_strict_ieee;
626 boolean_t get_link_status;
627 boolean_t ifs_params_forced;
628 boolean_t in_ifs_mode;
629 boolean_t report_tx_early;
630 boolean_t serdes_has_link;
631 boolean_t tx_pkt_filtering;
608 bool adaptive_ifs;
609 bool arc_subsystem_valid;
610 bool asf_firmware_present;
611 bool autoneg;
612 bool autoneg_failed;
613 bool disable_av;
614 bool disable_hw_init_bits;
615 bool get_link_status;
616 bool ifs_params_forced;
617 bool in_ifs_mode;
618 bool report_tx_early;
619 bool serdes_has_link;
620 bool tx_pkt_filtering;
632};
633
634struct e1000_phy_info {
635 e1000_phy_type type;
636
637 e1000_1000t_rx_status local_rx;
638 e1000_1000t_rx_status remote_rx;
639 e1000_ms_type ms_type;
640 e1000_ms_type original_ms_type;
641 e1000_rev_polarity cable_polarity;
642 e1000_smart_speed smart_speed;
643
644 u32 addr;
645 u32 id;
646 u32 reset_delay_us; /* in usec */
647 u32 revision;
648
621};
622
623struct e1000_phy_info {
624 e1000_phy_type type;
625
626 e1000_1000t_rx_status local_rx;
627 e1000_1000t_rx_status remote_rx;
628 e1000_ms_type ms_type;
629 e1000_ms_type original_ms_type;
630 e1000_rev_polarity cable_polarity;
631 e1000_smart_speed smart_speed;
632
633 u32 addr;
634 u32 id;
635 u32 reset_delay_us; /* in usec */
636 u32 revision;
637
638 e1000_media_type media_type;
639
649 u16 autoneg_advertised;
650 u16 autoneg_mask;
651 u16 cable_length;
652 u16 max_cable_length;
653 u16 min_cable_length;
654
655 u8 mdix;
656
640 u16 autoneg_advertised;
641 u16 autoneg_mask;
642 u16 cable_length;
643 u16 max_cable_length;
644 u16 min_cable_length;
645
646 u8 mdix;
647
657 boolean_t disable_polarity_correction;
658 boolean_t is_mdix;
659 boolean_t polarity_correction;
660 boolean_t reset_disable;
661 boolean_t speed_downgraded;
662 boolean_t wait_for_link;
648 bool disable_polarity_correction;
649 bool is_mdix;
650 bool polarity_correction;
651 bool reset_disable;
652 bool speed_downgraded;
653 bool autoneg_wait_to_complete;
663};
664
665struct e1000_nvm_info {
666 e1000_nvm_type type;
667 e1000_nvm_override override;
668
669 u32 flash_bank_size;
670 u32 flash_base_addr;

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682 e1000_bus_width width;
683
684 u32 snoop;
685
686 u16 func;
687 u16 pci_cmd_word;
688};
689
654};
655
656struct e1000_nvm_info {
657 e1000_nvm_type type;
658 e1000_nvm_override override;
659
660 u32 flash_bank_size;
661 u32 flash_base_addr;

--- 11 unchanged lines hidden (view full) ---

673 e1000_bus_width width;
674
675 u32 snoop;
676
677 u16 func;
678 u16 pci_cmd_word;
679};
680
681struct e1000_fc_info {
682 u32 high_water; /* Flow control high-water mark */
683 u32 low_water; /* Flow control low-water mark */
684 u16 pause_time; /* Flow control pause timer */
685 bool send_xon; /* Flow control send XON */
686 bool strict_ieee; /* Strict IEEE mode */
687 e1000_fc_type type; /* Type of flow control */
688 e1000_fc_type original_type;
689};
690
690struct e1000_hw {
691 void *back;
692 void *dev_spec;
693
694 u8 *hw_addr;
695 u8 *flash_address;
696 unsigned long io_base;
697
698 struct e1000_functions func;
699 struct e1000_mac_info mac;
691struct e1000_hw {
692 void *back;
693 void *dev_spec;
694
695 u8 *hw_addr;
696 u8 *flash_address;
697 unsigned long io_base;
698
699 struct e1000_functions func;
700 struct e1000_mac_info mac;
701 struct e1000_fc_info fc;
700 struct e1000_phy_info phy;
701 struct e1000_nvm_info nvm;
702 struct e1000_bus_info bus;
703 struct e1000_host_mng_dhcp_cookie mng_cookie;
704
702 struct e1000_phy_info phy;
703 struct e1000_nvm_info nvm;
704 struct e1000_bus_info bus;
705 struct e1000_host_mng_dhcp_cookie mng_cookie;
706
705 e1000_media_type media_type;
706
707 u32 dev_spec_size;
708
709 u16 device_id;
710 u16 subsystem_vendor_id;
711 u16 subsystem_device_id;
712 u16 vendor_id;
713
714 u8 revision_id;

--- 12 unchanged lines hidden --- 		707 u32 dev_spec_size;
708
709 u16 device_id;
710 u16 subsystem_vendor_id;
711 u16 subsystem_device_id;
712 u16 vendor_id;
713
714 u8 revision_id;

--- 12 unchanged lines hidden ---