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e1000_82571.c (169589) e1000_82571.c (173788)
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
1/*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8

--- 16 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32*******************************************************************************/
33/*$FreeBSD: head/sys/dev/em/e1000_82571.c 169589 2007-05-16 00:14:23Z jfv $*/
33/* $FreeBSD: head/sys/dev/em/e1000_82571.c 173788 2007-11-20 21:41:22Z jfv $ */
34
35
36/* e1000_82571
37 * e1000_82572
38 * e1000_82573
34
35
36/* e1000_82571
37 * e1000_82572
38 * e1000_82573
39 * e1000_82574
39 */
40
41#include "e1000_api.h"
42#include "e1000_82571.h"
43
44void e1000_init_function_pointers_82571(struct e1000_hw *hw);
45
46STATIC s32 e1000_init_phy_params_82571(struct e1000_hw *hw);
47STATIC s32 e1000_init_nvm_params_82571(struct e1000_hw *hw);
48STATIC s32 e1000_init_mac_params_82571(struct e1000_hw *hw);
49STATIC s32 e1000_acquire_nvm_82571(struct e1000_hw *hw);
50STATIC void e1000_release_nvm_82571(struct e1000_hw *hw);
51STATIC s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset,
52 u16 words, u16 *data);
53STATIC s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw);
54STATIC s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw);
55STATIC s32 e1000_get_cfg_done_82571(struct e1000_hw *hw);
56STATIC s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw,
40 */
41
42#include "e1000_api.h"
43#include "e1000_82571.h"
44
45void e1000_init_function_pointers_82571(struct e1000_hw *hw);
46
47STATIC s32 e1000_init_phy_params_82571(struct e1000_hw *hw);
48STATIC s32 e1000_init_nvm_params_82571(struct e1000_hw *hw);
49STATIC s32 e1000_init_mac_params_82571(struct e1000_hw *hw);
50STATIC s32 e1000_acquire_nvm_82571(struct e1000_hw *hw);
51STATIC void e1000_release_nvm_82571(struct e1000_hw *hw);
52STATIC s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset,
53 u16 words, u16 *data);
54STATIC s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw);
55STATIC s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw);
56STATIC s32 e1000_get_cfg_done_82571(struct e1000_hw *hw);
57STATIC s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw,
57 boolean_t active);
58 bool active);
58STATIC s32 e1000_reset_hw_82571(struct e1000_hw *hw);
59STATIC s32 e1000_init_hw_82571(struct e1000_hw *hw);
60STATIC void e1000_clear_vfta_82571(struct e1000_hw *hw);
59STATIC s32 e1000_reset_hw_82571(struct e1000_hw *hw);
60STATIC s32 e1000_init_hw_82571(struct e1000_hw *hw);
61STATIC void e1000_clear_vfta_82571(struct e1000_hw *hw);
61STATIC void e1000_mc_addr_list_update_82571(struct e1000_hw *hw,
62STATIC void e1000_update_mc_addr_list_82571(struct e1000_hw *hw,
62 u8 *mc_addr_list, u32 mc_addr_count,
63 u32 rar_used_count, u32 rar_count);
64STATIC s32 e1000_setup_link_82571(struct e1000_hw *hw);
65STATIC s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
66STATIC s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
67STATIC s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data);
68STATIC void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
69static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw);
70static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
71static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
72static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
73static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
74static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
75 u16 words, u16 *data);
63 u8 *mc_addr_list, u32 mc_addr_count,
64 u32 rar_used_count, u32 rar_count);
65STATIC s32 e1000_setup_link_82571(struct e1000_hw *hw);
66STATIC s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
67STATIC s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
68STATIC s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data);
69STATIC void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
70static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw);
71static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
72static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
73static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
74static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
75static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
76 u16 words, u16 *data);
77STATIC s32 e1000_read_mac_addr_82571(struct e1000_hw *hw);
78STATIC void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);
76
77struct e1000_dev_spec_82571 {
79
80struct e1000_dev_spec_82571 {
78 boolean_t laa_is_present;
81 bool laa_is_present;
79};
80
81/**
82 * e1000_init_phy_params_82571 - Init PHY func ptrs.
83 * @hw: pointer to the HW structure
84 *
85 * This is a function pointer entry point called by the api module.
86 **/
82};
83
84/**
85 * e1000_init_phy_params_82571 - Init PHY func ptrs.
86 * @hw: pointer to the HW structure
87 *
88 * This is a function pointer entry point called by the api module.
89 **/
87STATIC s32
88e1000_init_phy_params_82571(struct e1000_hw *hw)
90STATIC s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
89{
90 struct e1000_phy_info *phy = &hw->phy;
91 struct e1000_functions *func = &hw->func;
92 s32 ret_val = E1000_SUCCESS;
93
94 DEBUGFUNC("e1000_init_phy_params_82571");
95
91{
92 struct e1000_phy_info *phy = &hw->phy;
93 struct e1000_functions *func = &hw->func;
94 s32 ret_val = E1000_SUCCESS;
95
96 DEBUGFUNC("e1000_init_phy_params_82571");
97
96 if (hw->media_type != e1000_media_type_copper) {
98 if (hw->phy.media_type != e1000_media_type_copper) {
97 phy->type = e1000_phy_none;
98 goto out;
99 }
100
101 phy->addr = 1;
102 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
103 phy->reset_delay_us = 100;
104
105 func->acquire_phy = e1000_get_hw_semaphore_82571;
106 func->check_polarity = e1000_check_polarity_igp;
107 func->check_reset_block = e1000_check_reset_block_generic;
108 func->release_phy = e1000_put_hw_semaphore_82571;
109 func->reset_phy = e1000_phy_hw_reset_generic;
110 func->set_d0_lplu_state = e1000_set_d0_lplu_state_82571;
111 func->set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
99 phy->type = e1000_phy_none;
100 goto out;
101 }
102
103 phy->addr = 1;
104 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
105 phy->reset_delay_us = 100;
106
107 func->acquire_phy = e1000_get_hw_semaphore_82571;
108 func->check_polarity = e1000_check_polarity_igp;
109 func->check_reset_block = e1000_check_reset_block_generic;
110 func->release_phy = e1000_put_hw_semaphore_82571;
111 func->reset_phy = e1000_phy_hw_reset_generic;
112 func->set_d0_lplu_state = e1000_set_d0_lplu_state_82571;
113 func->set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
114 func->power_up_phy = e1000_power_up_phy_copper;
115 func->power_down_phy = e1000_power_down_phy_copper_82571;
112
113 switch (hw->mac.type) {
114 case e1000_82571:
115 case e1000_82572:
116 phy->type = e1000_phy_igp_2;
117 func->get_cfg_done = e1000_get_cfg_done_82571;
118 func->get_phy_info = e1000_get_phy_info_igp;
119 func->force_speed_duplex = e1000_phy_force_speed_duplex_igp;
120 func->get_cable_length = e1000_get_cable_length_igp_2;
121 func->read_phy_reg = e1000_read_phy_reg_igp;
122 func->write_phy_reg = e1000_write_phy_reg_igp;
116
117 switch (hw->mac.type) {
118 case e1000_82571:
119 case e1000_82572:
120 phy->type = e1000_phy_igp_2;
121 func->get_cfg_done = e1000_get_cfg_done_82571;
122 func->get_phy_info = e1000_get_phy_info_igp;
123 func->force_speed_duplex = e1000_phy_force_speed_duplex_igp;
124 func->get_cable_length = e1000_get_cable_length_igp_2;
125 func->read_phy_reg = e1000_read_phy_reg_igp;
126 func->write_phy_reg = e1000_write_phy_reg_igp;
127
128 /* This uses above function pointers */
129 ret_val = e1000_get_phy_id_82571(hw);
130
131 /* Verify PHY ID */
132 if (phy->id != IGP01E1000_I_PHY_ID) {
133 ret_val = -E1000_ERR_PHY;
134 goto out;
135 }
123 break;
124 case e1000_82573:
125 phy->type = e1000_phy_m88;
126 func->get_cfg_done = e1000_get_cfg_done_generic;
127 func->get_phy_info = e1000_get_phy_info_m88;
128 func->commit_phy = e1000_phy_sw_reset_generic;
129 func->force_speed_duplex = e1000_phy_force_speed_duplex_m88;
130 func->get_cable_length = e1000_get_cable_length_m88;
131 func->read_phy_reg = e1000_read_phy_reg_m88;
132 func->write_phy_reg = e1000_write_phy_reg_m88;
136 break;
137 case e1000_82573:
138 phy->type = e1000_phy_m88;
139 func->get_cfg_done = e1000_get_cfg_done_generic;
140 func->get_phy_info = e1000_get_phy_info_m88;
141 func->commit_phy = e1000_phy_sw_reset_generic;
142 func->force_speed_duplex = e1000_phy_force_speed_duplex_m88;
143 func->get_cable_length = e1000_get_cable_length_m88;
144 func->read_phy_reg = e1000_read_phy_reg_m88;
145 func->write_phy_reg = e1000_write_phy_reg_m88;
133 break;
134 default:
135 ret_val = -E1000_ERR_PHY;
136 goto out;
137 break;
138 }
139
146
140 /* This can only be done after all function pointers are setup. */
141 ret_val = e1000_get_phy_id_82571(hw);
147 /* This uses above function pointers */
148 ret_val = e1000_get_phy_id_82571(hw);
142
149
143 /* Verify phy id */
144 switch (hw->mac.type) {
145 case e1000_82571:
146 case e1000_82572:
147 if (phy->id != IGP01E1000_I_PHY_ID) {
148 ret_val = -E1000_ERR_PHY;
149 goto out;
150 }
151 break;
152 case e1000_82573:
150 /* Verify PHY ID */
153 if (phy->id != M88E1111_I_PHY_ID) {
154 ret_val = -E1000_ERR_PHY;
151 if (phy->id != M88E1111_I_PHY_ID) {
152 ret_val = -E1000_ERR_PHY;
153 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id);
155 goto out;
156 }
157 break;
158 default:
159 ret_val = -E1000_ERR_PHY;
160 goto out;
161 break;
162 }
163
164out:
165 return ret_val;
166}
167
168/**
169 * e1000_init_nvm_params_82571 - Init NVM func ptrs.
170 * @hw: pointer to the HW structure
171 *
172 * This is a function pointer entry point called by the api module.
173 **/
154 goto out;
155 }
156 break;
157 default:
158 ret_val = -E1000_ERR_PHY;
159 goto out;
160 break;
161 }
162
163out:
164 return ret_val;
165}
166
167/**
168 * e1000_init_nvm_params_82571 - Init NVM func ptrs.
169 * @hw: pointer to the HW structure
170 *
171 * This is a function pointer entry point called by the api module.
172 **/
174STATIC s32
175e1000_init_nvm_params_82571(struct e1000_hw *hw)
173STATIC s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
176{
177 struct e1000_nvm_info *nvm = &hw->nvm;
178 struct e1000_functions *func = &hw->func;
179 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
180 u16 size;
181
182 DEBUGFUNC("e1000_init_nvm_params_82571");
183

--- 14 unchanged lines hidden (view full) ---

198 break;
199 }
200
201 switch (hw->mac.type) {
202 case e1000_82573:
203 if (((eecd >> 15) & 0x3) == 0x3) {
204 nvm->type = e1000_nvm_flash_hw;
205 nvm->word_size = 2048;
174{
175 struct e1000_nvm_info *nvm = &hw->nvm;
176 struct e1000_functions *func = &hw->func;
177 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
178 u16 size;
179
180 DEBUGFUNC("e1000_init_nvm_params_82571");
181

--- 14 unchanged lines hidden (view full) ---

196 break;
197 }
198
199 switch (hw->mac.type) {
200 case e1000_82573:
201 if (((eecd >> 15) & 0x3) == 0x3) {
202 nvm->type = e1000_nvm_flash_hw;
203 nvm->word_size = 2048;
206 /* Autonomous Flash update bit must be cleared due
204 /*
205 * Autonomous Flash update bit must be cleared due
207 * to Flash update issue.
208 */
209 eecd &= ~E1000_EECD_AUPDEN;
210 E1000_WRITE_REG(hw, E1000_EECD, eecd);
211 break;
212 }
213 /* Fall Through */
214 default:
215 nvm->type = e1000_nvm_eeprom_spi;
216 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
217 E1000_EECD_SIZE_EX_SHIFT);
206 * to Flash update issue.
207 */
208 eecd &= ~E1000_EECD_AUPDEN;
209 E1000_WRITE_REG(hw, E1000_EECD, eecd);
210 break;
211 }
212 /* Fall Through */
213 default:
214 nvm->type = e1000_nvm_eeprom_spi;
215 size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
216 E1000_EECD_SIZE_EX_SHIFT);
218 /* Added to a constant, "size" becomes the left-shift value
217 /*
218 * Added to a constant, "size" becomes the left-shift value
219 * for setting word_size.
220 */
221 size += NVM_WORD_SIZE_BASE_SHIFT;
219 * for setting word_size.
220 */
221 size += NVM_WORD_SIZE_BASE_SHIFT;
222
223 /* EEPROM access above 16k is unsupported */
224 if (size > 14)
225 size = 14;
222 nvm->word_size = 1 << size;
223 break;
224 }
225
226 /* Function Pointers */
227 func->acquire_nvm = e1000_acquire_nvm_82571;
228 func->read_nvm = (hw->mac.type == e1000_82573)
229 ? e1000_read_nvm_eerd

--- 8 unchanged lines hidden (view full) ---

238}
239
240/**
241 * e1000_init_mac_params_82571 - Init MAC func ptrs.
242 * @hw: pointer to the HW structure
243 *
244 * This is a function pointer entry point called by the api module.
245 **/
226 nvm->word_size = 1 << size;
227 break;
228 }
229
230 /* Function Pointers */
231 func->acquire_nvm = e1000_acquire_nvm_82571;
232 func->read_nvm = (hw->mac.type == e1000_82573)
233 ? e1000_read_nvm_eerd

--- 8 unchanged lines hidden (view full) ---

242}
243
244/**
245 * e1000_init_mac_params_82571 - Init MAC func ptrs.
246 * @hw: pointer to the HW structure
247 *
248 * This is a function pointer entry point called by the api module.
249 **/
246STATIC s32
247e1000_init_mac_params_82571(struct e1000_hw *hw)
250STATIC s32 e1000_init_mac_params_82571(struct e1000_hw *hw)
248{
249 struct e1000_mac_info *mac = &hw->mac;
250 struct e1000_functions *func = &hw->func;
251 s32 ret_val = E1000_SUCCESS;
252
253 DEBUGFUNC("e1000_init_mac_params_82571");
254
255 /* Set media type */
256 switch (hw->device_id) {
257 case E1000_DEV_ID_82571EB_FIBER:
258 case E1000_DEV_ID_82572EI_FIBER:
259 case E1000_DEV_ID_82571EB_QUAD_FIBER:
251{
252 struct e1000_mac_info *mac = &hw->mac;
253 struct e1000_functions *func = &hw->func;
254 s32 ret_val = E1000_SUCCESS;
255
256 DEBUGFUNC("e1000_init_mac_params_82571");
257
258 /* Set media type */
259 switch (hw->device_id) {
260 case E1000_DEV_ID_82571EB_FIBER:
261 case E1000_DEV_ID_82572EI_FIBER:
262 case E1000_DEV_ID_82571EB_QUAD_FIBER:
260 hw->media_type = e1000_media_type_fiber;
263 hw->phy.media_type = e1000_media_type_fiber;
261 break;
262 case E1000_DEV_ID_82571EB_SERDES:
263 case E1000_DEV_ID_82571EB_SERDES_DUAL:
264 case E1000_DEV_ID_82571EB_SERDES_QUAD:
265 case E1000_DEV_ID_82572EI_SERDES:
264 break;
265 case E1000_DEV_ID_82571EB_SERDES:
266 case E1000_DEV_ID_82571EB_SERDES_DUAL:
267 case E1000_DEV_ID_82571EB_SERDES_QUAD:
268 case E1000_DEV_ID_82572EI_SERDES:
266 hw->media_type = e1000_media_type_internal_serdes;
269 hw->phy.media_type = e1000_media_type_internal_serdes;
267 break;
268 default:
270 break;
271 default:
269 hw->media_type = e1000_media_type_copper;
272 hw->phy.media_type = e1000_media_type_copper;
270 break;
271 }
272
273 /* Set mta register count */
274 mac->mta_reg_count = 128;
275 /* Set rar entry count */
276 mac->rar_entry_count = E1000_RAR_ENTRIES;
277 /* Set if part includes ASF firmware */

--- 10 unchanged lines hidden (view full) ---

288 /* reset */
289 func->reset_hw = e1000_reset_hw_82571;
290 /* hw initialization */
291 func->init_hw = e1000_init_hw_82571;
292 /* link setup */
293 func->setup_link = e1000_setup_link_82571;
294 /* physical interface link setup */
295 func->setup_physical_interface =
273 break;
274 }
275
276 /* Set mta register count */
277 mac->mta_reg_count = 128;
278 /* Set rar entry count */
279 mac->rar_entry_count = E1000_RAR_ENTRIES;
280 /* Set if part includes ASF firmware */

--- 10 unchanged lines hidden (view full) ---

291 /* reset */
292 func->reset_hw = e1000_reset_hw_82571;
293 /* hw initialization */
294 func->init_hw = e1000_init_hw_82571;
295 /* link setup */
296 func->setup_link = e1000_setup_link_82571;
297 /* physical interface link setup */
298 func->setup_physical_interface =
296 (hw->media_type == e1000_media_type_copper)
299 (hw->phy.media_type == e1000_media_type_copper)
297 ? e1000_setup_copper_link_82571
298 : e1000_setup_fiber_serdes_link_82571;
299 /* check for link */
300 ? e1000_setup_copper_link_82571
301 : e1000_setup_fiber_serdes_link_82571;
302 /* check for link */
300 switch (hw->media_type) {
303 switch (hw->phy.media_type) {
301 case e1000_media_type_copper:
302 func->check_for_link = e1000_check_for_copper_link_generic;
303 break;
304 case e1000_media_type_fiber:
305 func->check_for_link = e1000_check_for_fiber_link_generic;
306 break;
307 case e1000_media_type_internal_serdes:
308 func->check_for_link = e1000_check_for_serdes_link_generic;
309 break;
310 default:
311 ret_val = -E1000_ERR_CONFIG;
312 goto out;
313 break;
314 }
315 /* check management mode */
316 func->check_mng_mode = e1000_check_mng_mode_generic;
317 /* multicast address update */
304 case e1000_media_type_copper:
305 func->check_for_link = e1000_check_for_copper_link_generic;
306 break;
307 case e1000_media_type_fiber:
308 func->check_for_link = e1000_check_for_fiber_link_generic;
309 break;
310 case e1000_media_type_internal_serdes:
311 func->check_for_link = e1000_check_for_serdes_link_generic;
312 break;
313 default:
314 ret_val = -E1000_ERR_CONFIG;
315 goto out;
316 break;
317 }
318 /* check management mode */
319 func->check_mng_mode = e1000_check_mng_mode_generic;
320 /* multicast address update */
318 func->mc_addr_list_update = e1000_mc_addr_list_update_82571;
321 func->update_mc_addr_list = e1000_update_mc_addr_list_82571;
319 /* writing VFTA */
320 func->write_vfta = e1000_write_vfta_generic;
321 /* clearing VFTA */
322 func->clear_vfta = e1000_clear_vfta_82571;
323 /* setting MTA */
324 func->mta_set = e1000_mta_set_generic;
322 /* writing VFTA */
323 func->write_vfta = e1000_write_vfta_generic;
324 /* clearing VFTA */
325 func->clear_vfta = e1000_clear_vfta_82571;
326 /* setting MTA */
327 func->mta_set = e1000_mta_set_generic;
328 /* read mac address */
329 func->read_mac_addr = e1000_read_mac_addr_82571;
325 /* blink LED */
326 func->blink_led = e1000_blink_led_generic;
327 /* setup LED */
328 func->setup_led = e1000_setup_led_generic;
329 /* cleanup LED */
330 func->cleanup_led = e1000_cleanup_led_generic;
331 /* turn on/off LED */
332 func->led_on = e1000_led_on_generic;
333 func->led_off = e1000_led_off_generic;
334 /* remove device */
335 func->remove_device = e1000_remove_device_generic;
336 /* clear hardware counters */
337 func->clear_hw_cntrs = e1000_clear_hw_cntrs_82571;
338 /* link info */
339 func->get_link_up_info =
330 /* blink LED */
331 func->blink_led = e1000_blink_led_generic;
332 /* setup LED */
333 func->setup_led = e1000_setup_led_generic;
334 /* cleanup LED */
335 func->cleanup_led = e1000_cleanup_led_generic;
336 /* turn on/off LED */
337 func->led_on = e1000_led_on_generic;
338 func->led_off = e1000_led_off_generic;
339 /* remove device */
340 func->remove_device = e1000_remove_device_generic;
341 /* clear hardware counters */
342 func->clear_hw_cntrs = e1000_clear_hw_cntrs_82571;
343 /* link info */
344 func->get_link_up_info =
340 (hw->media_type == e1000_media_type_copper)
345 (hw->phy.media_type == e1000_media_type_copper)
341 ? e1000_get_speed_and_duplex_copper_generic
342 : e1000_get_speed_and_duplex_fiber_serdes_generic;
343
344 hw->dev_spec_size = sizeof(struct e1000_dev_spec_82571);
345
346 /* Device-specific structure allocation */
347 ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
348
349out:
350 return ret_val;
351}
352
353/**
354 * e1000_init_function_pointers_82571 - Init func ptrs.
355 * @hw: pointer to the HW structure
356 *
357 * The only function explicitly called by the api module to initialize
358 * all function pointers and parameters.
359 **/
346 ? e1000_get_speed_and_duplex_copper_generic
347 : e1000_get_speed_and_duplex_fiber_serdes_generic;
348
349 hw->dev_spec_size = sizeof(struct e1000_dev_spec_82571);
350
351 /* Device-specific structure allocation */
352 ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
353
354out:
355 return ret_val;
356}
357
358/**
359 * e1000_init_function_pointers_82571 - Init func ptrs.
360 * @hw: pointer to the HW structure
361 *
362 * The only function explicitly called by the api module to initialize
363 * all function pointers and parameters.
364 **/
360void
361e1000_init_function_pointers_82571(struct e1000_hw *hw)
365void e1000_init_function_pointers_82571(struct e1000_hw *hw)
362{
363 DEBUGFUNC("e1000_init_function_pointers_82571");
364
365 hw->func.init_mac_params = e1000_init_mac_params_82571;
366 hw->func.init_nvm_params = e1000_init_nvm_params_82571;
367 hw->func.init_phy_params = e1000_init_phy_params_82571;
368}
369
370/**
371 * e1000_get_phy_id_82571 - Retrieve the PHY ID and revision
372 * @hw: pointer to the HW structure
373 *
374 * Reads the PHY registers and stores the PHY ID and possibly the PHY
375 * revision in the hardware structure.
376 **/
366{
367 DEBUGFUNC("e1000_init_function_pointers_82571");
368
369 hw->func.init_mac_params = e1000_init_mac_params_82571;
370 hw->func.init_nvm_params = e1000_init_nvm_params_82571;
371 hw->func.init_phy_params = e1000_init_phy_params_82571;
372}
373
374/**
375 * e1000_get_phy_id_82571 - Retrieve the PHY ID and revision
376 * @hw: pointer to the HW structure
377 *
378 * Reads the PHY registers and stores the PHY ID and possibly the PHY
379 * revision in the hardware structure.
380 **/
377static s32
378e1000_get_phy_id_82571(struct e1000_hw *hw)
381static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
379{
380 struct e1000_phy_info *phy = &hw->phy;
381 s32 ret_val = E1000_SUCCESS;
382
383 DEBUGFUNC("e1000_get_phy_id_82571");
384
385 switch (hw->mac.type) {
386 case e1000_82571:
387 case e1000_82572:
382{
383 struct e1000_phy_info *phy = &hw->phy;
384 s32 ret_val = E1000_SUCCESS;
385
386 DEBUGFUNC("e1000_get_phy_id_82571");
387
388 switch (hw->mac.type) {
389 case e1000_82571:
390 case e1000_82572:
388 /* The 82571 firmware may still be configuring the PHY.
391 /*
392 * The 82571 firmware may still be configuring the PHY.
389 * In this case, we cannot access the PHY until the
390 * configuration is done. So we explicitly set the
393 * In this case, we cannot access the PHY until the
394 * configuration is done. So we explicitly set the
391 * PHY ID. */
395 * PHY ID.
396 */
392 phy->id = IGP01E1000_I_PHY_ID;
393 break;
394 case e1000_82573:
395 ret_val = e1000_get_phy_id(hw);
396 break;
397 default:
398 ret_val = -E1000_ERR_PHY;
399 break;
400 }
401
402 return ret_val;
403}
404
405/**
406 * e1000_get_hw_semaphore_82571 - Acquire hardware semaphore
407 * @hw: pointer to the HW structure
408 *
409 * Acquire the HW semaphore to access the PHY or NVM
410 **/
397 phy->id = IGP01E1000_I_PHY_ID;
398 break;
399 case e1000_82573:
400 ret_val = e1000_get_phy_id(hw);
401 break;
402 default:
403 ret_val = -E1000_ERR_PHY;
404 break;
405 }
406
407 return ret_val;
408}
409
410/**
411 * e1000_get_hw_semaphore_82571 - Acquire hardware semaphore
412 * @hw: pointer to the HW structure
413 *
414 * Acquire the HW semaphore to access the PHY or NVM
415 **/
411s32
412e1000_get_hw_semaphore_82571(struct e1000_hw *hw)
416s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)
413{
414 u32 swsm;
415 s32 ret_val = E1000_SUCCESS;
416 s32 timeout = hw->nvm.word_size + 1;
417 s32 i = 0;
418
419 DEBUGFUNC("e1000_get_hw_semaphore_82571");
420

--- 22 unchanged lines hidden (view full) ---

443}
444
445/**
446 * e1000_put_hw_semaphore_82571 - Release hardware semaphore
447 * @hw: pointer to the HW structure
448 *
449 * Release hardware semaphore used to access the PHY or NVM
450 **/
417{
418 u32 swsm;
419 s32 ret_val = E1000_SUCCESS;
420 s32 timeout = hw->nvm.word_size + 1;
421 s32 i = 0;
422
423 DEBUGFUNC("e1000_get_hw_semaphore_82571");
424

--- 22 unchanged lines hidden (view full) ---

447}
448
449/**
450 * e1000_put_hw_semaphore_82571 - Release hardware semaphore
451 * @hw: pointer to the HW structure
452 *
453 * Release hardware semaphore used to access the PHY or NVM
454 **/
451void
452e1000_put_hw_semaphore_82571(struct e1000_hw *hw)
455void e1000_put_hw_semaphore_82571(struct e1000_hw *hw)
453{
454 u32 swsm;
455
456 DEBUGFUNC("e1000_put_hw_semaphore_82571");
457
458 swsm = E1000_READ_REG(hw, E1000_SWSM);
459
460 swsm &= ~E1000_SWSM_SWESMBI;

--- 5 unchanged lines hidden (view full) ---

466 * e1000_acquire_nvm_82571 - Request for access to the EEPROM
467 * @hw: pointer to the HW structure
468 *
469 * To gain access to the EEPROM, first we must obtain a hardware semaphore.
470 * Then for non-82573 hardware, set the EEPROM access request bit and wait
471 * for EEPROM access grant bit. If the access grant bit is not set, release
472 * hardware semaphore.
473 **/
456{
457 u32 swsm;
458
459 DEBUGFUNC("e1000_put_hw_semaphore_82571");
460
461 swsm = E1000_READ_REG(hw, E1000_SWSM);
462
463 swsm &= ~E1000_SWSM_SWESMBI;

--- 5 unchanged lines hidden (view full) ---

469 * e1000_acquire_nvm_82571 - Request for access to the EEPROM
470 * @hw: pointer to the HW structure
471 *
472 * To gain access to the EEPROM, first we must obtain a hardware semaphore.
473 * Then for non-82573 hardware, set the EEPROM access request bit and wait
474 * for EEPROM access grant bit. If the access grant bit is not set, release
475 * hardware semaphore.
476 **/
474STATIC s32
475e1000_acquire_nvm_82571(struct e1000_hw *hw)
477STATIC s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)
476{
477 s32 ret_val;
478
479 DEBUGFUNC("e1000_acquire_nvm_82571");
480
481 ret_val = e1000_get_hw_semaphore_82571(hw);
482 if (ret_val)
483 goto out;

--- 9 unchanged lines hidden (view full) ---

493}
494
495/**
496 * e1000_release_nvm_82571 - Release exclusive access to EEPROM
497 * @hw: pointer to the HW structure
498 *
499 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
500 **/
478{
479 s32 ret_val;
480
481 DEBUGFUNC("e1000_acquire_nvm_82571");
482
483 ret_val = e1000_get_hw_semaphore_82571(hw);
484 if (ret_val)
485 goto out;

--- 9 unchanged lines hidden (view full) ---

495}
496
497/**
498 * e1000_release_nvm_82571 - Release exclusive access to EEPROM
499 * @hw: pointer to the HW structure
500 *
501 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
502 **/
501STATIC void
502e1000_release_nvm_82571(struct e1000_hw *hw)
503STATIC void e1000_release_nvm_82571(struct e1000_hw *hw)
503{
504 DEBUGFUNC("e1000_release_nvm_82571");
505
506 e1000_release_nvm_generic(hw);
507 e1000_put_hw_semaphore_82571(hw);
508}
509
510/**
511 * e1000_write_nvm_82571 - Write to EEPROM using appropriate interface
512 * @hw: pointer to the HW structure
513 * @offset: offset within the EEPROM to be written to
514 * @words: number of words to write
515 * @data: 16 bit word(s) to be written to the EEPROM
516 *
517 * For non-82573 silicon, write data to EEPROM at offset using SPI interface.
518 *
519 * If e1000_update_nvm_checksum is not called after this function, the
520 * EEPROM will most likley contain an invalid checksum.
521 **/
504{
505 DEBUGFUNC("e1000_release_nvm_82571");
506
507 e1000_release_nvm_generic(hw);
508 e1000_put_hw_semaphore_82571(hw);
509}
510
511/**
512 * e1000_write_nvm_82571 - Write to EEPROM using appropriate interface
513 * @hw: pointer to the HW structure
514 * @offset: offset within the EEPROM to be written to
515 * @words: number of words to write
516 * @data: 16 bit word(s) to be written to the EEPROM
517 *
518 * For non-82573 silicon, write data to EEPROM at offset using SPI interface.
519 *
520 * If e1000_update_nvm_checksum is not called after this function, the
521 * EEPROM will most likley contain an invalid checksum.
522 **/
522STATIC s32
523e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
523STATIC s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
524 u16 *data)
524{
525 s32 ret_val = E1000_SUCCESS;
526
527 DEBUGFUNC("e1000_write_nvm_82571");
528
529 switch (hw->mac.type) {
530 case e1000_82573:
531 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);

--- 13 unchanged lines hidden (view full) ---

545/**
546 * e1000_update_nvm_checksum_82571 - Update EEPROM checksum
547 * @hw: pointer to the HW structure
548 *
549 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
550 * up to the checksum. Then calculates the EEPROM checksum and writes the
551 * value to the EEPROM.
552 **/
525{
526 s32 ret_val = E1000_SUCCESS;
527
528 DEBUGFUNC("e1000_write_nvm_82571");
529
530 switch (hw->mac.type) {
531 case e1000_82573:
532 ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);

--- 13 unchanged lines hidden (view full) ---

546/**
547 * e1000_update_nvm_checksum_82571 - Update EEPROM checksum
548 * @hw: pointer to the HW structure
549 *
550 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
551 * up to the checksum. Then calculates the EEPROM checksum and writes the
552 * value to the EEPROM.
553 **/
553STATIC s32
554e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
554STATIC s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
555{
556 u32 eecd;
557 s32 ret_val;
558 u16 i;
559
560 DEBUGFUNC("e1000_update_nvm_checksum_82571");
561
562 ret_val = e1000_update_nvm_checksum_generic(hw);
563 if (ret_val)
564 goto out;
565
555{
556 u32 eecd;
557 s32 ret_val;
558 u16 i;
559
560 DEBUGFUNC("e1000_update_nvm_checksum_82571");
561
562 ret_val = e1000_update_nvm_checksum_generic(hw);
563 if (ret_val)
564 goto out;
565
566 /* If our nvm is an EEPROM, then we're done
567 * otherwise, commit the checksum to the flash NVM. */
566 /*
567 * If our nvm is an EEPROM, then we're done
568 * otherwise, commit the checksum to the flash NVM.
569 */
568 if (hw->nvm.type != e1000_nvm_flash_hw)
569 goto out;
570
571 /* Check for pending operations. */
572 for (i = 0; i < E1000_FLASH_UPDATES; i++) {
573 msec_delay(1);
574 if ((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD) == 0)
575 break;
576 }
577
578 if (i == E1000_FLASH_UPDATES) {
579 ret_val = -E1000_ERR_NVM;
580 goto out;
581 }
582
583 /* Reset the firmware if using STM opcode. */
584 if ((E1000_READ_REG(hw, E1000_FLOP) & 0xFF00) == E1000_STM_OPCODE) {
570 if (hw->nvm.type != e1000_nvm_flash_hw)
571 goto out;
572
573 /* Check for pending operations. */
574 for (i = 0; i < E1000_FLASH_UPDATES; i++) {
575 msec_delay(1);
576 if ((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD) == 0)
577 break;
578 }
579
580 if (i == E1000_FLASH_UPDATES) {
581 ret_val = -E1000_ERR_NVM;
582 goto out;
583 }
584
585 /* Reset the firmware if using STM opcode. */
586 if ((E1000_READ_REG(hw, E1000_FLOP) & 0xFF00) == E1000_STM_OPCODE) {
585 /* The enabling of and the actual reset must be done
587 /*
588 * The enabling of and the actual reset must be done
586 * in two write cycles.
587 */
588 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET_ENABLE);
589 E1000_WRITE_FLUSH(hw);
590 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET);
591 }
592
593 /* Commit the write to flash */

--- 17 unchanged lines hidden (view full) ---

611
612/**
613 * e1000_validate_nvm_checksum_82571 - Validate EEPROM checksum
614 * @hw: pointer to the HW structure
615 *
616 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
617 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
618 **/
589 * in two write cycles.
590 */
591 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET_ENABLE);
592 E1000_WRITE_FLUSH(hw);
593 E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET);
594 }
595
596 /* Commit the write to flash */

--- 17 unchanged lines hidden (view full) ---

614
615/**
616 * e1000_validate_nvm_checksum_82571 - Validate EEPROM checksum
617 * @hw: pointer to the HW structure
618 *
619 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
620 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
621 **/
619STATIC s32
620e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)
622STATIC s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)
621{
622 DEBUGFUNC("e1000_validate_nvm_checksum_82571");
623
624 if (hw->nvm.type == e1000_nvm_flash_hw)
625 e1000_fix_nvm_checksum_82571(hw);
626
627 return e1000_validate_nvm_checksum_generic(hw);
628}

--- 7 unchanged lines hidden (view full) ---

636 *
637 * After checking for invalid values, poll the EEPROM to ensure the previous
638 * command has completed before trying to write the next word. After write
639 * poll for completion.
640 *
641 * If e1000_update_nvm_checksum is not called after this function, the
642 * EEPROM will most likley contain an invalid checksum.
643 **/
623{
624 DEBUGFUNC("e1000_validate_nvm_checksum_82571");
625
626 if (hw->nvm.type == e1000_nvm_flash_hw)
627 e1000_fix_nvm_checksum_82571(hw);
628
629 return e1000_validate_nvm_checksum_generic(hw);
630}

--- 7 unchanged lines hidden (view full) ---

638 *
639 * After checking for invalid values, poll the EEPROM to ensure the previous
640 * command has completed before trying to write the next word. After write
641 * poll for completion.
642 *
643 * If e1000_update_nvm_checksum is not called after this function, the
644 * EEPROM will most likley contain an invalid checksum.
645 **/
644static s32
645e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, u16 words,
646 u16 *data)
646static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
647 u16 words, u16 *data)
647{
648 struct e1000_nvm_info *nvm = &hw->nvm;
649 u32 i, eewr = 0;
650 s32 ret_val = 0;
651
652 DEBUGFUNC("e1000_write_nvm_eewr_82571");
653
648{
649 struct e1000_nvm_info *nvm = &hw->nvm;
650 u32 i, eewr = 0;
651 s32 ret_val = 0;
652
653 DEBUGFUNC("e1000_write_nvm_eewr_82571");
654
654 /* A check for invalid values: offset too large, too many words,
655 * and not enough words. */
655 /*
656 * A check for invalid values: offset too large, too many words,
657 * and not enough words.
658 */
656 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
657 (words == 0)) {
658 DEBUGOUT("nvm parameter(s) out of bounds\n");
659 ret_val = -E1000_ERR_NVM;
660 goto out;
661 }
662
663 for (i = 0; i < words; i++) {

--- 17 unchanged lines hidden (view full) ---

681}
682
683/**
684 * e1000_get_cfg_done_82571 - Poll for configuration done
685 * @hw: pointer to the HW structure
686 *
687 * Reads the management control register for the config done bit to be set.
688 **/
659 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
660 (words == 0)) {
661 DEBUGOUT("nvm parameter(s) out of bounds\n");
662 ret_val = -E1000_ERR_NVM;
663 goto out;
664 }
665
666 for (i = 0; i < words; i++) {

--- 17 unchanged lines hidden (view full) ---

684}
685
686/**
687 * e1000_get_cfg_done_82571 - Poll for configuration done
688 * @hw: pointer to the HW structure
689 *
690 * Reads the management control register for the config done bit to be set.
691 **/
689STATIC s32
690e1000_get_cfg_done_82571(struct e1000_hw *hw)
692STATIC s32 e1000_get_cfg_done_82571(struct e1000_hw *hw)
691{
692 s32 timeout = PHY_CFG_TIMEOUT;
693 s32 ret_val = E1000_SUCCESS;
694
695 DEBUGFUNC("e1000_get_cfg_done_82571");
696
697 while (timeout) {
698 if (E1000_READ_REG(hw, E1000_EEMNGCTL) & E1000_NVM_CFG_DONE_PORT_0)

--- 17 unchanged lines hidden (view full) ---

716 * @active: TRUE to enable LPLU, FALSE to disable
717 *
718 * Sets the LPLU D0 state according to the active flag. When activating LPLU
719 * this function also disables smart speed and vice versa. LPLU will not be
720 * activated unless the device autonegotiation advertisement meets standards
721 * of either 10 or 10/100 or 10/100/1000 at all duplexes. This is a function
722 * pointer entry point only called by PHY setup routines.
723 **/
693{
694 s32 timeout = PHY_CFG_TIMEOUT;
695 s32 ret_val = E1000_SUCCESS;
696
697 DEBUGFUNC("e1000_get_cfg_done_82571");
698
699 while (timeout) {
700 if (E1000_READ_REG(hw, E1000_EEMNGCTL) & E1000_NVM_CFG_DONE_PORT_0)

--- 17 unchanged lines hidden (view full) ---

718 * @active: TRUE to enable LPLU, FALSE to disable
719 *
720 * Sets the LPLU D0 state according to the active flag. When activating LPLU
721 * this function also disables smart speed and vice versa. LPLU will not be
722 * activated unless the device autonegotiation advertisement meets standards
723 * of either 10 or 10/100 or 10/100/1000 at all duplexes. This is a function
724 * pointer entry point only called by PHY setup routines.
725 **/
724STATIC s32
725e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, boolean_t active)
726STATIC s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
726{
727 struct e1000_phy_info *phy = &hw->phy;
728 s32 ret_val;
729 u16 data;
730
731 DEBUGFUNC("e1000_set_d0_lplu_state_82571");
732
733 ret_val = e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);

--- 18 unchanged lines hidden (view full) ---

752 data);
753 if (ret_val)
754 goto out;
755 } else {
756 data &= ~IGP02E1000_PM_D0_LPLU;
757 ret_val = e1000_write_phy_reg(hw,
758 IGP02E1000_PHY_POWER_MGMT,
759 data);
727{
728 struct e1000_phy_info *phy = &hw->phy;
729 s32 ret_val;
730 u16 data;
731
732 DEBUGFUNC("e1000_set_d0_lplu_state_82571");
733
734 ret_val = e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);

--- 18 unchanged lines hidden (view full) ---

753 data);
754 if (ret_val)
755 goto out;
756 } else {
757 data &= ~IGP02E1000_PM_D0_LPLU;
758 ret_val = e1000_write_phy_reg(hw,
759 IGP02E1000_PHY_POWER_MGMT,
760 data);
760 /* LPLU and SmartSpeed are mutually exclusive. LPLU is used
761 /*
762 * LPLU and SmartSpeed are mutually exclusive. LPLU is used
761 * during Dx states where the power conservation is most
762 * important. During driver activity we should enable
763 * during Dx states where the power conservation is most
764 * important. During driver activity we should enable
763 * SmartSpeed, so performance is maintained. */
765 * SmartSpeed, so performance is maintained.
766 */
764 if (phy->smart_speed == e1000_smart_speed_on) {
765 ret_val = e1000_read_phy_reg(hw,
766 IGP01E1000_PHY_PORT_CONFIG,
767 &data);
768 if (ret_val)
769 goto out;
770
771 data |= IGP01E1000_PSCFR_SMART_SPEED;

--- 24 unchanged lines hidden (view full) ---

796
797/**
798 * e1000_reset_hw_82571 - Reset hardware
799 * @hw: pointer to the HW structure
800 *
801 * This resets the hardware into a known state. This is a
802 * function pointer entry point called by the api module.
803 **/
767 if (phy->smart_speed == e1000_smart_speed_on) {
768 ret_val = e1000_read_phy_reg(hw,
769 IGP01E1000_PHY_PORT_CONFIG,
770 &data);
771 if (ret_val)
772 goto out;
773
774 data |= IGP01E1000_PSCFR_SMART_SPEED;

--- 24 unchanged lines hidden (view full) ---

799
800/**
801 * e1000_reset_hw_82571 - Reset hardware
802 * @hw: pointer to the HW structure
803 *
804 * This resets the hardware into a known state. This is a
805 * function pointer entry point called by the api module.
806 **/
804STATIC s32
805e1000_reset_hw_82571(struct e1000_hw *hw)
807STATIC s32 e1000_reset_hw_82571(struct e1000_hw *hw)
806{
807 u32 ctrl, extcnf_ctrl, ctrl_ext, icr;
808 s32 ret_val;
809 u16 i = 0;
810
811 DEBUGFUNC("e1000_reset_hw_82571");
812
808{
809 u32 ctrl, extcnf_ctrl, ctrl_ext, icr;
810 s32 ret_val;
811 u16 i = 0;
812
813 DEBUGFUNC("e1000_reset_hw_82571");
814
813 /* Prevent the PCI-E bus from sticking if there is no TLP connection
815 /*
816 * Prevent the PCI-E bus from sticking if there is no TLP connection
814 * on the last TLP read/write transaction when MAC is reset.
815 */
816 ret_val = e1000_disable_pcie_master_generic(hw);
817 if (ret_val) {
818 DEBUGOUT("PCI-E Master disable polling has failed.\n");
819 }
820
821 DEBUGOUT("Masking off all interrupts\n");
822 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
823
824 E1000_WRITE_REG(hw, E1000_RCTL, 0);
825 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
826 E1000_WRITE_FLUSH(hw);
827
828 msec_delay(10);
829
817 * on the last TLP read/write transaction when MAC is reset.
818 */
819 ret_val = e1000_disable_pcie_master_generic(hw);
820 if (ret_val) {
821 DEBUGOUT("PCI-E Master disable polling has failed.\n");
822 }
823
824 DEBUGOUT("Masking off all interrupts\n");
825 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
826
827 E1000_WRITE_REG(hw, E1000_RCTL, 0);
828 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
829 E1000_WRITE_FLUSH(hw);
830
831 msec_delay(10);
832
830 /* Must acquire the MDIO ownership before MAC reset.
831 * Ownership defaults to firmware after a reset. */
833 /*
834 * Must acquire the MDIO ownership before MAC reset.
835 * Ownership defaults to firmware after a reset.
836 */
832 if (hw->mac.type == e1000_82573) {
833 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);
834 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
835
836 do {
837 E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);
838 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);
839

--- 20 unchanged lines hidden (view full) ---

860 E1000_WRITE_FLUSH(hw);
861 }
862
863 ret_val = e1000_get_auto_rd_done_generic(hw);
864 if (ret_val)
865 /* We don't want to continue accessing MAC registers. */
866 goto out;
867
837 if (hw->mac.type == e1000_82573) {
838 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);
839 extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
840
841 do {
842 E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);
843 extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);
844

--- 20 unchanged lines hidden (view full) ---

865 E1000_WRITE_FLUSH(hw);
866 }
867
868 ret_val = e1000_get_auto_rd_done_generic(hw);
869 if (ret_val)
870 /* We don't want to continue accessing MAC registers. */
871 goto out;
872
868 /* Phy configuration from NVM just starts after EECD_AUTO_RD is set.
873 /*
874 * Phy configuration from NVM just starts after EECD_AUTO_RD is set.
869 * Need to wait for Phy configuration completion before accessing
870 * NVM and Phy.
871 */
872 if (hw->mac.type == e1000_82573)
873 msec_delay(25);
874
875 /* Clear any pending interrupt events. */
876 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
877 icr = E1000_READ_REG(hw, E1000_ICR);
878
875 * Need to wait for Phy configuration completion before accessing
876 * NVM and Phy.
877 */
878 if (hw->mac.type == e1000_82573)
879 msec_delay(25);
880
881 /* Clear any pending interrupt events. */
882 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
883 icr = E1000_READ_REG(hw, E1000_ICR);
884
885 if (!(e1000_check_alt_mac_addr_generic(hw)))
886 e1000_set_laa_state_82571(hw, TRUE);
887
879out:
880 return ret_val;
881}
882
883/**
884 * e1000_init_hw_82571 - Initialize hardware
885 * @hw: pointer to the HW structure
886 *
887 * This inits the hardware readying it for operation.
888 **/
888out:
889 return ret_val;
890}
891
892/**
893 * e1000_init_hw_82571 - Initialize hardware
894 * @hw: pointer to the HW structure
895 *
896 * This inits the hardware readying it for operation.
897 **/
889STATIC s32
890e1000_init_hw_82571(struct e1000_hw *hw)
898STATIC s32 e1000_init_hw_82571(struct e1000_hw *hw)
891{
892 struct e1000_mac_info *mac = &hw->mac;
893 u32 reg_data;
894 s32 ret_val;
895 u16 i, rar_count = mac->rar_entry_count;
896
897 DEBUGFUNC("e1000_init_hw_82571");
898
899 e1000_initialize_hw_bits_82571(hw);
900
901 /* Initialize identification LED */
902 ret_val = e1000_id_led_init_generic(hw);
903 if (ret_val) {
904 DEBUGOUT("Error initializing identification LED\n");
899{
900 struct e1000_mac_info *mac = &hw->mac;
901 u32 reg_data;
902 s32 ret_val;
903 u16 i, rar_count = mac->rar_entry_count;
904
905 DEBUGFUNC("e1000_init_hw_82571");
906
907 e1000_initialize_hw_bits_82571(hw);
908
909 /* Initialize identification LED */
910 ret_val = e1000_id_led_init_generic(hw);
911 if (ret_val) {
912 DEBUGOUT("Error initializing identification LED\n");
905 goto out;
913 /* This is not fatal and we should not stop init due to this */
906 }
907
908 /* Disabling VLAN filtering */
909 DEBUGOUT("Initializing the IEEE VLAN\n");
910 e1000_clear_vfta(hw);
911
912 /* Setup the receive address. */
914 }
915
916 /* Disabling VLAN filtering */
917 DEBUGOUT("Initializing the IEEE VLAN\n");
918 e1000_clear_vfta(hw);
919
920 /* Setup the receive address. */
913 /* If, however, a locally administered address was assigned to the
921 /*
922 * If, however, a locally administered address was assigned to the
914 * 82571, we must reserve a RAR for it to work around an issue where
915 * resetting one port will reload the MAC on the other port.
916 */
923 * 82571, we must reserve a RAR for it to work around an issue where
924 * resetting one port will reload the MAC on the other port.
925 */
917 if (e1000_get_laa_state_82571(hw) == TRUE)
926 if (e1000_get_laa_state_82571(hw))
918 rar_count--;
919 e1000_init_rx_addrs_generic(hw, rar_count);
920
921 /* Zero out the Multicast HASH table */
922 DEBUGOUT("Zeroing the MTA\n");
923 for (i = 0; i < mac->mta_reg_count; i++)
924 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
925
926 /* Setup link and flow control */
927 ret_val = e1000_setup_link(hw);
928
929 /* Set the transmit descriptor write-back policy */
927 rar_count--;
928 e1000_init_rx_addrs_generic(hw, rar_count);
929
930 /* Zero out the Multicast HASH table */
931 DEBUGOUT("Zeroing the MTA\n");
932 for (i = 0; i < mac->mta_reg_count; i++)
933 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
934
935 /* Setup link and flow control */
936 ret_val = e1000_setup_link(hw);
937
938 /* Set the transmit descriptor write-back policy */
930 reg_data = E1000_READ_REG(hw, E1000_TXDCTL);
939 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));
931 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
932 E1000_TXDCTL_FULL_TX_DESC_WB |
933 E1000_TXDCTL_COUNT_DESC;
940 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
941 E1000_TXDCTL_FULL_TX_DESC_WB |
942 E1000_TXDCTL_COUNT_DESC;
934 E1000_WRITE_REG(hw, E1000_TXDCTL, reg_data);
943 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);
935
936 /* ...for both queues. */
937 if (mac->type != e1000_82573) {
944
945 /* ...for both queues. */
946 if (mac->type != e1000_82573) {
938 reg_data = E1000_READ_REG(hw, E1000_TXDCTL1);
947 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(1));
939 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
940 E1000_TXDCTL_FULL_TX_DESC_WB |
941 E1000_TXDCTL_COUNT_DESC;
948 reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
949 E1000_TXDCTL_FULL_TX_DESC_WB |
950 E1000_TXDCTL_COUNT_DESC;
942 E1000_WRITE_REG(hw, E1000_TXDCTL1, reg_data);
951 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg_data);
943 } else {
944 e1000_enable_tx_pkt_filtering(hw);
945 reg_data = E1000_READ_REG(hw, E1000_GCR);
946 reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
947 E1000_WRITE_REG(hw, E1000_GCR, reg_data);
948 }
949
952 } else {
953 e1000_enable_tx_pkt_filtering(hw);
954 reg_data = E1000_READ_REG(hw, E1000_GCR);
955 reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
956 E1000_WRITE_REG(hw, E1000_GCR, reg_data);
957 }
958
950 /* Clear all of the statistics registers (clear on read). It is
959 /*
960 * Clear all of the statistics registers (clear on read). It is
951 * important that we do this after we have tried to establish link
952 * because the symbol error count will increment wildly if there
953 * is no link.
954 */
955 e1000_clear_hw_cntrs_82571(hw);
956
961 * important that we do this after we have tried to establish link
962 * because the symbol error count will increment wildly if there
963 * is no link.
964 */
965 e1000_clear_hw_cntrs_82571(hw);
966
957out:
958 return ret_val;
959}
960
961/**
962 * e1000_initialize_hw_bits_82571 - Initialize hardware-dependent bits
963 * @hw: pointer to the HW structure
964 *
965 * Initializes required hardware-dependent bits needed for normal operation.
966 **/
967 return ret_val;
968}
969
970/**
971 * e1000_initialize_hw_bits_82571 - Initialize hardware-dependent bits
972 * @hw: pointer to the HW structure
973 *
974 * Initializes required hardware-dependent bits needed for normal operation.
975 **/
967static void
968e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
976static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
969{
970 u32 reg;
971
972 DEBUGFUNC("e1000_initialize_hw_bits_82571");
973
974 if (hw->mac.disable_hw_init_bits)
975 goto out;
976
977 /* Transmit Descriptor Control 0 */
977{
978 u32 reg;
979
980 DEBUGFUNC("e1000_initialize_hw_bits_82571");
981
982 if (hw->mac.disable_hw_init_bits)
983 goto out;
984
985 /* Transmit Descriptor Control 0 */
978 reg = E1000_READ_REG(hw, E1000_TXDCTL);
986 reg = E1000_READ_REG(hw, E1000_TXDCTL(0));
979 reg |= (1 << 22);
987 reg |= (1 << 22);
980 E1000_WRITE_REG(hw, E1000_TXDCTL, reg);
988 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);
981
982 /* Transmit Descriptor Control 1 */
989
990 /* Transmit Descriptor Control 1 */
983 reg = E1000_READ_REG(hw, E1000_TXDCTL1);
991 reg = E1000_READ_REG(hw, E1000_TXDCTL(1));
984 reg |= (1 << 22);
992 reg |= (1 << 22);
985 E1000_WRITE_REG(hw, E1000_TXDCTL1, reg);
993 E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);
986
987 /* Transmit Arbitration Control 0 */
994
995 /* Transmit Arbitration Control 0 */
988 reg = E1000_READ_REG(hw, E1000_TARC0);
996 reg = E1000_READ_REG(hw, E1000_TARC(0));
989 reg &= ~(0xF << 27); /* 30:27 */
990 switch (hw->mac.type) {
991 case e1000_82571:
992 case e1000_82572:
993 reg |= (1 << 23) | (1 << 24) | (1 << 25) | (1 << 26);
994 break;
995 default:
996 break;
997 }
997 reg &= ~(0xF << 27); /* 30:27 */
998 switch (hw->mac.type) {
999 case e1000_82571:
1000 case e1000_82572:
1001 reg |= (1 << 23) | (1 << 24) | (1 << 25) | (1 << 26);
1002 break;
1003 default:
1004 break;
1005 }
998 E1000_WRITE_REG(hw, E1000_TARC0, reg);
1006 E1000_WRITE_REG(hw, E1000_TARC(0), reg);
999
1000 /* Transmit Arbitration Control 1 */
1007
1008 /* Transmit Arbitration Control 1 */
1001 reg = E1000_READ_REG(hw, E1000_TARC1);
1009 reg = E1000_READ_REG(hw, E1000_TARC(1));
1002 switch (hw->mac.type) {
1003 case e1000_82571:
1004 case e1000_82572:
1005 reg &= ~((1 << 29) | (1 << 30));
1006 reg |= (1 << 22) | (1 << 24) | (1 << 25) | (1 << 26);
1007 if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)
1008 reg &= ~(1 << 28);
1009 else
1010 reg |= (1 << 28);
1010 switch (hw->mac.type) {
1011 case e1000_82571:
1012 case e1000_82572:
1013 reg &= ~((1 << 29) | (1 << 30));
1014 reg |= (1 << 22) | (1 << 24) | (1 << 25) | (1 << 26);
1015 if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)
1016 reg &= ~(1 << 28);
1017 else
1018 reg |= (1 << 28);
1011 E1000_WRITE_REG(hw, E1000_TARC1, reg);
1019 E1000_WRITE_REG(hw, E1000_TARC(1), reg);
1012 break;
1013 default:
1014 break;
1015 }
1016
1017 /* Device Control */
1018 if (hw->mac.type == e1000_82573) {
1019 reg = E1000_READ_REG(hw, E1000_CTRL);

--- 15 unchanged lines hidden (view full) ---

1035
1036/**
1037 * e1000_clear_vfta_82571 - Clear VLAN filter table
1038 * @hw: pointer to the HW structure
1039 *
1040 * Clears the register array which contains the VLAN filter table by
1041 * setting all the values to 0.
1042 **/
1020 break;
1021 default:
1022 break;
1023 }
1024
1025 /* Device Control */
1026 if (hw->mac.type == e1000_82573) {
1027 reg = E1000_READ_REG(hw, E1000_CTRL);

--- 15 unchanged lines hidden (view full) ---

1043
1044/**
1045 * e1000_clear_vfta_82571 - Clear VLAN filter table
1046 * @hw: pointer to the HW structure
1047 *
1048 * Clears the register array which contains the VLAN filter table by
1049 * setting all the values to 0.
1050 **/
1043STATIC void
1044e1000_clear_vfta_82571(struct e1000_hw *hw)
1051STATIC void e1000_clear_vfta_82571(struct e1000_hw *hw)
1045{
1046 u32 offset;
1047 u32 vfta_value = 0;
1048 u32 vfta_offset = 0;
1049 u32 vfta_bit_in_reg = 0;
1050
1051 DEBUGFUNC("e1000_clear_vfta_82571");
1052
1053 if (hw->mac.type == e1000_82573) {
1054 if (hw->mng_cookie.vlan_id != 0) {
1052{
1053 u32 offset;
1054 u32 vfta_value = 0;
1055 u32 vfta_offset = 0;
1056 u32 vfta_bit_in_reg = 0;
1057
1058 DEBUGFUNC("e1000_clear_vfta_82571");
1059
1060 if (hw->mac.type == e1000_82573) {
1061 if (hw->mng_cookie.vlan_id != 0) {
1055 /* The VFTA is a 4096b bit-field, each identifying
1062 /*
1063 * The VFTA is a 4096b bit-field, each identifying
1056 * a single VLAN ID. The following operations
1057 * determine which 32b entry (i.e. offset) into the
1058 * array we want to set the VLAN ID (i.e. bit) of
1059 * the manageability unit.
1060 */
1061 vfta_offset = (hw->mng_cookie.vlan_id >>
1062 E1000_VFTA_ENTRY_SHIFT) &
1063 E1000_VFTA_ENTRY_MASK;
1064 vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id &
1065 E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
1066 }
1067 }
1068 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
1064 * a single VLAN ID. The following operations
1065 * determine which 32b entry (i.e. offset) into the
1066 * array we want to set the VLAN ID (i.e. bit) of
1067 * the manageability unit.
1068 */
1069 vfta_offset = (hw->mng_cookie.vlan_id >>
1070 E1000_VFTA_ENTRY_SHIFT) &
1071 E1000_VFTA_ENTRY_MASK;
1072 vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id &
1073 E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
1074 }
1075 }
1076 for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
1069 /* If the offset we want to clear is the same offset of the
1077 /*
1078 * If the offset we want to clear is the same offset of the
1070 * manageability VLAN ID, then clear all bits except that of
1071 * the manageability unit.
1072 */
1073 vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
1074 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value);
1075 E1000_WRITE_FLUSH(hw);
1076 }
1077}
1078
1079/**
1079 * manageability VLAN ID, then clear all bits except that of
1080 * the manageability unit.
1081 */
1082 vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
1083 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value);
1084 E1000_WRITE_FLUSH(hw);
1085 }
1086}
1087
1088/**
1080 * e1000_mc_addr_list_update_82571 - Update Multicast addresses
1089 * e1000_update_mc_addr_list_82571 - Update Multicast addresses
1081 * @hw: pointer to the HW structure
1082 * @mc_addr_list: array of multicast addresses to program
1083 * @mc_addr_count: number of multicast addresses to program
1084 * @rar_used_count: the first RAR register free to program
1085 * @rar_count: total number of supported Receive Address Registers
1086 *
1087 * Updates the Receive Address Registers and Multicast Table Array.
1088 * The caller must have a packed mc_addr_list of multicast addresses.
1089 * The parameter rar_count will usually be hw->mac.rar_entry_count
1090 * unless there are workarounds that change this.
1091 **/
1090 * @hw: pointer to the HW structure
1091 * @mc_addr_list: array of multicast addresses to program
1092 * @mc_addr_count: number of multicast addresses to program
1093 * @rar_used_count: the first RAR register free to program
1094 * @rar_count: total number of supported Receive Address Registers
1095 *
1096 * Updates the Receive Address Registers and Multicast Table Array.
1097 * The caller must have a packed mc_addr_list of multicast addresses.
1098 * The parameter rar_count will usually be hw->mac.rar_entry_count
1099 * unless there are workarounds that change this.
1100 **/
1092STATIC void
1093e1000_mc_addr_list_update_82571(struct e1000_hw *hw,
1094 u8 *mc_addr_list, u32 mc_addr_count,
1095 u32 rar_used_count, u32 rar_count)
1101STATIC void e1000_update_mc_addr_list_82571(struct e1000_hw *hw,
1102 u8 *mc_addr_list, u32 mc_addr_count,
1103 u32 rar_used_count, u32 rar_count)
1096{
1104{
1097 DEBUGFUNC("e1000_mc_addr_list_update_82571");
1105 DEBUGFUNC("e1000_update_mc_addr_list_82571");
1098
1099 if (e1000_get_laa_state_82571(hw))
1100 rar_count--;
1101
1106
1107 if (e1000_get_laa_state_82571(hw))
1108 rar_count--;
1109
1102 e1000_mc_addr_list_update_generic(hw, mc_addr_list, mc_addr_count,
1110 e1000_update_mc_addr_list_generic(hw, mc_addr_list, mc_addr_count,
1103 rar_used_count, rar_count);
1104}
1105
1106/**
1107 * e1000_setup_link_82571 - Setup flow control and link settings
1108 * @hw: pointer to the HW structure
1109 *
1110 * Determines which flow control settings to use, then configures flow
1111 * control. Calls the appropriate media-specific link configuration
1112 * function. Assuming the adapter has a valid link partner, a valid link
1113 * should be established. Assumes the hardware has previously been reset
1114 * and the transmitter and receiver are not enabled.
1115 **/
1111 rar_used_count, rar_count);
1112}
1113
1114/**
1115 * e1000_setup_link_82571 - Setup flow control and link settings
1116 * @hw: pointer to the HW structure
1117 *
1118 * Determines which flow control settings to use, then configures flow
1119 * control. Calls the appropriate media-specific link configuration
1120 * function. Assuming the adapter has a valid link partner, a valid link
1121 * should be established. Assumes the hardware has previously been reset
1122 * and the transmitter and receiver are not enabled.
1123 **/
1116STATIC s32
1117e1000_setup_link_82571(struct e1000_hw *hw)
1124STATIC s32 e1000_setup_link_82571(struct e1000_hw *hw)
1118{
1119 DEBUGFUNC("e1000_setup_link_82571");
1120
1125{
1126 DEBUGFUNC("e1000_setup_link_82571");
1127
1121 /* 82573 does not have a word in the NVM to determine
1128 /*
1129 * 82573 does not have a word in the NVM to determine
1122 * the default flow control setting, so we explicitly
1123 * set it to full.
1124 */
1125 if (hw->mac.type == e1000_82573)
1130 * the default flow control setting, so we explicitly
1131 * set it to full.
1132 */
1133 if (hw->mac.type == e1000_82573)
1126 hw->mac.fc = e1000_fc_full;
1134 hw->fc.type = e1000_fc_full;
1127
1128 return e1000_setup_link_generic(hw);
1129}
1130
1131/**
1132 * e1000_setup_copper_link_82571 - Configure copper link settings
1133 * @hw: pointer to the HW structure
1134 *
1135 * Configures the link for auto-neg or forced speed and duplex. Then we check
1136 * for link, once link is established calls to configure collision distance
1137 * and flow control are called.
1138 **/
1135
1136 return e1000_setup_link_generic(hw);
1137}
1138
1139/**
1140 * e1000_setup_copper_link_82571 - Configure copper link settings
1141 * @hw: pointer to the HW structure
1142 *
1143 * Configures the link for auto-neg or forced speed and duplex. Then we check
1144 * for link, once link is established calls to configure collision distance
1145 * and flow control are called.
1146 **/
1139STATIC s32
1140e1000_setup_copper_link_82571(struct e1000_hw *hw)
1147STATIC s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
1141{
1142 u32 ctrl, led_ctrl;
1143 s32 ret_val;
1144
1145 DEBUGFUNC("e1000_setup_copper_link_82571");
1146
1147 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1148 ctrl |= E1000_CTRL_SLU;

--- 28 unchanged lines hidden (view full) ---

1177
1178/**
1179 * e1000_setup_fiber_serdes_link_82571 - Setup link for fiber/serdes
1180 * @hw: pointer to the HW structure
1181 *
1182 * Configures collision distance and flow control for fiber and serdes links.
1183 * Upon successful setup, poll for link.
1184 **/
1148{
1149 u32 ctrl, led_ctrl;
1150 s32 ret_val;
1151
1152 DEBUGFUNC("e1000_setup_copper_link_82571");
1153
1154 ctrl = E1000_READ_REG(hw, E1000_CTRL);
1155 ctrl |= E1000_CTRL_SLU;

--- 28 unchanged lines hidden (view full) ---

1184
1185/**
1186 * e1000_setup_fiber_serdes_link_82571 - Setup link for fiber/serdes
1187 * @hw: pointer to the HW structure
1188 *
1189 * Configures collision distance and flow control for fiber and serdes links.
1190 * Upon successful setup, poll for link.
1191 **/
1185STATIC s32
1186e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
1192STATIC s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
1187{
1188 DEBUGFUNC("e1000_setup_fiber_serdes_link_82571");
1189
1190 switch (hw->mac.type) {
1191 case e1000_82571:
1192 case e1000_82572:
1193{
1194 DEBUGFUNC("e1000_setup_fiber_serdes_link_82571");
1195
1196 switch (hw->mac.type) {
1197 case e1000_82571:
1198 case e1000_82572:
1193 /* If SerDes loopback mode is entered, there is no form
1199 /*
1200 * If SerDes loopback mode is entered, there is no form
1194 * of reset to take the adapter out of that mode. So we
1195 * have to explicitly take the adapter out of loopback
1196 * mode. This prevents drivers from twidling their thumbs
1197 * if another tool failed to take it out of loopback mode.
1198 */
1199 E1000_WRITE_REG(hw, E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
1200 break;
1201 default:

--- 6 unchanged lines hidden (view full) ---

1208/**
1209 * e1000_valid_led_default_82571 - Verify a valid default LED config
1210 * @hw: pointer to the HW structure
1211 * @data: pointer to the NVM (EEPROM)
1212 *
1213 * Read the EEPROM for the current default LED configuration. If the
1214 * LED configuration is not valid, set to a valid LED configuration.
1215 **/
1201 * of reset to take the adapter out of that mode. So we
1202 * have to explicitly take the adapter out of loopback
1203 * mode. This prevents drivers from twidling their thumbs
1204 * if another tool failed to take it out of loopback mode.
1205 */
1206 E1000_WRITE_REG(hw, E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
1207 break;
1208 default:

--- 6 unchanged lines hidden (view full) ---

1215/**
1216 * e1000_valid_led_default_82571 - Verify a valid default LED config
1217 * @hw: pointer to the HW structure
1218 * @data: pointer to the NVM (EEPROM)
1219 *
1220 * Read the EEPROM for the current default LED configuration. If the
1221 * LED configuration is not valid, set to a valid LED configuration.
1222 **/
1216STATIC s32
1217e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
1223STATIC s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
1218{
1219 s32 ret_val;
1220
1221 DEBUGFUNC("e1000_valid_led_default_82571");
1222
1223 ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
1224 if (ret_val) {
1225 DEBUGOUT("NVM Read Error\n");
1226 goto out;
1227 }
1228
1229 if (hw->mac.type == e1000_82573 &&
1230 *data == ID_LED_RESERVED_F746)
1231 *data = ID_LED_DEFAULT_82573;
1232 else if (*data == ID_LED_RESERVED_0000 ||
1233 *data == ID_LED_RESERVED_FFFF)
1234 *data = ID_LED_DEFAULT;
1224{
1225 s32 ret_val;
1226
1227 DEBUGFUNC("e1000_valid_led_default_82571");
1228
1229 ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
1230 if (ret_val) {
1231 DEBUGOUT("NVM Read Error\n");
1232 goto out;
1233 }
1234
1235 if (hw->mac.type == e1000_82573 &&
1236 *data == ID_LED_RESERVED_F746)
1237 *data = ID_LED_DEFAULT_82573;
1238 else if (*data == ID_LED_RESERVED_0000 ||
1239 *data == ID_LED_RESERVED_FFFF)
1240 *data = ID_LED_DEFAULT;
1235
1236out:
1237 return ret_val;
1238}
1239
1240/**
1241 * e1000_get_laa_state_82571 - Get locally administered address state
1242 * @hw: pointer to the HW structure
1243 *
1244 * Retrieve and return the current locally administed address state.
1245 **/
1241out:
1242 return ret_val;
1243}
1244
1245/**
1246 * e1000_get_laa_state_82571 - Get locally administered address state
1247 * @hw: pointer to the HW structure
1248 *
1249 * Retrieve and return the current locally administed address state.
1250 **/
1246boolean_t
1247e1000_get_laa_state_82571(struct e1000_hw *hw)
1251bool e1000_get_laa_state_82571(struct e1000_hw *hw)
1248{
1249 struct e1000_dev_spec_82571 *dev_spec;
1252{
1253 struct e1000_dev_spec_82571 *dev_spec;
1250 boolean_t state = FALSE;
1254 bool state = FALSE;
1251
1252 DEBUGFUNC("e1000_get_laa_state_82571");
1253
1254 if (hw->mac.type != e1000_82571)
1255 goto out;
1256
1257 dev_spec = (struct e1000_dev_spec_82571 *)hw->dev_spec;
1258

--- 5 unchanged lines hidden (view full) ---

1264
1265/**
1266 * e1000_set_laa_state_82571 - Set locally administered address state
1267 * @hw: pointer to the HW structure
1268 * @state: enable/disable locally administered address
1269 *
1270 * Enable/Disable the current locally administed address state.
1271 **/
1255
1256 DEBUGFUNC("e1000_get_laa_state_82571");
1257
1258 if (hw->mac.type != e1000_82571)
1259 goto out;
1260
1261 dev_spec = (struct e1000_dev_spec_82571 *)hw->dev_spec;
1262

--- 5 unchanged lines hidden (view full) ---

1268
1269/**
1270 * e1000_set_laa_state_82571 - Set locally administered address state
1271 * @hw: pointer to the HW structure
1272 * @state: enable/disable locally administered address
1273 *
1274 * Enable/Disable the current locally administed address state.
1275 **/
1272void
1273e1000_set_laa_state_82571(struct e1000_hw *hw, boolean_t state)
1276void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state)
1274{
1275 struct e1000_dev_spec_82571 *dev_spec;
1276
1277 DEBUGFUNC("e1000_set_laa_state_82571");
1278
1279 if (hw->mac.type != e1000_82571)
1280 goto out;
1281
1282 dev_spec = (struct e1000_dev_spec_82571 *)hw->dev_spec;
1283
1284 dev_spec->laa_is_present = state;
1285
1286 /* If workaround is activated... */
1277{
1278 struct e1000_dev_spec_82571 *dev_spec;
1279
1280 DEBUGFUNC("e1000_set_laa_state_82571");
1281
1282 if (hw->mac.type != e1000_82571)
1283 goto out;
1284
1285 dev_spec = (struct e1000_dev_spec_82571 *)hw->dev_spec;
1286
1287 dev_spec->laa_is_present = state;
1288
1289 /* If workaround is activated... */
1287 if (state == TRUE) {
1288 /* Hold a copy of the LAA in RAR[14] This is done so that
1290 if (state) {
1291 /*
1292 * Hold a copy of the LAA in RAR[14] This is done so that
1289 * between the time RAR[0] gets clobbered and the time it
1290 * gets fixed, the actual LAA is in one of the RARs and no
1291 * incoming packets directed to this port are dropped.
1292 * Eventually the LAA will be in RAR[0] and RAR[14].
1293 */
1294 e1000_rar_set_generic(hw, hw->mac.addr,
1295 hw->mac.rar_entry_count - 1);
1296 }

--- 7 unchanged lines hidden (view full) ---

1304 * @hw: pointer to the HW structure
1305 *
1306 * Verifies that the EEPROM has completed the update. After updating the
1307 * EEPROM, we need to check bit 15 in work 0x23 for the checksum fix. If
1308 * the checksum fix is not implemented, we need to set the bit and update
1309 * the checksum. Otherwise, if bit 15 is set and the checksum is incorrect,
1310 * we need to return bad checksum.
1311 **/
1293 * between the time RAR[0] gets clobbered and the time it
1294 * gets fixed, the actual LAA is in one of the RARs and no
1295 * incoming packets directed to this port are dropped.
1296 * Eventually the LAA will be in RAR[0] and RAR[14].
1297 */
1298 e1000_rar_set_generic(hw, hw->mac.addr,
1299 hw->mac.rar_entry_count - 1);
1300 }

--- 7 unchanged lines hidden (view full) ---

1308 * @hw: pointer to the HW structure
1309 *
1310 * Verifies that the EEPROM has completed the update. After updating the
1311 * EEPROM, we need to check bit 15 in work 0x23 for the checksum fix. If
1312 * the checksum fix is not implemented, we need to set the bit and update
1313 * the checksum. Otherwise, if bit 15 is set and the checksum is incorrect,
1314 * we need to return bad checksum.
1315 **/
1312static s32
1313e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
1316static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
1314{
1315 struct e1000_nvm_info *nvm = &hw->nvm;
1316 s32 ret_val = E1000_SUCCESS;
1317 u16 data;
1318
1319 DEBUGFUNC("e1000_fix_nvm_checksum_82571");
1320
1321 if (nvm->type != e1000_nvm_flash_hw)
1322 goto out;
1323
1317{
1318 struct e1000_nvm_info *nvm = &hw->nvm;
1319 s32 ret_val = E1000_SUCCESS;
1320 u16 data;
1321
1322 DEBUGFUNC("e1000_fix_nvm_checksum_82571");
1323
1324 if (nvm->type != e1000_nvm_flash_hw)
1325 goto out;
1326
1324 /* Check bit 4 of word 10h. If it is 0, firmware is done updating
1327 /*
1328 * Check bit 4 of word 10h. If it is 0, firmware is done updating
1325 * 10h-12h. Checksum may need to be fixed.
1326 */
1327 ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
1328 if (ret_val)
1329 goto out;
1330
1331 if (!(data & 0x10)) {
1329 * 10h-12h. Checksum may need to be fixed.
1330 */
1331 ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
1332 if (ret_val)
1333 goto out;
1334
1335 if (!(data & 0x10)) {
1332 /* Read 0x23 and check bit 15. This bit is a 1
1336 /*
1337 * Read 0x23 and check bit 15. This bit is a 1
1333 * when the checksum has already been fixed. If
1334 * the checksum is still wrong and this bit is a
1335 * 1, we need to return bad checksum. Otherwise,
1336 * we need to set this bit to a 1 and update the
1337 * checksum.
1338 */
1339 ret_val = e1000_read_nvm(hw, 0x23, 1, &data);
1340 if (ret_val)

--- 8 unchanged lines hidden (view full) ---

1349 }
1350 }
1351
1352out:
1353 return ret_val;
1354}
1355
1356/**
1338 * when the checksum has already been fixed. If
1339 * the checksum is still wrong and this bit is a
1340 * 1, we need to return bad checksum. Otherwise,
1341 * we need to set this bit to a 1 and update the
1342 * checksum.
1343 */
1344 ret_val = e1000_read_nvm(hw, 0x23, 1, &data);
1345 if (ret_val)

--- 8 unchanged lines hidden (view full) ---

1354 }
1355 }
1356
1357out:
1358 return ret_val;
1359}
1360
1361/**
1362 * e1000_read_mac_addr_82571 - Read device MAC address
1363 * @hw: pointer to the HW structure
1364 **/
1365STATIC s32 e1000_read_mac_addr_82571(struct e1000_hw *hw)
1366{
1367 s32 ret_val = E1000_SUCCESS;
1368
1369 DEBUGFUNC("e1000_read_mac_addr_82571");
1370 if (e1000_check_alt_mac_addr_generic(hw))
1371 ret_val = e1000_read_mac_addr_generic(hw);
1372
1373 return ret_val;
1374}
1375
1376/**
1377 * e1000_power_down_phy_copper_82571 - Remove link during PHY power down
1378 * @hw: pointer to the HW structure
1379 *
1380 * In the case of a PHY power down to save power, or to turn off link during a
1381 * driver unload, or wake on lan is not enabled, remove the link.
1382 **/
1383STATIC void e1000_power_down_phy_copper_82571(struct e1000_hw *hw)
1384{
1385 /* If the management interface is not enabled, then power down */
1386 if (!(e1000_check_mng_mode(hw) || e1000_check_reset_block(hw)))
1387 e1000_power_down_phy_copper(hw);
1388
1389 return;
1390}
1391
1392/**
1357 * e1000_clear_hw_cntrs_82571 - Clear device specific hardware counters
1358 * @hw: pointer to the HW structure
1359 *
1360 * Clears the hardware counters by reading the counter registers.
1361 **/
1393 * e1000_clear_hw_cntrs_82571 - Clear device specific hardware counters
1394 * @hw: pointer to the HW structure
1395 *
1396 * Clears the hardware counters by reading the counter registers.
1397 **/
1362STATIC void
1363e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
1398STATIC void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
1364{
1365 volatile u32 temp;
1366
1367 DEBUGFUNC("e1000_clear_hw_cntrs_82571");
1368
1369 e1000_clear_hw_cntrs_base_generic(hw);
1399{
1400 volatile u32 temp;
1401
1402 DEBUGFUNC("e1000_clear_hw_cntrs_82571");
1403
1404 e1000_clear_hw_cntrs_base_generic(hw);
1370
1371 temp = E1000_READ_REG(hw, E1000_PRC64);
1372 temp = E1000_READ_REG(hw, E1000_PRC127);
1373 temp = E1000_READ_REG(hw, E1000_PRC255);
1374 temp = E1000_READ_REG(hw, E1000_PRC511);
1375 temp = E1000_READ_REG(hw, E1000_PRC1023);
1376 temp = E1000_READ_REG(hw, E1000_PRC1522);
1377 temp = E1000_READ_REG(hw, E1000_PTC64);
1378 temp = E1000_READ_REG(hw, E1000_PTC127);

--- 27 unchanged lines hidden --- 		1405 temp = E1000_READ_REG(hw, E1000_PRC64);
1406 temp = E1000_READ_REG(hw, E1000_PRC127);
1407 temp = E1000_READ_REG(hw, E1000_PRC255);
1408 temp = E1000_READ_REG(hw, E1000_PRC511);
1409 temp = E1000_READ_REG(hw, E1000_PRC1023);
1410 temp = E1000_READ_REG(hw, E1000_PRC1522);
1411 temp = E1000_READ_REG(hw, E1000_PTC64);
1412 temp = E1000_READ_REG(hw, E1000_PTC127);

--- 27 unchanged lines hidden ---