| e1000_82543.c (218588) | e1000_82543.c (228386) |
|---|---|
| 1/****************************************************************************** 2 | 1/****************************************************************************** 2 |
| 3 Copyright (c) 2001-2010, Intel Corporation | 3 Copyright (c) 2001-2011, Intel Corporation |
| 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 --- 13 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ | 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 --- 13 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
| 33/*$FreeBSD: head/sys/dev/e1000/e1000_82543.c 218588 2011-02-12 00:07:40Z jfv $*/ | 33/*$FreeBSD: head/sys/dev/e1000/e1000_82543.c 228386 2011-12-10 06:55:02Z jfv $*/ |
| 34 35/* 36 * 82543GC Gigabit Ethernet Controller (Fiber) 37 * 82543GC Gigabit Ethernet Controller (Copper) 38 * 82544EI Gigabit Ethernet Controller (Copper) 39 * 82544EI Gigabit Ethernet Controller (Fiber) 40 * 82544GC Gigabit Ethernet Controller (Copper) 41 * 82544GC Gigabit Ethernet Controller (LOM) --- 854 unchanged lines hidden (view full) --- 896/** 897 * e1000_reset_hw_82543 - Reset hardware 898 * @hw: pointer to the HW structure 899 * 900 * This resets the hardware into a known state. 901 **/ 902static s32 e1000_reset_hw_82543(struct e1000_hw *hw) 903{ | 34 35/* 36 * 82543GC Gigabit Ethernet Controller (Fiber) 37 * 82543GC Gigabit Ethernet Controller (Copper) 38 * 82544EI Gigabit Ethernet Controller (Copper) 39 * 82544EI Gigabit Ethernet Controller (Fiber) 40 * 82544GC Gigabit Ethernet Controller (Copper) 41 * 82544GC Gigabit Ethernet Controller (LOM) --- 854 unchanged lines hidden (view full) --- 896/** 897 * e1000_reset_hw_82543 - Reset hardware 898 * @hw: pointer to the HW structure 899 * 900 * This resets the hardware into a known state. 901 **/ 902static s32 e1000_reset_hw_82543(struct e1000_hw *hw) 903{ |
| 904 u32 ctrl; | 904 u32 ctrl, icr; |
| 905 s32 ret_val = E1000_SUCCESS; 906 907 DEBUGFUNC("e1000_reset_hw_82543"); 908 909 DEBUGOUT("Masking off all interrupts\n"); 910 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); 911 912 E1000_WRITE_REG(hw, E1000_RCTL, 0); --- 25 unchanged lines hidden (view full) --- 938 * After MAC reset, force reload of NVM to restore power-on 939 * settings to device. 940 */ 941 hw->nvm.ops.reload(hw); 942 msec_delay(2); 943 944 /* Masking off and clearing any pending interrupts */ 945 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); | 905 s32 ret_val = E1000_SUCCESS; 906 907 DEBUGFUNC("e1000_reset_hw_82543"); 908 909 DEBUGOUT("Masking off all interrupts\n"); 910 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); 911 912 E1000_WRITE_REG(hw, E1000_RCTL, 0); --- 25 unchanged lines hidden (view full) --- 938 * After MAC reset, force reload of NVM to restore power-on 939 * settings to device. 940 */ 941 hw->nvm.ops.reload(hw); 942 msec_delay(2); 943 944 /* Masking off and clearing any pending interrupts */ 945 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); |
| 946 E1000_READ_REG(hw, E1000_ICR); | 946 icr = E1000_READ_REG(hw, E1000_ICR); |
| 947 948 return ret_val; 949} 950 951/** 952 * e1000_init_hw_82543 - Initialize hardware 953 * @hw: pointer to the HW structure 954 * --- 119 unchanged lines hidden (view full) --- 1074 * PHY to take it out of reset. 1075 */ 1076 if (hw->mac.type == e1000_82543) { 1077 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1078 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 1079 ret_val = hw->phy.ops.reset(hw); 1080 if (ret_val) 1081 goto out; | 947 948 return ret_val; 949} 950 951/** 952 * e1000_init_hw_82543 - Initialize hardware 953 * @hw: pointer to the HW structure 954 * --- 119 unchanged lines hidden (view full) --- 1074 * PHY to take it out of reset. 1075 */ 1076 if (hw->mac.type == e1000_82543) { 1077 ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1078 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 1079 ret_val = hw->phy.ops.reset(hw); 1080 if (ret_val) 1081 goto out; |
| 1082 hw->phy.reset_disable = FALSE; | |
| 1083 } else { 1084 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1085 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 1086 } 1087 1088 /* Set MDI/MDI-X, Polarity Reversal, and downshift settings */ 1089 ret_val = e1000_copper_link_setup_m88(hw); 1090 if (ret_val) --- 512 unchanged lines hidden --- | 1082 } else { 1083 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); 1084 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); 1085 } 1086 1087 /* Set MDI/MDI-X, Polarity Reversal, and downshift settings */ 1088 ret_val = e1000_copper_link_setup_m88(hw); 1089 if (ret_val) --- 512 unchanged lines hidden --- |