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e1000_82540.c (218588) e1000_82540.c (228386)
1/******************************************************************************
2
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
3 Copyright (c) 2001-2011, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

--- 13 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

--- 13 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/e1000_82540.c 218588 2011-02-12 00:07:40Z jfv $*/
33/*$FreeBSD: head/sys/dev/e1000/e1000_82540.c 228386 2011-12-10 06:55:02Z jfv $*/
34
35/*
36 * 82540EM Gigabit Ethernet Controller
37 * 82540EP Gigabit Ethernet Controller
38 * 82545EM Gigabit Ethernet Controller (Copper)
39 * 82545EM Gigabit Ethernet Controller (Fiber)
40 * 82545GM Gigabit Ethernet Controller
41 * 82546EB Gigabit Ethernet Controller (Copper)

--- 21 unchanged lines hidden (view full) ---

63 * e1000_init_phy_params_82540 - Init PHY func ptrs.
64 * @hw: pointer to the HW structure
65 **/
66static s32 e1000_init_phy_params_82540(struct e1000_hw *hw)
67{
68 struct e1000_phy_info *phy = &hw->phy;
69 s32 ret_val = E1000_SUCCESS;
70
34
35/*
36 * 82540EM Gigabit Ethernet Controller
37 * 82540EP Gigabit Ethernet Controller
38 * 82545EM Gigabit Ethernet Controller (Copper)
39 * 82545EM Gigabit Ethernet Controller (Fiber)
40 * 82545GM Gigabit Ethernet Controller
41 * 82546EB Gigabit Ethernet Controller (Copper)

--- 21 unchanged lines hidden (view full) ---

63 * e1000_init_phy_params_82540 - Init PHY func ptrs.
64 * @hw: pointer to the HW structure
65 **/
66static s32 e1000_init_phy_params_82540(struct e1000_hw *hw)
67{
68 struct e1000_phy_info *phy = &hw->phy;
69 s32 ret_val = E1000_SUCCESS;
70
71 phy->addr = 1;
72 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
73 phy->reset_delay_us = 10000;
74 phy->type = e1000_phy_m88;
71 phy->addr = 1;
72 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
73 phy->reset_delay_us = 10000;
74 phy->type = e1000_phy_m88;
75
76 /* Function Pointers */
75
76 /* Function Pointers */
77 phy->ops.check_polarity = e1000_check_polarity_m88;
78 phy->ops.commit = e1000_phy_sw_reset_generic;
79 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
80 phy->ops.get_cable_length = e1000_get_cable_length_m88;
81 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
82 phy->ops.read_reg = e1000_read_phy_reg_m88;
83 phy->ops.reset = e1000_phy_hw_reset_generic;
84 phy->ops.write_reg = e1000_write_phy_reg_m88;
85 phy->ops.get_info = e1000_get_phy_info_m88;
86 phy->ops.power_up = e1000_power_up_phy_copper;
87 phy->ops.power_down = e1000_power_down_phy_copper_82540;
77 phy->ops.check_polarity = e1000_check_polarity_m88;
78 phy->ops.commit = e1000_phy_sw_reset_generic;
79 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
80 phy->ops.get_cable_length = e1000_get_cable_length_m88;
81 phy->ops.get_cfg_done = e1000_get_cfg_done_generic;
82 phy->ops.read_reg = e1000_read_phy_reg_m88;
83 phy->ops.reset = e1000_phy_hw_reset_generic;
84 phy->ops.write_reg = e1000_write_phy_reg_m88;
85 phy->ops.get_info = e1000_get_phy_info_m88;
86 phy->ops.power_up = e1000_power_up_phy_copper;
87 phy->ops.power_down = e1000_power_down_phy_copper_82540;
88
89 ret_val = e1000_get_phy_id(hw);
90 if (ret_val)
91 goto out;
92
93 /* Verify phy id */
94 switch (hw->mac.type) {
95 case e1000_82540:

--- 20 unchanged lines hidden (view full) ---

116 **/
117static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)
118{
119 struct e1000_nvm_info *nvm = &hw->nvm;
120 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
121
122 DEBUGFUNC("e1000_init_nvm_params_82540");
123
88
89 ret_val = e1000_get_phy_id(hw);
90 if (ret_val)
91 goto out;
92
93 /* Verify phy id */
94 switch (hw->mac.type) {
95 case e1000_82540:

--- 20 unchanged lines hidden (view full) ---

116 **/
117static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)
118{
119 struct e1000_nvm_info *nvm = &hw->nvm;
120 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
121
122 DEBUGFUNC("e1000_init_nvm_params_82540");
123
124 nvm->type = e1000_nvm_eeprom_microwire;
125 nvm->delay_usec = 50;
126 nvm->opcode_bits = 3;
124 nvm->type = e1000_nvm_eeprom_microwire;
125 nvm->delay_usec = 50;
126 nvm->opcode_bits = 3;
127 switch (nvm->override) {
128 case e1000_nvm_override_microwire_large:
127 switch (nvm->override) {
128 case e1000_nvm_override_microwire_large:
129 nvm->address_bits = 8;
130 nvm->word_size = 256;
129 nvm->address_bits = 8;
130 nvm->word_size = 256;
131 break;
132 case e1000_nvm_override_microwire_small:
131 break;
132 case e1000_nvm_override_microwire_small:
133 nvm->address_bits = 6;
134 nvm->word_size = 64;
133 nvm->address_bits = 6;
134 nvm->word_size = 64;
135 break;
136 default:
135 break;
136 default:
137 nvm->address_bits = eecd & E1000_EECD_SIZE ? 8 : 6;
138 nvm->word_size = eecd & E1000_EECD_SIZE ? 256 : 64;
137 nvm->address_bits = eecd & E1000_EECD_SIZE ? 8 : 6;
138 nvm->word_size = eecd & E1000_EECD_SIZE ? 256 : 64;
139 break;
140 }
141
142 /* Function Pointers */
139 break;
140 }
141
142 /* Function Pointers */
143 nvm->ops.acquire = e1000_acquire_nvm_generic;
144 nvm->ops.read = e1000_read_nvm_microwire;
145 nvm->ops.release = e1000_release_nvm_generic;
146 nvm->ops.update = e1000_update_nvm_checksum_generic;
147 nvm->ops.valid_led_default = e1000_valid_led_default_generic;
148 nvm->ops.validate = e1000_validate_nvm_checksum_generic;
149 nvm->ops.write = e1000_write_nvm_microwire;
143 nvm->ops.acquire = e1000_acquire_nvm_generic;
144 nvm->ops.read = e1000_read_nvm_microwire;
145 nvm->ops.release = e1000_release_nvm_generic;
146 nvm->ops.update = e1000_update_nvm_checksum_generic;
147 nvm->ops.valid_led_default = e1000_valid_led_default_generic;
148 nvm->ops.validate = e1000_validate_nvm_checksum_generic;
149 nvm->ops.write = e1000_write_nvm_microwire;
150
151 return E1000_SUCCESS;
152}
153
154/**
155 * e1000_init_mac_params_82540 - Init MAC func ptrs.
156 * @hw: pointer to the HW structure
157 **/

--- 35 unchanged lines hidden (view full) ---

193 /* reset */
194 mac->ops.reset_hw = e1000_reset_hw_82540;
195 /* hw initialization */
196 mac->ops.init_hw = e1000_init_hw_82540;
197 /* link setup */
198 mac->ops.setup_link = e1000_setup_link_generic;
199 /* physical interface setup */
200 mac->ops.setup_physical_interface =
150
151 return E1000_SUCCESS;
152}
153
154/**
155 * e1000_init_mac_params_82540 - Init MAC func ptrs.
156 * @hw: pointer to the HW structure
157 **/

--- 35 unchanged lines hidden (view full) ---

193 /* reset */
194 mac->ops.reset_hw = e1000_reset_hw_82540;
195 /* hw initialization */
196 mac->ops.init_hw = e1000_init_hw_82540;
197 /* link setup */
198 mac->ops.setup_link = e1000_setup_link_generic;
199 /* physical interface setup */
200 mac->ops.setup_physical_interface =
201 (hw->phy.media_type == e1000_media_type_copper)
202 ? e1000_setup_copper_link_82540
203 : e1000_setup_fiber_serdes_link_82540;
201 (hw->phy.media_type == e1000_media_type_copper)
202 ? e1000_setup_copper_link_82540
203 : e1000_setup_fiber_serdes_link_82540;
204 /* check for link */
205 switch (hw->phy.media_type) {
206 case e1000_media_type_copper:
207 mac->ops.check_for_link = e1000_check_for_copper_link_generic;
208 break;
209 case e1000_media_type_fiber:
210 mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
211 break;
212 case e1000_media_type_internal_serdes:
213 mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
214 break;
215 default:
216 ret_val = -E1000_ERR_CONFIG;
217 goto out;
218 break;
219 }
220 /* link info */
221 mac->ops.get_link_up_info =
204 /* check for link */
205 switch (hw->phy.media_type) {
206 case e1000_media_type_copper:
207 mac->ops.check_for_link = e1000_check_for_copper_link_generic;
208 break;
209 case e1000_media_type_fiber:
210 mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
211 break;
212 case e1000_media_type_internal_serdes:
213 mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
214 break;
215 default:
216 ret_val = -E1000_ERR_CONFIG;
217 goto out;
218 break;
219 }
220 /* link info */
221 mac->ops.get_link_up_info =
222 (hw->phy.media_type == e1000_media_type_copper)
223 ? e1000_get_speed_and_duplex_copper_generic
224 : e1000_get_speed_and_duplex_fiber_serdes_generic;
222 (hw->phy.media_type == e1000_media_type_copper)
223 ? e1000_get_speed_and_duplex_copper_generic
224 : e1000_get_speed_and_duplex_fiber_serdes_generic;
225 /* multicast address update */
226 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
227 /* writing VFTA */
228 mac->ops.write_vfta = e1000_write_vfta_generic;
229 /* clearing VFTA */
230 mac->ops.clear_vfta = e1000_clear_vfta_generic;
231 /* read mac address */
232 mac->ops.read_mac_addr = e1000_read_mac_addr_82540;

--- 136 unchanged lines hidden (view full) ---

369 if (mac->type < e1000_82545_rev_3)
370 e1000_pcix_mmrbc_workaround_generic(hw);
371
372 /* Setup link and flow control */
373 ret_val = mac->ops.setup_link(hw);
374
375 txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
376 txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
225 /* multicast address update */
226 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
227 /* writing VFTA */
228 mac->ops.write_vfta = e1000_write_vfta_generic;
229 /* clearing VFTA */
230 mac->ops.clear_vfta = e1000_clear_vfta_generic;
231 /* read mac address */
232 mac->ops.read_mac_addr = e1000_read_mac_addr_82540;

--- 136 unchanged lines hidden (view full) ---

369 if (mac->type < e1000_82545_rev_3)
370 e1000_pcix_mmrbc_workaround_generic(hw);
371
372 /* Setup link and flow control */
373 ret_val = mac->ops.setup_link(hw);
374
375 txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
376 txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
377 E1000_TXDCTL_FULL_TX_DESC_WB;
377 E1000_TXDCTL_FULL_TX_DESC_WB;
378 E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
379
380 /*
381 * Clear all of the statistics registers (clear on read). It is
382 * important that we do this after we have tried to establish link
383 * because the symbol error count will increment wildly if there
384 * is no link.
385 */

--- 36 unchanged lines hidden (view full) ---

422 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
423
424 ret_val = e1000_set_phy_mode_82540(hw);
425 if (ret_val)
426 goto out;
427
428 if (hw->mac.type == e1000_82545_rev_3 ||
429 hw->mac.type == e1000_82546_rev_3) {
378 E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
379
380 /*
381 * Clear all of the statistics registers (clear on read). It is
382 * important that we do this after we have tried to establish link
383 * because the symbol error count will increment wildly if there
384 * is no link.
385 */

--- 36 unchanged lines hidden (view full) ---

422 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
423
424 ret_val = e1000_set_phy_mode_82540(hw);
425 if (ret_val)
426 goto out;
427
428 if (hw->mac.type == e1000_82545_rev_3 ||
429 hw->mac.type == e1000_82546_rev_3) {
430 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &data);
430 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,
431 &data);
431 if (ret_val)
432 goto out;
433 data |= 0x00000008;
432 if (ret_val)
433 goto out;
434 data |= 0x00000008;
434 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, data);
435 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,
436 data);
435 if (ret_val)
436 goto out;
437 }
438
439 ret_val = e1000_copper_link_setup_m88(hw);
440 if (ret_val)
441 goto out;
442

--- 60 unchanged lines hidden (view full) ---

503
504 ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
505 if (ret_val)
506 goto out;
507
508 if (nvm_data != NVM_RESERVED_WORD) {
509 /* Adjust serdes output amplitude only. */
510 nvm_data &= NVM_SERDES_AMPLITUDE_MASK;
437 if (ret_val)
438 goto out;
439 }
440
441 ret_val = e1000_copper_link_setup_m88(hw);
442 if (ret_val)
443 goto out;
444

--- 60 unchanged lines hidden (view full) ---

505
506 ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
507 if (ret_val)
508 goto out;
509
510 if (nvm_data != NVM_RESERVED_WORD) {
511 /* Adjust serdes output amplitude only. */
512 nvm_data &= NVM_SERDES_AMPLITUDE_MASK;
511 ret_val = hw->phy.ops.write_reg(hw,
512 M88E1000_PHY_EXT_CTRL,
513 nvm_data);
513 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL,
514 nvm_data);
514 if (ret_val)
515 goto out;
516 }
517
518out:
519 return ret_val;
520}
521

--- 8 unchanged lines hidden (view full) ---

530 s32 ret_val = E1000_SUCCESS;
531 u16 default_page = 0;
532 u16 phy_data;
533
534 DEBUGFUNC("e1000_set_vco_speed_82540");
535
536 /* Set PHY register 30, page 5, bit 8 to 0 */
537
515 if (ret_val)
516 goto out;
517 }
518
519out:
520 return ret_val;
521}
522

--- 8 unchanged lines hidden (view full) ---

531 s32 ret_val = E1000_SUCCESS;
532 u16 default_page = 0;
533 u16 phy_data;
534
535 DEBUGFUNC("e1000_set_vco_speed_82540");
536
537 /* Set PHY register 30, page 5, bit 8 to 0 */
538
538 ret_val = hw->phy.ops.read_reg(hw,
539 M88E1000_PHY_PAGE_SELECT,
540 &default_page);
539 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT,
540 &default_page);
541 if (ret_val)
542 goto out;
543
544 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
545 if (ret_val)
546 goto out;
547
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);

--- 16 unchanged lines hidden (view full) ---

565 goto out;
566
567 phy_data |= M88E1000_PHY_VCO_REG_BIT11;
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
569 if (ret_val)
570 goto out;
571
572 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
541 if (ret_val)
542 goto out;
543
544 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
545 if (ret_val)
546 goto out;
547
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);

--- 16 unchanged lines hidden (view full) ---

565 goto out;
566
567 phy_data |= M88E1000_PHY_VCO_REG_BIT11;
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
569 if (ret_val)
570 goto out;
571
572 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
573 default_page);
573 default_page);
574
575out:
576 return ret_val;
577}
578
579/**
580 * e1000_set_phy_mode_82540 - Set PHY to class A mode
581 * @hw: pointer to the HW structure
582 *
583 * Sets the PHY to class A mode and assumes the following operations will
584 * follow to enable the new class mode:
585 * 1. Do a PHY soft reset.
586 * 2. Restart auto-negotiation or force link.
587 **/
588static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)
589{
574
575out:
576 return ret_val;
577}
578
579/**
580 * e1000_set_phy_mode_82540 - Set PHY to class A mode
581 * @hw: pointer to the HW structure
582 *
583 * Sets the PHY to class A mode and assumes the following operations will
584 * follow to enable the new class mode:
585 * 1. Do a PHY soft reset.
586 * 2. Restart auto-negotiation or force link.
587 **/
588static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)
589{
590 struct e1000_phy_info *phy = &hw->phy;
591 s32 ret_val = E1000_SUCCESS;
592 u16 nvm_data;
593
594 DEBUGFUNC("e1000_set_phy_mode_82540");
595
596 if (hw->mac.type != e1000_82545_rev_3)
597 goto out;
598
599 ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
600 if (ret_val) {
601 ret_val = -E1000_ERR_PHY;
602 goto out;
603 }
604
605 if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) {
606 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
590 s32 ret_val = E1000_SUCCESS;
591 u16 nvm_data;
592
593 DEBUGFUNC("e1000_set_phy_mode_82540");
594
595 if (hw->mac.type != e1000_82545_rev_3)
596 goto out;
597
598 ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
599 if (ret_val) {
600 ret_val = -E1000_ERR_PHY;
601 goto out;
602 }
603
604 if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) {
605 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
607 0x000B);
606 0x000B);
608 if (ret_val) {
609 ret_val = -E1000_ERR_PHY;
610 goto out;
611 }
607 if (ret_val) {
608 ret_val = -E1000_ERR_PHY;
609 goto out;
610 }
612 ret_val = hw->phy.ops.write_reg(hw,
613 M88E1000_PHY_GEN_CONTROL,
614 0x8104);
611 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL,
612 0x8104);
615 if (ret_val) {
616 ret_val = -E1000_ERR_PHY;
617 goto out;
618 }
619
613 if (ret_val) {
614 ret_val = -E1000_ERR_PHY;
615 goto out;
616 }
617
620 phy->reset_disable = FALSE;
621 }
622
623out:
624 return ret_val;
625}
626
627/**
628 * e1000_power_down_phy_copper_82540 - Remove link in case of PHY power down

--- 93 unchanged lines hidden --- 		618 }
619
620out:
621 return ret_val;
622}
623
624/**
625 * e1000_power_down_phy_copper_82540 - Remove link in case of PHY power down

--- 93 unchanged lines hidden ---