| e1000_80003es2lan.c (287990) | e1000_80003es2lan.c (295323) |
|---|---|
| 1/****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ | 1/****************************************************************************** 2 3 Copyright (c) 2001-2015, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 --- 16 unchanged lines hidden (view full) --- 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ |
| 33/*$FreeBSD: head/sys/dev/e1000/e1000_80003es2lan.c 287990 2015-09-19 18:22:59Z sbruno $*/ | 33/*$FreeBSD: head/sys/dev/e1000/e1000_80003es2lan.c 295323 2016-02-05 17:14:37Z erj $*/ |
| 34 35/* 80003ES2LAN Gigabit Ethernet Controller (Copper) 36 * 80003ES2LAN Gigabit Ethernet Controller (Serdes) 37 */ 38 39#include "e1000_api.h" 40 41static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw); --- 804 unchanged lines hidden (view full) --- 846 if (ret_val) 847 return ret_val; 848 849 DEBUGOUT("Issuing a global reset to MAC\n"); 850 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); 851 e1000_release_phy_80003es2lan(hw); 852 853 /* Disable IBIST slave mode (far-end loopback) */ | 34 35/* 80003ES2LAN Gigabit Ethernet Controller (Copper) 36 * 80003ES2LAN Gigabit Ethernet Controller (Serdes) 37 */ 38 39#include "e1000_api.h" 40 41static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw); --- 804 unchanged lines hidden (view full) --- 846 if (ret_val) 847 return ret_val; 848 849 DEBUGOUT("Issuing a global reset to MAC\n"); 850 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); 851 e1000_release_phy_80003es2lan(hw); 852 853 /* Disable IBIST slave mode (far-end loopback) */ |
| 854 e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, 855 &kum_reg_data); 856 kum_reg_data |= E1000_KMRNCTRLSTA_IBIST_DISABLE; 857 e1000_write_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, 858 kum_reg_data); | 854 ret_val = e1000_read_kmrn_reg_80003es2lan(hw, 855 E1000_KMRNCTRLSTA_INBAND_PARAM, &kum_reg_data); 856 if (!ret_val) { 857 kum_reg_data |= E1000_KMRNCTRLSTA_IBIST_DISABLE; 858 ret_val = e1000_write_kmrn_reg_80003es2lan(hw, 859 E1000_KMRNCTRLSTA_INBAND_PARAM, 860 kum_reg_data); 861 if (ret_val) 862 DEBUGOUT("Error disabling far-end loopback\n"); 863 } else 864 DEBUGOUT("Error disabling far-end loopback\n"); |
| 859 860 ret_val = e1000_get_auto_rd_done_generic(hw); 861 if (ret_val) 862 /* We don't want to continue accessing MAC registers. */ 863 return ret_val; 864 865 /* Clear any pending interrupt events. */ 866 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); --- 39 unchanged lines hidden (view full) --- 906 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); 907 908 /* Setup link and flow control */ 909 ret_val = mac->ops.setup_link(hw); 910 if (ret_val) 911 return ret_val; 912 913 /* Disable IBIST slave mode (far-end loopback) */ | 865 866 ret_val = e1000_get_auto_rd_done_generic(hw); 867 if (ret_val) 868 /* We don't want to continue accessing MAC registers. */ 869 return ret_val; 870 871 /* Clear any pending interrupt events. */ 872 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff); --- 39 unchanged lines hidden (view full) --- 912 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); 913 914 /* Setup link and flow control */ 915 ret_val = mac->ops.setup_link(hw); 916 if (ret_val) 917 return ret_val; 918 919 /* Disable IBIST slave mode (far-end loopback) */ |
| 914 e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, 915 &kum_reg_data); 916 kum_reg_data |= E1000_KMRNCTRLSTA_IBIST_DISABLE; 917 e1000_write_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, 918 kum_reg_data); | 920 ret_val = 921 e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, 922 &kum_reg_data); 923 if (!ret_val) { 924 kum_reg_data |= E1000_KMRNCTRLSTA_IBIST_DISABLE; 925 ret_val = e1000_write_kmrn_reg_80003es2lan(hw, 926 E1000_KMRNCTRLSTA_INBAND_PARAM, 927 kum_reg_data); 928 if (ret_val) 929 DEBUGOUT("Error disabling far-end loopback\n"); 930 } else 931 DEBUGOUT("Error disabling far-end loopback\n"); |
| 919 920 /* Set the transmit descriptor write-back policy */ 921 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0)); 922 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | 923 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC); 924 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data); 925 926 /* ...for both queues. */ --- 587 unchanged lines hidden --- | 932 933 /* Set the transmit descriptor write-back policy */ 934 reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0)); 935 reg_data = ((reg_data & ~E1000_TXDCTL_WTHRESH) | 936 E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC); 937 E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data); 938 939 /* ...for both queues. */ --- 587 unchanged lines hidden --- |