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radeon_ioc32.c (254885) radeon_ioc32.c (265262)
1/**
2 * \file radeon_ioc32.c
3 *
4 * 32-bit ioctl compatibility routines for the Radeon DRM.
5 *
6 * \author Paul Mackerras <paulus@samba.org>
7 *
8 * Copyright (C) Paul Mackerras 2005

--- 15 unchanged lines hidden (view full) ---

24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
26 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 * IN THE SOFTWARE.
29 */
30
31#include <sys/cdefs.h>
1/**
2 * \file radeon_ioc32.c
3 *
4 * 32-bit ioctl compatibility routines for the Radeon DRM.
5 *
6 * \author Paul Mackerras <paulus@samba.org>
7 *
8 * Copyright (C) Paul Mackerras 2005

--- 15 unchanged lines hidden (view full) ---

24 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
26 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
27 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 * IN THE SOFTWARE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/dev/drm2/radeon/radeon_ioc32.c 254885 2013-08-25 19:37:15Z dumbbell $");
32__FBSDID("$FreeBSD: head/sys/dev/drm2/radeon/radeon_ioc32.c 265262 2014-05-03 11:23:10Z dumbbell $");
33
33
34#include <linux/compat.h>
34#include "opt_compat.h"
35
35
36#include <drm/drmP.h>
37#include <drm/radeon_drm.h>
36#ifdef COMPAT_FREEBSD32
37
38#include <dev/drm2/drmP.h>
39#include <dev/drm2/drm.h>
40#include <dev/drm2/radeon/radeon_drm.h>
38#include "radeon_drv.h"
39
40typedef struct drm_radeon_init32 {
41 int func;
42 u32 sarea_priv_offset;
43 int is_pci;
44 int cp_mode;
45 int gart_size;

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55 u32 fb_offset;
56 u32 mmio_offset;
57 u32 ring_offset;
58 u32 ring_rptr_offset;
59 u32 buffers_offset;
60 u32 gart_textures_offset;
61} drm_radeon_init32_t;
62
41#include "radeon_drv.h"
42
43typedef struct drm_radeon_init32 {
44 int func;
45 u32 sarea_priv_offset;
46 int is_pci;
47 int cp_mode;
48 int gart_size;

--- 9 unchanged lines hidden (view full) ---

58 u32 fb_offset;
59 u32 mmio_offset;
60 u32 ring_offset;
61 u32 ring_rptr_offset;
62 u32 buffers_offset;
63 u32 gart_textures_offset;
64} drm_radeon_init32_t;
65
63static int compat_radeon_cp_init(struct file *file, unsigned int cmd,
64 unsigned long arg)
66static int compat_radeon_cp_init(struct drm_device *dev, void *arg,
67 struct drm_file *file_priv)
65{
68{
66 drm_radeon_init32_t init32;
67 drm_radeon_init_t __user *init;
69 drm_radeon_init32_t *init32;
70 drm_radeon_init_t __user init;
68
71
69 if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
70 return -EFAULT;
72 init32 = arg;
71
73
72 init = compat_alloc_user_space(sizeof(*init));
73 if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
74 || __put_user(init32.func, &init->func)
75 || __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
76 || __put_user(init32.is_pci, &init->is_pci)
77 || __put_user(init32.cp_mode, &init->cp_mode)
78 || __put_user(init32.gart_size, &init->gart_size)
79 || __put_user(init32.ring_size, &init->ring_size)
80 || __put_user(init32.usec_timeout, &init->usec_timeout)
81 || __put_user(init32.fb_bpp, &init->fb_bpp)
82 || __put_user(init32.front_offset, &init->front_offset)
83 || __put_user(init32.front_pitch, &init->front_pitch)
84 || __put_user(init32.back_offset, &init->back_offset)
85 || __put_user(init32.back_pitch, &init->back_pitch)
86 || __put_user(init32.depth_bpp, &init->depth_bpp)
87 || __put_user(init32.depth_offset, &init->depth_offset)
88 || __put_user(init32.depth_pitch, &init->depth_pitch)
89 || __put_user(init32.fb_offset, &init->fb_offset)
90 || __put_user(init32.mmio_offset, &init->mmio_offset)
91 || __put_user(init32.ring_offset, &init->ring_offset)
92 || __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset)
93 || __put_user(init32.buffers_offset, &init->buffers_offset)
94 || __put_user(init32.gart_textures_offset,
95 &init->gart_textures_offset))
96 return -EFAULT;
74 init.func = init32->func;
75 init.sarea_priv_offset = (unsigned long)init32->sarea_priv_offset;
76 init.is_pci = init32->is_pci;
77 init.cp_mode = init32->cp_mode;
78 init.gart_size = init32->gart_size;
79 init.ring_size = init32->ring_size;
80 init.usec_timeout = init32->usec_timeout;
81 init.fb_bpp = init32->fb_bpp;
82 init.front_offset = init32->front_offset;
83 init.front_pitch = init32->front_pitch;
84 init.back_offset = init32->back_offset;
85 init.back_pitch = init32->back_pitch;
86 init.depth_bpp = init32->depth_bpp;
87 init.depth_offset = init32->depth_offset;
88 init.depth_pitch = init32->depth_pitch;
89 init.fb_offset = (unsigned long)init32->fb_offset;
90 init.mmio_offset = (unsigned long)init32->mmio_offset;
91 init.ring_offset = (unsigned long)init32->ring_offset;
92 init.ring_rptr_offset = (unsigned long)init32->ring_rptr_offset;
93 init.buffers_offset = (unsigned long)init32->buffers_offset;
94 init.gart_textures_offset = (unsigned long)init32->gart_textures_offset;
97
95
98 return drm_ioctl(file, DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
96 return radeon_cp_init(dev, &init, file_priv);
99}
100
101typedef struct drm_radeon_clear32 {
102 unsigned int flags;
103 unsigned int clear_color;
104 unsigned int clear_depth;
105 unsigned int color_mask;
106 unsigned int depth_mask; /* misnamed field: should be stencil */
107 u32 depth_boxes;
108} drm_radeon_clear32_t;
109
97}
98
99typedef struct drm_radeon_clear32 {
100 unsigned int flags;
101 unsigned int clear_color;
102 unsigned int clear_depth;
103 unsigned int color_mask;
104 unsigned int depth_mask; /* misnamed field: should be stencil */
105 u32 depth_boxes;
106} drm_radeon_clear32_t;
107
110static int compat_radeon_cp_clear(struct file *file, unsigned int cmd,
111 unsigned long arg)
108static int compat_radeon_cp_clear(struct drm_device *dev, void *arg,
109 struct drm_file *file_priv)
112{
110{
113 drm_radeon_clear32_t clr32;
114 drm_radeon_clear_t __user *clr;
111 drm_radeon_clear32_t *clr32;
112 drm_radeon_clear_t __user clr;
115
113
116 if (copy_from_user(&clr32, (void __user *)arg, sizeof(clr32)))
117 return -EFAULT;
114 clr32 = arg;
118
115
119 clr = compat_alloc_user_space(sizeof(*clr));
120 if (!access_ok(VERIFY_WRITE, clr, sizeof(*clr))
121 || __put_user(clr32.flags, &clr->flags)
122 || __put_user(clr32.clear_color, &clr->clear_color)
123 || __put_user(clr32.clear_depth, &clr->clear_depth)
124 || __put_user(clr32.color_mask, &clr->color_mask)
125 || __put_user(clr32.depth_mask, &clr->depth_mask)
126 || __put_user((void __user *)(unsigned long)clr32.depth_boxes,
127 &clr->depth_boxes))
128 return -EFAULT;
116 clr.flags = clr32->flags;
117 clr.clear_color = clr32->clear_color;
118 clr.clear_depth = clr32->clear_depth;
119 clr.color_mask = clr32->color_mask;
120 clr.depth_mask = clr32->depth_mask;
121 clr.depth_boxes = (drm_radeon_clear_rect_t *)(unsigned long)clr32->depth_boxes;
129
122
130 return drm_ioctl(file, DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
123 return radeon_ioctls[DRM_IOCTL_RADEON_CLEAR].func(dev, &clr, file_priv);
131}
132
133typedef struct drm_radeon_stipple32 {
134 u32 mask;
135} drm_radeon_stipple32_t;
136
124}
125
126typedef struct drm_radeon_stipple32 {
127 u32 mask;
128} drm_radeon_stipple32_t;
129
137static int compat_radeon_cp_stipple(struct file *file, unsigned int cmd,
138 unsigned long arg)
130static int compat_radeon_cp_stipple(struct drm_device *dev, void *arg,
131 struct drm_file *file_priv)
139{
140 drm_radeon_stipple32_t __user *argp = (void __user *)arg;
132{
133 drm_radeon_stipple32_t __user *argp = (void __user *)arg;
141 drm_radeon_stipple_t __user *request;
142 u32 mask;
134 drm_radeon_stipple_t __user request;
143
135
144 if (get_user(mask, &argp->mask))
145 return -EFAULT;
136 request.mask = (unsigned int *)(unsigned long)argp->mask;
146
137
147 request = compat_alloc_user_space(sizeof(*request));
148 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
149 || __put_user((unsigned int __user *)(unsigned long)mask,
150 &request->mask))
151 return -EFAULT;
152
153 return drm_ioctl(file, DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
138 return radeon_ioctls[DRM_IOCTL_RADEON_STIPPLE].func(dev, &request, file_priv);
154}
155
156typedef struct drm_radeon_tex_image32 {
157 unsigned int x, y; /* Blit coordinates */
158 unsigned int width, height;
159 u32 data;
160} drm_radeon_tex_image32_t;
161
162typedef struct drm_radeon_texture32 {
163 unsigned int offset;
164 int pitch;
165 int format;
166 int width; /* Texture image coordinates */
167 int height;
168 u32 image;
169} drm_radeon_texture32_t;
170
139}
140
141typedef struct drm_radeon_tex_image32 {
142 unsigned int x, y; /* Blit coordinates */
143 unsigned int width, height;
144 u32 data;
145} drm_radeon_tex_image32_t;
146
147typedef struct drm_radeon_texture32 {
148 unsigned int offset;
149 int pitch;
150 int format;
151 int width; /* Texture image coordinates */
152 int height;
153 u32 image;
154} drm_radeon_texture32_t;
155
171static int compat_radeon_cp_texture(struct file *file, unsigned int cmd,
172 unsigned long arg)
156static int compat_radeon_cp_texture(struct drm_device *dev, void *arg,
157 struct drm_file *file_priv)
173{
158{
174 drm_radeon_texture32_t req32;
175 drm_radeon_texture_t __user *request;
176 drm_radeon_tex_image32_t img32;
177 drm_radeon_tex_image_t __user *image;
159 drm_radeon_texture32_t *req32;
160 drm_radeon_texture_t __user request;
161 drm_radeon_tex_image32_t *img32;
162 drm_radeon_tex_image_t __user image;
178
163
179 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
180 return -EFAULT;
181 if (req32.image == 0)
164 req32 = arg;
165 if (req32->image == 0)
182 return -EINVAL;
166 return -EINVAL;
183 if (copy_from_user(&img32, (void __user *)(unsigned long)req32.image,
184 sizeof(img32)))
185 return -EFAULT;
167 img32 = (drm_radeon_tex_image32_t *)(unsigned long)req32->image;
186
168
187 request = compat_alloc_user_space(sizeof(*request) + sizeof(*image));
188 if (!access_ok(VERIFY_WRITE, request,
189 sizeof(*request) + sizeof(*image)))
190 return -EFAULT;
191 image = (drm_radeon_tex_image_t __user *) (request + 1);
169 request.offset = req32->offset;
170 request.pitch = req32->pitch;
171 request.format = req32->format;
172 request.width = req32->width;
173 request.height = req32->height;
174 request.image = &image;
175 image.x = img32->x;
176 image.y = img32->y;
177 image.width = img32->width;
178 image.height = img32->height;
179 image.data = (void *)(unsigned long)img32->data;
192
180
193 if (__put_user(req32.offset, &request->offset)
194 || __put_user(req32.pitch, &request->pitch)
195 || __put_user(req32.format, &request->format)
196 || __put_user(req32.width, &request->width)
197 || __put_user(req32.height, &request->height)
198 || __put_user(image, &request->image)
199 || __put_user(img32.x, &image->x)
200 || __put_user(img32.y, &image->y)
201 || __put_user(img32.width, &image->width)
202 || __put_user(img32.height, &image->height)
203 || __put_user((const void __user *)(unsigned long)img32.data,
204 &image->data))
205 return -EFAULT;
206
207 return drm_ioctl(file, DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
181 return radeon_ioctls[DRM_IOCTL_RADEON_TEXTURE].func(dev, &request, file_priv);
208}
209
210typedef struct drm_radeon_vertex2_32 {
211 int idx; /* Index of vertex buffer */
212 int discard; /* Client finished with buffer? */
213 int nr_states;
214 u32 state;
215 int nr_prims;
216 u32 prim;
217} drm_radeon_vertex2_32_t;
218
182}
183
184typedef struct drm_radeon_vertex2_32 {
185 int idx; /* Index of vertex buffer */
186 int discard; /* Client finished with buffer? */
187 int nr_states;
188 u32 state;
189 int nr_prims;
190 u32 prim;
191} drm_radeon_vertex2_32_t;
192
219static int compat_radeon_cp_vertex2(struct file *file, unsigned int cmd,
220 unsigned long arg)
193static int compat_radeon_cp_vertex2(struct drm_device *dev, void *arg,
194 struct drm_file *file_priv)
221{
195{
222 drm_radeon_vertex2_32_t req32;
223 drm_radeon_vertex2_t __user *request;
196 drm_radeon_vertex2_32_t *req32;
197 drm_radeon_vertex2_t __user request;
224
198
225 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
226 return -EFAULT;
199 req32 = arg;
227
200
228 request = compat_alloc_user_space(sizeof(*request));
229 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
230 || __put_user(req32.idx, &request->idx)
231 || __put_user(req32.discard, &request->discard)
232 || __put_user(req32.nr_states, &request->nr_states)
233 || __put_user((void __user *)(unsigned long)req32.state,
234 &request->state)
235 || __put_user(req32.nr_prims, &request->nr_prims)
236 || __put_user((void __user *)(unsigned long)req32.prim,
237 &request->prim))
238 return -EFAULT;
201 request.idx = req32->idx;
202 request.discard = req32->discard;
203 request.nr_states = req32->nr_states;
204 request.state = (drm_radeon_state_t *)(unsigned long)req32->state;
205 request.nr_prims = req32->nr_prims;
206 request.prim = (drm_radeon_prim_t *)(unsigned long)req32->prim;
239
207
240 return drm_ioctl(file, DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
208 return radeon_ioctls[DRM_IOCTL_RADEON_VERTEX2].func(dev, &request, file_priv);
241}
242
243typedef struct drm_radeon_cmd_buffer32 {
244 int bufsz;
245 u32 buf;
246 int nbox;
247 u32 boxes;
248} drm_radeon_cmd_buffer32_t;
249
209}
210
211typedef struct drm_radeon_cmd_buffer32 {
212 int bufsz;
213 u32 buf;
214 int nbox;
215 u32 boxes;
216} drm_radeon_cmd_buffer32_t;
217
250static int compat_radeon_cp_cmdbuf(struct file *file, unsigned int cmd,
251 unsigned long arg)
218static int compat_radeon_cp_cmdbuf(struct drm_device *dev, void *arg,
219 struct drm_file *file_priv)
252{
220{
253 drm_radeon_cmd_buffer32_t req32;
254 drm_radeon_cmd_buffer_t __user *request;
221 drm_radeon_cmd_buffer32_t *req32;
222 drm_radeon_cmd_buffer_t __user request;
255
223
256 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
257 return -EFAULT;
224 req32 = arg;
258
225
259 request = compat_alloc_user_space(sizeof(*request));
260 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
261 || __put_user(req32.bufsz, &request->bufsz)
262 || __put_user((void __user *)(unsigned long)req32.buf,
263 &request->buf)
264 || __put_user(req32.nbox, &request->nbox)
265 || __put_user((void __user *)(unsigned long)req32.boxes,
266 &request->boxes))
267 return -EFAULT;
226 request.bufsz = req32->bufsz;
227 request.buf = (char *)(unsigned long)req32->buf;
228 request.nbox = req32->nbox;
229 request.boxes = (struct drm_clip_rect *)(unsigned long)req32->boxes;
268
230
269 return drm_ioctl(file, DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
231 return radeon_ioctls[DRM_IOCTL_RADEON_CMDBUF].func(dev, &request, file_priv);
270}
271
272typedef struct drm_radeon_getparam32 {
273 int param;
274 u32 value;
275} drm_radeon_getparam32_t;
276
232}
233
234typedef struct drm_radeon_getparam32 {
235 int param;
236 u32 value;
237} drm_radeon_getparam32_t;
238
277static int compat_radeon_cp_getparam(struct file *file, unsigned int cmd,
278 unsigned long arg)
239static int compat_radeon_cp_getparam(struct drm_device *dev, void *arg,
240 struct drm_file *file_priv)
279{
241{
280 drm_radeon_getparam32_t req32;
281 drm_radeon_getparam_t __user *request;
242 drm_radeon_getparam32_t *req32;
243 drm_radeon_getparam_t __user request;
282
244
283 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
284 return -EFAULT;
245 req32 = arg;
285
246
286 request = compat_alloc_user_space(sizeof(*request));
287 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
288 || __put_user(req32.param, &request->param)
289 || __put_user((void __user *)(unsigned long)req32.value,
290 &request->value))
291 return -EFAULT;
247 request.param = req32->param;
248 request.value = (void *)(unsigned long)req32->value;
292
249
293 return drm_ioctl(file, DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
250 return radeon_ioctls[DRM_IOCTL_RADEON_GETPARAM].func(dev, &request, file_priv);
294}
295
296typedef struct drm_radeon_mem_alloc32 {
297 int region;
298 int alignment;
299 int size;
300 u32 region_offset; /* offset from start of fb or GART */
301} drm_radeon_mem_alloc32_t;
302
251}
252
253typedef struct drm_radeon_mem_alloc32 {
254 int region;
255 int alignment;
256 int size;
257 u32 region_offset; /* offset from start of fb or GART */
258} drm_radeon_mem_alloc32_t;
259
303static int compat_radeon_mem_alloc(struct file *file, unsigned int cmd,
304 unsigned long arg)
260static int compat_radeon_mem_alloc(struct drm_device *dev, void *arg,
261 struct drm_file *file_priv)
305{
262{
306 drm_radeon_mem_alloc32_t req32;
307 drm_radeon_mem_alloc_t __user *request;
263 drm_radeon_mem_alloc32_t *req32;
264 drm_radeon_mem_alloc_t __user request;
308
265
309 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
310 return -EFAULT;
266 req32 = arg;
311
267
312 request = compat_alloc_user_space(sizeof(*request));
313 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
314 || __put_user(req32.region, &request->region)
315 || __put_user(req32.alignment, &request->alignment)
316 || __put_user(req32.size, &request->size)
317 || __put_user((int __user *)(unsigned long)req32.region_offset,
318 &request->region_offset))
319 return -EFAULT;
268 request.region = req32->region;
269 request.alignment = req32->alignment;
270 request.size = req32->size;
271 request.region_offset = (int *)(unsigned long)req32->region_offset;
320
272
321 return drm_ioctl(file, DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
273 return radeon_mem_alloc(dev, &request, file_priv);
322}
323
324typedef struct drm_radeon_irq_emit32 {
325 u32 irq_seq;
326} drm_radeon_irq_emit32_t;
327
274}
275
276typedef struct drm_radeon_irq_emit32 {
277 u32 irq_seq;
278} drm_radeon_irq_emit32_t;
279
328static int compat_radeon_irq_emit(struct file *file, unsigned int cmd,
329 unsigned long arg)
280static int compat_radeon_irq_emit(struct drm_device *dev, void *arg,
281 struct drm_file *file_priv)
330{
282{
331 drm_radeon_irq_emit32_t req32;
332 drm_radeon_irq_emit_t __user *request;
283 drm_radeon_irq_emit32_t *req32;
284 drm_radeon_irq_emit_t __user request;
333
285
334 if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
335 return -EFAULT;
286 req32 = arg;
336
287
337 request = compat_alloc_user_space(sizeof(*request));
338 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
339 || __put_user((int __user *)(unsigned long)req32.irq_seq,
340 &request->irq_seq))
341 return -EFAULT;
288 request.irq_seq = (int *)(unsigned long)req32->irq_seq;
342
289
343 return drm_ioctl(file, DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
290 return radeon_irq_emit(dev, &request, file_priv);
344}
345
346/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
291}
292
293/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
347#if defined (CONFIG_X86_64) || defined(CONFIG_IA64)
348typedef struct drm_radeon_setparam32 {
349 int param;
350 u64 value;
351} __attribute__((packed)) drm_radeon_setparam32_t;
352
294typedef struct drm_radeon_setparam32 {
295 int param;
296 u64 value;
297} __attribute__((packed)) drm_radeon_setparam32_t;
298
353static int compat_radeon_cp_setparam(struct file *file, unsigned int cmd,
354 unsigned long arg)
299static int compat_radeon_cp_setparam(struct drm_device *dev, void *arg,
300 struct drm_file *file_priv)
355{
301{
356 drm_radeon_setparam32_t req32;
357 drm_radeon_setparam_t __user *request;
302 drm_radeon_setparam32_t *req32;
303 drm_radeon_setparam_t __user request;
358
304
359 if (copy_from_user(&req32, (void __user *) arg, sizeof(req32)))
360 return -EFAULT;
305 req32 = arg;
361
306
362 request = compat_alloc_user_space(sizeof(*request));
363 if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
364 || __put_user(req32.param, &request->param)
365 || __put_user((void __user *)(unsigned long)req32.value,
366 &request->value))
367 return -EFAULT;
307 request.param = req32->param;
308 request.value = req32->value;
368
309
369 return drm_ioctl(file, DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
310 return radeon_ioctls[DRM_IOCTL_RADEON_SETPARAM].func(dev, &request, file_priv);
370}
311}
371#else
372#define compat_radeon_cp_setparam NULL
373#endif /* X86_64 || IA64 */
374
312
375static drm_ioctl_compat_t *radeon_compat_ioctls[] = {
376 [DRM_RADEON_CP_INIT] = compat_radeon_cp_init,
377 [DRM_RADEON_CLEAR] = compat_radeon_cp_clear,
378 [DRM_RADEON_STIPPLE] = compat_radeon_cp_stipple,
379 [DRM_RADEON_TEXTURE] = compat_radeon_cp_texture,
380 [DRM_RADEON_VERTEX2] = compat_radeon_cp_vertex2,
381 [DRM_RADEON_CMDBUF] = compat_radeon_cp_cmdbuf,
382 [DRM_RADEON_GETPARAM] = compat_radeon_cp_getparam,
383 [DRM_RADEON_SETPARAM] = compat_radeon_cp_setparam,
384 [DRM_RADEON_ALLOC] = compat_radeon_mem_alloc,
385 [DRM_RADEON_IRQ_EMIT] = compat_radeon_irq_emit,
313struct drm_ioctl_desc radeon_compat_ioctls[] = {
314 DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, compat_radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
315 DRM_IOCTL_DEF(DRM_RADEON_CLEAR, compat_radeon_cp_clear, DRM_AUTH),
316 DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, compat_radeon_cp_stipple, DRM_AUTH),
317 DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, compat_radeon_cp_texture, DRM_AUTH),
318 DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, compat_radeon_cp_vertex2, DRM_AUTH),
319 DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, compat_radeon_cp_cmdbuf, DRM_AUTH),
320 DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, compat_radeon_cp_getparam, DRM_AUTH),
321 DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, compat_radeon_cp_setparam, DRM_AUTH),
322 DRM_IOCTL_DEF(DRM_RADEON_ALLOC, compat_radeon_mem_alloc, DRM_AUTH),
323 DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, compat_radeon_irq_emit, DRM_AUTH)
386};
324};
325int radeon_num_compat_ioctls = DRM_ARRAY_SIZE(radeon_compat_ioctls);
387
326
388/**
389 * Called whenever a 32-bit process running under a 64-bit kernel
390 * performs an ioctl on /dev/dri/card<n>.
391 *
392 * \param filp file pointer.
393 * \param cmd command.
394 * \param arg user argument.
395 * \return zero on success or negative number on failure.
396 */
397long radeon_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
398{
399 unsigned int nr = DRM_IOCTL_NR(cmd);
400 drm_ioctl_compat_t *fn = NULL;
401 int ret;
402
403 if (nr < DRM_COMMAND_BASE)
404 return drm_compat_ioctl(filp, cmd, arg);
405
406 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls))
407 fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE];
408
409 if (fn != NULL)
410 ret = (*fn) (filp, cmd, arg);
411 else
412 ret = drm_ioctl(filp, cmd, arg);
413
414 return ret;
415}
416
417long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
418{
419 unsigned int nr = DRM_IOCTL_NR(cmd);
420 int ret;
421
422 if (nr < DRM_COMMAND_BASE)
423 return drm_compat_ioctl(filp, cmd, arg);
424
425 ret = drm_ioctl(filp, cmd, arg);
426
427 return ret;
428}
327#endif