| t4.h (256694) | t4.h (297124) |
|---|---|
| 1/* 2 * Copyright (c) 2009-2013 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: --- 14 unchanged lines hidden (view full) --- 23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 * SOFTWARE. 30 * | 1/* 2 * Copyright (c) 2009-2013 Chelsio, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: --- 14 unchanged lines hidden (view full) --- 23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 29 * SOFTWARE. 30 * |
| 31 * $FreeBSD: head/sys/dev/cxgbe/iw_cxgbe/t4.h 256694 2013-10-17 18:37:25Z np $ | 31 * $FreeBSD: head/sys/dev/cxgbe/iw_cxgbe/t4.h 297124 2016-03-21 00:29:45Z np $ |
| 32 */ 33#ifndef __T4_H__ 34#define __T4_H__ 35 36/* 37 * Fixme: Adding missing defines 38 */ 39#define SGE_PF_KDOORBELL 0x0 --- 24 unchanged lines hidden (view full) --- 64#define T4_MAX_NUM_PD (1<<15) 65#define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) 66#define T4_MAX_EQ_SIZE (65520 - T4_EQ_STATUS_ENTRIES) 67#define T4_MAX_IQ_SIZE (65520 - 1) 68#define T4_MAX_RQ_SIZE (8192 - T4_EQ_STATUS_ENTRIES) 69#define T4_MAX_SQ_SIZE (T4_MAX_EQ_SIZE - 1) 70#define T4_MAX_QP_DEPTH (T4_MAX_RQ_SIZE - 1) 71#define T4_MAX_CQ_DEPTH (T4_MAX_IQ_SIZE - 1) | 32 */ 33#ifndef __T4_H__ 34#define __T4_H__ 35 36/* 37 * Fixme: Adding missing defines 38 */ 39#define SGE_PF_KDOORBELL 0x0 --- 24 unchanged lines hidden (view full) --- 64#define T4_MAX_NUM_PD (1<<15) 65#define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) 66#define T4_MAX_EQ_SIZE (65520 - T4_EQ_STATUS_ENTRIES) 67#define T4_MAX_IQ_SIZE (65520 - 1) 68#define T4_MAX_RQ_SIZE (8192 - T4_EQ_STATUS_ENTRIES) 69#define T4_MAX_SQ_SIZE (T4_MAX_EQ_SIZE - 1) 70#define T4_MAX_QP_DEPTH (T4_MAX_RQ_SIZE - 1) 71#define T4_MAX_CQ_DEPTH (T4_MAX_IQ_SIZE - 1) |
| 72#define T4_MAX_NUM_STAG (1<<15) | |
| 73#define T4_MAX_MR_SIZE (~0ULL - 1) 74#define T4_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ 75#define T4_STAG_UNSET 0xffffffff 76#define T4_FW_MAJ 0 77#define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) 78#define A_PCIE_MA_SYNC 0x30b4 79 80struct t4_status_page { --- 438 unchanged lines hidden (view full) --- 519 cq->sw_in_use--; 520 if (++cq->sw_cidx == cq->size) 521 cq->sw_cidx = 0; 522} 523 524static inline void t4_hwcq_consume(struct t4_cq *cq) 525{ 526 cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts; | 72#define T4_MAX_MR_SIZE (~0ULL - 1) 73#define T4_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ 74#define T4_STAG_UNSET 0xffffffff 75#define T4_FW_MAJ 0 76#define T4_EQ_STATUS_ENTRIES (L1_CACHE_BYTES > 64 ? 2 : 1) 77#define A_PCIE_MA_SYNC 0x30b4 78 79struct t4_status_page { --- 438 unchanged lines hidden (view full) --- 518 cq->sw_in_use--; 519 if (++cq->sw_cidx == cq->size) 520 cq->sw_cidx = 0; 521} 522 523static inline void t4_hwcq_consume(struct t4_cq *cq) 524{ 525 cq->bits_type_ts = cq->queue[cq->cidx].bits_type_ts; |
| 527 if (++cq->cidx_inc == (cq->size >> 4)) { | 526 if (++cq->cidx_inc == (cq->size >> 4) || cq->cidx_inc == M_CIDXINC) { |
| 528 u32 val; 529 530 val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7) | 531 INGRESSQID(cq->cqid); 532 writel(val, cq->gts); 533 cq->cidx_inc = 0; 534 } 535 if (++cq->cidx == cq->size) { --- 62 unchanged lines hidden --- | 527 u32 val; 528 529 val = SEINTARM(0) | CIDXINC(cq->cidx_inc) | TIMERREG(7) | 530 INGRESSQID(cq->cqid); 531 writel(val, cq->gts); 532 cq->cidx_inc = 0; 533 } 534 if (++cq->cidx == cq->size) { --- 62 unchanged lines hidden --- |