1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 185199 2008-11-23 07:30:07Z kmacy $
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>
38
39#include <sys/lock.h>
40#include <sys/mutex.h>
41
42#include <dev/mii/mii.h>
43
44#include <common/cxgb_version.h>
45#include <cxgb_config.h>
46
47#ifndef _CXGB_OSDEP_H_
48#define _CXGB_OSDEP_H_
49
50typedef struct adapter adapter_t;
51struct sge_rspq;
52
53enum {
54 TP_TMR_RES = 200, /* TP timer resolution in usec */
55 MAX_NPORTS = 4, /* max # of ports */
56 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */
57 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */
58};
59
60struct t3_mbuf_hdr {
61 struct mbuf *mh_head;
62 struct mbuf *mh_tail;
63};
64
65#ifndef PANIC_IF
66#define PANIC_IF(exp) do { \
67 if (exp) \
68 panic("BUG: %s", #exp); \
69} while (0)
70#endif
71
72#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
73#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
74#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
75#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
76#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
77#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
78
79/*
80 * XXX FIXME
81 */
82#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
83#define m_get_toep(m) ((m)->m_pkthdr.header)
84#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
85
86#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
87#define m_get_socket(m) ((m)->m_pkthdr.header)
88
89#define KTR_CXGB KTR_SPARE2
90
91#define MT_DONTFREE 128
92
93#if __FreeBSD_version > 700030
94#define INTR_FILTERS
95#define FIRMWARE_LATEST
96#endif
97
98#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
99#define FIRMWARE_LATEST
100#endif
101
102#if __FreeBSD_version > 700000
103#define MSI_SUPPORTED
104#define TSO_SUPPORTED
105#define VLAN_SUPPORTED
106#define TASKQUEUE_CURRENT
107#else
108#define if_name(ifp) (ifp)->if_xname
109#define M_SANITY(m, n)
110#endif
111
112#if __FreeBSD_version >= 701000
113#include "opt_inet.h"
114#ifdef INET
115#define LRO_SUPPORTED
116#endif
117#define TOE_SUPPORTED
118#endif
119
120#if __FreeBSD_version < 800054
121#if defined (__GNUC__)
122 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
123 #define mb() __asm__ __volatile__ ("mfence;": : :"memory")
124 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory")
125 #define rmb() __asm__ __volatile__ ("lfence;": : :"memory")
126 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
127 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
128 #define wmb() mb()
129 #define rmb() mb()
130 #elif #cpu(sparc) || defined sparc || defined __sparc__
131 #define mb() __asm__ __volatile__ ("stbar;": : :"memory")
132 #define wmb() mb()
133 #define rmb() mb()
134#else
135 #define wmb() mb()
136 #define rmb() mb()
137 #define mb() /* XXX just to make this compile */
138 #endif
139#else
140 #error "unknown compiler"
141#endif
142#endif
143
144#define __read_mostly __attribute__((__section__(".data.read_mostly")))
145
146/*
147 * Workaround for weird Chelsio issue
148 */
149#if __FreeBSD_version > 700029
150#define PRIV_SUPPORTED
151#endif
152
153#define CXGB_TX_CLEANUP_THRESHOLD 32
154
155
156#ifdef DEBUG_PRINT
157#define DPRINTF printf
158#else
159#define DPRINTF(...)
160#endif
161
162#define TX_MAX_SIZE (1 << 16) /* 64KB */
163#define TX_MAX_SEGS 36 /* maximum supported by card */
164
165#define TX_MAX_DESC 4 /* max descriptors per packet */
166
167
168#define TX_START_MIN_DESC (TX_MAX_DESC << 2)
169#define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors
170 * call to start used per */
171
172#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors
173 * to clean per iteration */
174#define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single
175 * TX WR
176 */
177#define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be
178 * aggregated into a single TX WR
179 */
180
181
182#if defined(__i386__) || defined(__amd64__)
183#define smp_mb() mb()
184
185#define L1_CACHE_BYTES 128
186static __inline
187void prefetch(void *x)
188{
189 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
190}
191
192extern void kdb_backtrace(void);
193
194#define WARN_ON(condition) do { \
195 if (__predict_false((condition)!=0)) { \
196 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
197 kdb_backtrace(); \
198 } \
199} while (0)
200
201
202#else /* !i386 && !amd64 */
203#define smp_mb()
204#define prefetch(x)
205#define L1_CACHE_BYTES 32
206#endif
207
208#define DBG_RX (1 << 0)
209static const int debug_flags = DBG_RX;
210
211#ifdef DEBUG_PRINT
212#define DBG(flag, msg) do { \
213 if ((flag & debug_flags)) \
214 printf msg; \
215} while (0)
216#else
217#define DBG(...)
218#endif
219
220#include <sys/syslog.h>
221
222#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
223#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
224
225#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
226#define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
227#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
228
229#define t3_os_sleep(x) DELAY((x) * 1000)
230
231#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
232
233#define max_t(type, a, b) (type)max((a), (b))
234#define net_device ifnet
235#define cpu_to_be32 htobe32
236
237/* Standard PHY definitions */
238#define BMCR_LOOPBACK BMCR_LOOP
239#define BMCR_ISOLATE BMCR_ISO
240#define BMCR_ANENABLE BMCR_AUTOEN
241#define BMCR_SPEED1000 BMCR_SPEED1
242#define BMCR_SPEED100 BMCR_SPEED0
243#define BMCR_ANRESTART BMCR_STARTNEG
244#define BMCR_FULLDPLX BMCR_FDX
245#define BMSR_LSTATUS BMSR_LINK
246#define BMSR_ANEGCOMPLETE BMSR_ACOMP
247
248#define MII_LPA MII_ANLPAR
249#define MII_ADVERTISE MII_ANAR
250#define MII_CTRL1000 MII_100T2CR
251
252#define ADVERTISE_PAUSE_CAP ANAR_FC
253#define ADVERTISE_PAUSE_ASYM ANAR_X_PAUSE_ASYM
254#define ADVERTISE_PAUSE ANAR_X_PAUSE_SYM
255#define ADVERTISE_1000HALF ANAR_X_HD
256#define ADVERTISE_1000FULL ANAR_X_FD
257#define ADVERTISE_10FULL ANAR_10_FD
258#define ADVERTISE_10HALF ANAR_10
259#define ADVERTISE_100FULL ANAR_TX_FD
260#define ADVERTISE_100HALF ANAR_TX
261
262
263#define ADVERTISE_1000XHALF ANAR_X_HD
264#define ADVERTISE_1000XFULL ANAR_X_FD
265#define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM
266#define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM
267
268#define ADVERTISE_CSMA ANAR_CSMA
269#define ADVERTISE_NPAGE ANAR_NP
270
271
272/* Standard PCI Extended Capaibilities definitions */
273#define PCI_CAP_ID_VPD 0x03
274#define PCI_VPD_ADDR 2
275#define PCI_VPD_ADDR_F 0x8000
276#define PCI_VPD_DATA 4
277
278#define PCI_CAP_ID_EXP 0x10
279#define PCI_EXP_DEVCTL 8
280#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
281#define PCI_EXP_LNKCTL 16
282#define PCI_EXP_LNKSTA 18
283
284/*
285 * Linux compatibility macros
286 */
287
288/* Some simple translations */
289#define __devinit
290#define udelay(x) DELAY(x)
291#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
292#define le32_to_cpu(x) le32toh(x)
293#define le16_to_cpu(x) le16toh(x)
294#define cpu_to_le32(x) htole32(x)
295#define swab32(x) bswap32(x)
296#define simple_strtoul strtoul
297
298
299#ifndef LINUX_TYPES_DEFINED
300typedef uint8_t u8;
301typedef uint16_t u16;
302typedef uint32_t u32;
303typedef uint64_t u64;
304
305typedef uint8_t __u8;
306typedef uint16_t __u16;
307typedef uint32_t __u32;
308typedef uint8_t __be8;
309typedef uint16_t __be16;
310typedef uint32_t __be32;
311typedef uint64_t __be64;
312#endif
313
314
315#if BYTE_ORDER == BIG_ENDIAN
316#define __BIG_ENDIAN_BITFIELD
317#elif BYTE_ORDER == LITTLE_ENDIAN
318#define __LITTLE_ENDIAN_BITFIELD
319#else
320#error "Must set BYTE_ORDER"
321#endif
322
323/* Indicates what features are supported by the interface. */
324#define SUPPORTED_10baseT_Half (1 << 0)
325#define SUPPORTED_10baseT_Full (1 << 1)
326#define SUPPORTED_100baseT_Half (1 << 2)
327#define SUPPORTED_100baseT_Full (1 << 3)
328#define SUPPORTED_1000baseT_Half (1 << 4)
329#define SUPPORTED_1000baseT_Full (1 << 5)
330#define SUPPORTED_Autoneg (1 << 6)
331#define SUPPORTED_TP (1 << 7)
332#define SUPPORTED_AUI (1 << 8)
333#define SUPPORTED_MII (1 << 9)
334#define SUPPORTED_FIBRE (1 << 10)
335#define SUPPORTED_BNC (1 << 11)
336#define SUPPORTED_10000baseT_Full (1 << 12)
337#define SUPPORTED_Pause (1 << 13)
338#define SUPPORTED_Asym_Pause (1 << 14)
339
340/* Indicates what features are advertised by the interface. */
341#define ADVERTISED_10baseT_Half (1 << 0)
342#define ADVERTISED_10baseT_Full (1 << 1)
343#define ADVERTISED_100baseT_Half (1 << 2)
344#define ADVERTISED_100baseT_Full (1 << 3)
345#define ADVERTISED_1000baseT_Half (1 << 4)
346#define ADVERTISED_1000baseT_Full (1 << 5)
347#define ADVERTISED_Autoneg (1 << 6)
348#define ADVERTISED_TP (1 << 7)
349#define ADVERTISED_AUI (1 << 8)
350#define ADVERTISED_MII (1 << 9)
351#define ADVERTISED_FIBRE (1 << 10)
352#define ADVERTISED_BNC (1 << 11)
353#define ADVERTISED_10000baseT_Full (1 << 12)
354#define ADVERTISED_Pause (1 << 13)
355#define ADVERTISED_Asym_Pause (1 << 14)
356
357/* Enable or disable autonegotiation. If this is set to enable,
358 * the forced link modes above are completely ignored.
359 */
360#define AUTONEG_DISABLE 0x00
361#define AUTONEG_ENABLE 0x01
362
363#define SPEED_10 10
364#define SPEED_100 100
365#define SPEED_1000 1000
366#define SPEED_10000 10000
367#define DUPLEX_HALF 0
368#define DUPLEX_FULL 1
369
370#endif
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 185199 2008-11-23 07:30:07Z kmacy $
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>
38
39#include <sys/lock.h>
40#include <sys/mutex.h>
41
42#include <dev/mii/mii.h>
43
44#include <common/cxgb_version.h>
45#include <cxgb_config.h>
46
47#ifndef _CXGB_OSDEP_H_
48#define _CXGB_OSDEP_H_
49
50typedef struct adapter adapter_t;
51struct sge_rspq;
52
53enum {
54 TP_TMR_RES = 200, /* TP timer resolution in usec */
55 MAX_NPORTS = 4, /* max # of ports */
56 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */
57 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */
58};
59
60struct t3_mbuf_hdr {
61 struct mbuf *mh_head;
62 struct mbuf *mh_tail;
63};
64
65#ifndef PANIC_IF
66#define PANIC_IF(exp) do { \
67 if (exp) \
68 panic("BUG: %s", #exp); \
69} while (0)
70#endif
71
72#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
73#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
74#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
75#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
76#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
77#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
78
79/*
80 * XXX FIXME
81 */
82#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
83#define m_get_toep(m) ((m)->m_pkthdr.header)
84#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
85
86#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
87#define m_get_socket(m) ((m)->m_pkthdr.header)
88
89#define KTR_CXGB KTR_SPARE2
90
91#define MT_DONTFREE 128
92
93#if __FreeBSD_version > 700030
94#define INTR_FILTERS
95#define FIRMWARE_LATEST
96#endif
97
98#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
99#define FIRMWARE_LATEST
100#endif
101
102#if __FreeBSD_version > 700000
103#define MSI_SUPPORTED
104#define TSO_SUPPORTED
105#define VLAN_SUPPORTED
106#define TASKQUEUE_CURRENT
107#else
108#define if_name(ifp) (ifp)->if_xname
109#define M_SANITY(m, n)
110#endif
111
112#if __FreeBSD_version >= 701000
113#include "opt_inet.h"
114#ifdef INET
115#define LRO_SUPPORTED
116#endif
117#define TOE_SUPPORTED
118#endif
119
120#if __FreeBSD_version < 800054
121#if defined (__GNUC__)
122 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
123 #define mb() __asm__ __volatile__ ("mfence;": : :"memory")
124 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory")
125 #define rmb() __asm__ __volatile__ ("lfence;": : :"memory")
126 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
127 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
128 #define wmb() mb()
129 #define rmb() mb()
130 #elif #cpu(sparc) || defined sparc || defined __sparc__
131 #define mb() __asm__ __volatile__ ("stbar;": : :"memory")
132 #define wmb() mb()
133 #define rmb() mb()
134#else
135 #define wmb() mb()
136 #define rmb() mb()
137 #define mb() /* XXX just to make this compile */
138 #endif
139#else
140 #error "unknown compiler"
141#endif
142#endif
143
144#define __read_mostly __attribute__((__section__(".data.read_mostly")))
145
146/*
147 * Workaround for weird Chelsio issue
148 */
149#if __FreeBSD_version > 700029
150#define PRIV_SUPPORTED
151#endif
152
153#define CXGB_TX_CLEANUP_THRESHOLD 32
154
155
156#ifdef DEBUG_PRINT
157#define DPRINTF printf
158#else
159#define DPRINTF(...)
160#endif
161
162#define TX_MAX_SIZE (1 << 16) /* 64KB */
163#define TX_MAX_SEGS 36 /* maximum supported by card */
164
165#define TX_MAX_DESC 4 /* max descriptors per packet */
166
167
168#define TX_START_MIN_DESC (TX_MAX_DESC << 2)
169#define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors
170 * call to start used per */
171
172#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors
173 * to clean per iteration */
174#define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single
175 * TX WR
176 */
177#define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be
178 * aggregated into a single TX WR
179 */
180
181
182#if defined(__i386__) || defined(__amd64__)
183#define smp_mb() mb()
184
185#define L1_CACHE_BYTES 128
186static __inline
187void prefetch(void *x)
188{
189 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
190}
191
192extern void kdb_backtrace(void);
193
194#define WARN_ON(condition) do { \
195 if (__predict_false((condition)!=0)) { \
196 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
197 kdb_backtrace(); \
198 } \
199} while (0)
200
201
202#else /* !i386 && !amd64 */
203#define smp_mb()
204#define prefetch(x)
205#define L1_CACHE_BYTES 32
206#endif
207
208#define DBG_RX (1 << 0)
209static const int debug_flags = DBG_RX;
210
211#ifdef DEBUG_PRINT
212#define DBG(flag, msg) do { \
213 if ((flag & debug_flags)) \
214 printf msg; \
215} while (0)
216#else
217#define DBG(...)
218#endif
219
220#include <sys/syslog.h>
221
222#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
223#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
224
225#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
226#define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
227#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
228
229#define t3_os_sleep(x) DELAY((x) * 1000)
230
231#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
232
233#define max_t(type, a, b) (type)max((a), (b))
234#define net_device ifnet
235#define cpu_to_be32 htobe32
236
237/* Standard PHY definitions */
238#define BMCR_LOOPBACK BMCR_LOOP
239#define BMCR_ISOLATE BMCR_ISO
240#define BMCR_ANENABLE BMCR_AUTOEN
241#define BMCR_SPEED1000 BMCR_SPEED1
242#define BMCR_SPEED100 BMCR_SPEED0
243#define BMCR_ANRESTART BMCR_STARTNEG
244#define BMCR_FULLDPLX BMCR_FDX
245#define BMSR_LSTATUS BMSR_LINK
246#define BMSR_ANEGCOMPLETE BMSR_ACOMP
247
248#define MII_LPA MII_ANLPAR
249#define MII_ADVERTISE MII_ANAR
250#define MII_CTRL1000 MII_100T2CR
251
252#define ADVERTISE_PAUSE_CAP ANAR_FC
253#define ADVERTISE_PAUSE_ASYM ANAR_X_PAUSE_ASYM
254#define ADVERTISE_PAUSE ANAR_X_PAUSE_SYM
255#define ADVERTISE_1000HALF ANAR_X_HD
256#define ADVERTISE_1000FULL ANAR_X_FD
257#define ADVERTISE_10FULL ANAR_10_FD
258#define ADVERTISE_10HALF ANAR_10
259#define ADVERTISE_100FULL ANAR_TX_FD
260#define ADVERTISE_100HALF ANAR_TX
261
262
263#define ADVERTISE_1000XHALF ANAR_X_HD
264#define ADVERTISE_1000XFULL ANAR_X_FD
265#define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM
266#define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM
267
268#define ADVERTISE_CSMA ANAR_CSMA
269#define ADVERTISE_NPAGE ANAR_NP
270
271
272/* Standard PCI Extended Capaibilities definitions */
273#define PCI_CAP_ID_VPD 0x03
274#define PCI_VPD_ADDR 2
275#define PCI_VPD_ADDR_F 0x8000
276#define PCI_VPD_DATA 4
277
278#define PCI_CAP_ID_EXP 0x10
279#define PCI_EXP_DEVCTL 8
280#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
281#define PCI_EXP_LNKCTL 16
282#define PCI_EXP_LNKSTA 18
283
284/*
285 * Linux compatibility macros
286 */
287
288/* Some simple translations */
289#define __devinit
290#define udelay(x) DELAY(x)
291#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
292#define le32_to_cpu(x) le32toh(x)
293#define le16_to_cpu(x) le16toh(x)
294#define cpu_to_le32(x) htole32(x)
295#define swab32(x) bswap32(x)
296#define simple_strtoul strtoul
297
298
299#ifndef LINUX_TYPES_DEFINED
300typedef uint8_t u8;
301typedef uint16_t u16;
302typedef uint32_t u32;
303typedef uint64_t u64;
304
305typedef uint8_t __u8;
306typedef uint16_t __u16;
307typedef uint32_t __u32;
308typedef uint8_t __be8;
309typedef uint16_t __be16;
310typedef uint32_t __be32;
311typedef uint64_t __be64;
312#endif
313
314
315#if BYTE_ORDER == BIG_ENDIAN
316#define __BIG_ENDIAN_BITFIELD
317#elif BYTE_ORDER == LITTLE_ENDIAN
318#define __LITTLE_ENDIAN_BITFIELD
319#else
320#error "Must set BYTE_ORDER"
321#endif
322
323/* Indicates what features are supported by the interface. */
324#define SUPPORTED_10baseT_Half (1 << 0)
325#define SUPPORTED_10baseT_Full (1 << 1)
326#define SUPPORTED_100baseT_Half (1 << 2)
327#define SUPPORTED_100baseT_Full (1 << 3)
328#define SUPPORTED_1000baseT_Half (1 << 4)
329#define SUPPORTED_1000baseT_Full (1 << 5)
330#define SUPPORTED_Autoneg (1 << 6)
331#define SUPPORTED_TP (1 << 7)
332#define SUPPORTED_AUI (1 << 8)
333#define SUPPORTED_MII (1 << 9)
334#define SUPPORTED_FIBRE (1 << 10)
335#define SUPPORTED_BNC (1 << 11)
336#define SUPPORTED_10000baseT_Full (1 << 12)
337#define SUPPORTED_Pause (1 << 13)
338#define SUPPORTED_Asym_Pause (1 << 14)
339
340/* Indicates what features are advertised by the interface. */
341#define ADVERTISED_10baseT_Half (1 << 0)
342#define ADVERTISED_10baseT_Full (1 << 1)
343#define ADVERTISED_100baseT_Half (1 << 2)
344#define ADVERTISED_100baseT_Full (1 << 3)
345#define ADVERTISED_1000baseT_Half (1 << 4)
346#define ADVERTISED_1000baseT_Full (1 << 5)
347#define ADVERTISED_Autoneg (1 << 6)
348#define ADVERTISED_TP (1 << 7)
349#define ADVERTISED_AUI (1 << 8)
350#define ADVERTISED_MII (1 << 9)
351#define ADVERTISED_FIBRE (1 << 10)
352#define ADVERTISED_BNC (1 << 11)
353#define ADVERTISED_10000baseT_Full (1 << 12)
354#define ADVERTISED_Pause (1 << 13)
355#define ADVERTISED_Asym_Pause (1 << 14)
356
357/* Enable or disable autonegotiation. If this is set to enable,
358 * the forced link modes above are completely ignored.
359 */
360#define AUTONEG_DISABLE 0x00
361#define AUTONEG_ENABLE 0x01
362
363#define SPEED_10 10
364#define SPEED_100 100
365#define SPEED_1000 1000
366#define SPEED_10000 10000
367#define DUPLEX_HALF 0
368#define DUPLEX_FULL 1
369
370#endif