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csigma.c (139749) csigma.c (250460)
1/*-
2 * Low-level subroutines for Cronyx-Sigma adapter.
3 *
4 * Copyright (C) 1994-2000 Cronyx Engineering.
5 * Author: Serge Vakulenko, <vak@cronyx.ru>
6 *
7 * This software is distributed with NO WARRANTIES, not even the implied
8 * warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
9 *
10 * Authors grant any other persons or organisations permission to use
11 * or modify this software as long as this message is kept with the software,
12 * all derivative works or modified versions.
13 *
14 * Cronyx Id: csigma.c,v 1.1.2.1 2003/11/12 17:13:41 rik Exp $
1/*-
2 * Low-level subroutines for Cronyx-Sigma adapter.
3 *
4 * Copyright (C) 1994-2000 Cronyx Engineering.
5 * Author: Serge Vakulenko, <vak@cronyx.ru>
6 *
7 * This software is distributed with NO WARRANTIES, not even the implied
8 * warranties for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
9 *
10 * Authors grant any other persons or organisations permission to use
11 * or modify this software as long as this message is kept with the software,
12 * all derivative works or modified versions.
13 *
14 * Cronyx Id: csigma.c,v 1.1.2.1 2003/11/12 17:13:41 rik Exp $
15 * $FreeBSD: head/sys/dev/cx/csigma.c 139749 2005-01-06 01:43:34Z imp $
15 * $FreeBSD: head/sys/dev/cx/csigma.c 250460 2013-05-10 16:41:26Z eadler $
16 */
17#include <dev/cx/machdep.h>
18#include <dev/cx/cxddk.h>
19#include <dev/cx/cxreg.h>
20#include <dev/cx/cronyxfw.h>
21
22#define DMA_MASK 0xd4 /* DMA mask register */
23#define DMA_MASK_CLEAR 0x04 /* DMA clear mask */

--- 1139 unchanged lines hidden (view full) ---

1163 if (c->mode == M_ASYNC) {
1164 outb (CAR(c->port), c->num & 3);
1165 outb (MSVR_DTR(c->port), on ? MSV_DTR : 0);
1166 return;
1167 }
1168
1169 switch (c->num) {
1170 default:
16 */
17#include <dev/cx/machdep.h>
18#include <dev/cx/cxddk.h>
19#include <dev/cx/cxreg.h>
20#include <dev/cx/cronyxfw.h>
21
22#define DMA_MASK 0xd4 /* DMA mask register */
23#define DMA_MASK_CLEAR 0x04 /* DMA clear mask */

--- 1139 unchanged lines hidden (view full) ---

1163 if (c->mode == M_ASYNC) {
1164 outb (CAR(c->port), c->num & 3);
1165 outb (MSVR_DTR(c->port), on ? MSV_DTR : 0);
1166 return;
1167 }
1168
1169 switch (c->num) {
1170 default:
1171 /* Channels 4..7 and 12..15 in syncronous mode
1171 /* Channels 4..7 and 12..15 in synchronous mode
1172 * have no DTR signal. */
1173 break;
1174
1175 case 1: case 2: case 3:
1176 if (c->type == T_UNIV_RS232)
1177 break;
1178 case 0:
1179 if (on) b->bcr1 |= BCR1_DTR(c->num);

--- 259 unchanged lines hidden ---
1172 * have no DTR signal. */
1173 break;
1174
1175 case 1: case 2: case 3:
1176 if (c->type == T_UNIV_RS232)
1177 break;
1178 case 0:
1179 if (on) b->bcr1 |= BCR1_DTR(c->num);

--- 259 unchanged lines hidden ---