| ecore_init.h (295830) | ecore_init.h (296071) |
|---|---|
| 1/*- | 1/*- |
| 2 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved. | 2 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved. |
| 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * | 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * |
| 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS' | 14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 18 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 24 * THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 18 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 24 * THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/dev/bxe/ecore_init.h 295830 2016-02-19 22:46:52Z davidcs $"); | 28__FBSDID("$FreeBSD: head/sys/dev/bxe/ecore_init.h 296071 2016-02-25 22:44:00Z davidcs $"); |
| 29 30#ifndef ECORE_INIT_H 31#define ECORE_INIT_H 32 33/* Init operation types and structures */ 34enum { 35 OP_RD = 0x1, /* read a single register */ 36 OP_WR, /* write a single register */ --- 708 unchanged lines hidden (view full) --- 745{ 746 int i; 747 uint32_t reg_val; 748 749 for (i = 0; i < ARRSIZE(mcp_attn_ctl_regs); i++) { 750 reg_val = REG_RD(sc, mcp_attn_ctl_regs[i].addr); 751 752 if (enable) | 29 30#ifndef ECORE_INIT_H 31#define ECORE_INIT_H 32 33/* Init operation types and structures */ 34enum { 35 OP_RD = 0x1, /* read a single register */ 36 OP_WR, /* write a single register */ --- 708 unchanged lines hidden (view full) --- 745{ 746 int i; 747 uint32_t reg_val; 748 749 for (i = 0; i < ARRSIZE(mcp_attn_ctl_regs); i++) { 750 reg_val = REG_RD(sc, mcp_attn_ctl_regs[i].addr); 751 752 if (enable) |
| 753 reg_val |= mcp_attn_ctl_regs[i].bits; | 753 reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */ |
| 754 else | 754 else |
| 755 reg_val &= ~mcp_attn_ctl_regs[i].bits; | 755 reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */ |
| 756 757 REG_WR(sc, mcp_attn_ctl_regs[i].addr, reg_val); 758 } 759} 760 761static inline uint32_t ecore_parity_reg_mask(struct bxe_softc *sc, int idx) 762{ 763 if (CHIP_IS_E1(sc)) --- 95 unchanged lines hidden --- | 756 757 REG_WR(sc, mcp_attn_ctl_regs[i].addr, reg_val); 758 } 759} 760 761static inline uint32_t ecore_parity_reg_mask(struct bxe_softc *sc, int idx) 762{ 763 if (CHIP_IS_E1(sc)) --- 95 unchanged lines hidden --- |