1/*-
2 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
18 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
19 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
20 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
21 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
22 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
23 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
24 * THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/dev/bxe/bxe_stats.c 295830 2016-02-19 22:46:52Z davidcs $");
29
30#include "bxe.h"
31#include "bxe_stats.h"
32
33#ifdef __i386__
34#define BITS_PER_LONG 32
35#else
36#define BITS_PER_LONG 64
37#endif
38
39static inline long
40bxe_hilo(uint32_t *hiref)
41{
42 uint32_t lo = *(hiref + 1);
43#if (BITS_PER_LONG == 64)
44 uint32_t hi = *hiref;
45 return (HILO_U64(hi, lo));
46#else
47 return (lo);
48#endif
49}
50
51static inline uint16_t
52bxe_get_port_stats_dma_len(struct bxe_softc *sc)
53{
54 uint16_t res = 0;
55 uint32_t size;
56
57 /* 'newest' convention - shmem2 contains the size of the port stats */
58 if (SHMEM2_HAS(sc, sizeof_port_stats)) {
59 size = SHMEM2_RD(sc, sizeof_port_stats);
60 if (size) {
61 res = size;
62 }
63
64 /* prevent newer BC from causing buffer overflow */
65 if (res > sizeof(struct host_port_stats)) {
66 res = sizeof(struct host_port_stats);
67 }
68 }
69
70 /*
71 * Older convention - all BCs support the port stats fields up until
72 * the 'not_used' field
73 */
74 if (!res) {
75 res = (offsetof(struct host_port_stats, not_used) + 4);
76
77 /* if PFC stats are supported by the MFW, DMA them as well */
78 if (sc->devinfo.bc_ver >= REQ_BC_VER_4_PFC_STATS_SUPPORTED) {
79 res += (offsetof(struct host_port_stats, pfc_frames_rx_lo) -
80 offsetof(struct host_port_stats, pfc_frames_tx_hi) + 4);
81 }
82 }
83
84 res >>= 2;
85
86 DBASSERT(sc, !(res > 2 * DMAE_LEN32_RD_MAX), ("big stats dmae length\n"));
87 return (res);
88}
89
90/*
91 * Init service functions
92 */
93
94static void
95bxe_dp_stats(struct bxe_softc *sc)
96{
97 int i;
98
99 BLOGD(sc, DBG_STATS,
100 "dumping stats:\n"
101 " fw_stats_req\n"
102 " hdr\n"
103 " cmd_num %d\n"
104 " reserved0 %d\n"
105 " drv_stats_counter %d\n"
106 " reserved1 %d\n"
107 " stats_counters_addrs %x %x\n",
108 sc->fw_stats_req->hdr.cmd_num,
109 sc->fw_stats_req->hdr.reserved0,
110 sc->fw_stats_req->hdr.drv_stats_counter,
111 sc->fw_stats_req->hdr.reserved1,
112 sc->fw_stats_req->hdr.stats_counters_addrs.hi,
113 sc->fw_stats_req->hdr.stats_counters_addrs.lo);
114
115 for (i = 0; i < sc->fw_stats_req->hdr.cmd_num; i++) {
116 BLOGD(sc, DBG_STATS,
117 "query[%d]\n"
118 " kind %d\n"
119 " index %d\n"
120 " funcID %d\n"
121 " reserved %d\n"
122 " address %x %x\n",
123 i,
124 sc->fw_stats_req->query[i].kind,
125 sc->fw_stats_req->query[i].index,
126 sc->fw_stats_req->query[i].funcID,
127 sc->fw_stats_req->query[i].reserved,
128 sc->fw_stats_req->query[i].address.hi,
129 sc->fw_stats_req->query[i].address.lo);
130 }
131}
132
133/*
134 * Post the next statistics ramrod. Protect it with the lock in
135 * order to ensure the strict order between statistics ramrods
136 * (each ramrod has a sequence number passed in a
137 * sc->fw_stats_req->hdr.drv_stats_counter and ramrods must be
138 * sent in order).
139 */
140static void
141bxe_storm_stats_post(struct bxe_softc *sc)
142{
143 int rc;
144
145 if (!sc->stats_pending) {
146 BXE_STATS_LOCK(sc);
147
148 if (sc->stats_pending) {
149 BXE_STATS_UNLOCK(sc);
150 return;
151 }
152
153 sc->fw_stats_req->hdr.drv_stats_counter =
154 htole16(sc->stats_counter++);
155
156 BLOGD(sc, DBG_STATS,
157 "sending statistics ramrod %d\n",
158 le16toh(sc->fw_stats_req->hdr.drv_stats_counter));
159
160 /* adjust the ramrod to include VF queues statistics */
161 // XXX bxe_iov_adjust_stats_req(sc);
162
163 bxe_dp_stats(sc);
164
165 /* send FW stats ramrod */
166 rc = bxe_sp_post(sc, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
167 U64_HI(sc->fw_stats_req_mapping),
168 U64_LO(sc->fw_stats_req_mapping),
169 NONE_CONNECTION_TYPE);
170 if (rc == 0) {
171 sc->stats_pending = 1;
172 }
173
174 BXE_STATS_UNLOCK(sc);
175 }
176}
177
178static void
179bxe_hw_stats_post(struct bxe_softc *sc)
180{
181 struct dmae_command *dmae = &sc->stats_dmae;
182 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
183 int loader_idx;
184 uint32_t opcode;
185
186 *stats_comp = DMAE_COMP_VAL;
187 if (CHIP_REV_IS_SLOW(sc)) {
188 return;
189 }
190
191 /* Update MCP's statistics if possible */
192 if (sc->func_stx) {
193 memcpy(BXE_SP(sc, func_stats), &sc->func_stats,
194 sizeof(sc->func_stats));
195 }
196
197 /* loader */
198 if (sc->executer_idx) {
199 loader_idx = PMF_DMAE_C(sc);
200 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC,
201 TRUE, DMAE_COMP_GRC);
202 opcode = bxe_dmae_opcode_clr_src_reset(opcode);
203
204 memset(dmae, 0, sizeof(struct dmae_command));
205 dmae->opcode = opcode;
206 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, dmae[0]));
207 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, dmae[0]));
208 dmae->dst_addr_lo = ((DMAE_REG_CMD_MEM +
209 sizeof(struct dmae_command) *
210 (loader_idx + 1)) >> 2);
211 dmae->dst_addr_hi = 0;
212 dmae->len = sizeof(struct dmae_command) >> 2;
213 if (CHIP_IS_E1(sc)) {
214 dmae->len--;
215 }
216 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx + 1] >> 2);
217 dmae->comp_addr_hi = 0;
218 dmae->comp_val = 1;
219
220 *stats_comp = 0;
221 bxe_post_dmae(sc, dmae, loader_idx);
222 } else if (sc->func_stx) {
223 *stats_comp = 0;
224 bxe_post_dmae(sc, dmae, INIT_DMAE_C(sc));
225 }
226}
227
228static int
229bxe_stats_comp(struct bxe_softc *sc)
230{
231 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
232 int cnt = 10;
233
234 while (*stats_comp != DMAE_COMP_VAL) {
235 if (!cnt) {
236 BLOGE(sc, "Timeout waiting for stats finished\n");
237 break;
238 }
239
240 cnt--;
241 DELAY(1000);
242 }
243
244 return (1);
245}
246
247/*
248 * Statistics service functions
249 */
250
251static void
252bxe_stats_pmf_update(struct bxe_softc *sc)
253{
254 struct dmae_command *dmae;
255 uint32_t opcode;
256 int loader_idx = PMF_DMAE_C(sc);
257 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
258
259 if (sc->devinfo.bc_ver <= 0x06001400) {
260 /*
261 * Bootcode v6.0.21 fixed a GRC timeout that occurs when accessing
262 * BRB registers while the BRB block is in reset. The DMA transfer
263 * below triggers this issue resulting in the DMAE to stop
264 * functioning. Skip this initial stats transfer for old bootcode
265 * versions <= 6.0.20.
266 */
267 return;
268 }
269
270 /* sanity */
271 if (!sc->port.pmf || !sc->port.port_stx) {
272 BLOGE(sc, "BUG!\n");
273 return;
274 }
275
276 sc->executer_idx = 0;
277
278 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, FALSE, 0);
279
280 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
281 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
282 dmae->src_addr_lo = (sc->port.port_stx >> 2);
283 dmae->src_addr_hi = 0;
284 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats));
285 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats));
286 dmae->len = DMAE_LEN32_RD_MAX;
287 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
288 dmae->comp_addr_hi = 0;
289 dmae->comp_val = 1;
290
291 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
292 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
293 dmae->src_addr_lo = ((sc->port.port_stx >> 2) + DMAE_LEN32_RD_MAX);
294 dmae->src_addr_hi = 0;
295 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats) +
296 DMAE_LEN32_RD_MAX * 4);
297 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats) +
298 DMAE_LEN32_RD_MAX * 4);
299 dmae->len = (bxe_get_port_stats_dma_len(sc) - DMAE_LEN32_RD_MAX);
300
301 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
302 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
303 dmae->comp_val = DMAE_COMP_VAL;
304
305 *stats_comp = 0;
306 bxe_hw_stats_post(sc);
307 bxe_stats_comp(sc);
308}
309
310static void
311bxe_port_stats_init(struct bxe_softc *sc)
312{
313 struct dmae_command *dmae;
314 int port = SC_PORT(sc);
315 uint32_t opcode;
316 int loader_idx = PMF_DMAE_C(sc);
317 uint32_t mac_addr;
318 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
319
320 /* sanity */
321 if (!sc->link_vars.link_up || !sc->port.pmf) {
322 BLOGE(sc, "BUG!\n");
323 return;
324 }
325
326 sc->executer_idx = 0;
327
328 /* MCP */
329 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC,
330 TRUE, DMAE_COMP_GRC);
331
332 if (sc->port.port_stx) {
333 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
334 dmae->opcode = opcode;
335 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats));
336 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats));
337 dmae->dst_addr_lo = sc->port.port_stx >> 2;
338 dmae->dst_addr_hi = 0;
339 dmae->len = bxe_get_port_stats_dma_len(sc);
340 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
341 dmae->comp_addr_hi = 0;
342 dmae->comp_val = 1;
343 }
344
345 if (sc->func_stx) {
346 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
347 dmae->opcode = opcode;
348 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats));
349 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats));
350 dmae->dst_addr_lo = (sc->func_stx >> 2);
351 dmae->dst_addr_hi = 0;
352 dmae->len = (sizeof(struct host_func_stats) >> 2);
353 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
354 dmae->comp_addr_hi = 0;
355 dmae->comp_val = 1;
356 }
357
358 /* MAC */
359 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI,
360 TRUE, DMAE_COMP_GRC);
361
362 /* EMAC is special */
363 if (sc->link_vars.mac_type == ELINK_MAC_TYPE_EMAC) {
364 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
365
366 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
367 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
368 dmae->opcode = opcode;
369 dmae->src_addr_lo = (mac_addr + EMAC_REG_EMAC_RX_STAT_AC) >> 2;
370 dmae->src_addr_hi = 0;
371 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats));
372 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats));
373 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
374 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
375 dmae->comp_addr_hi = 0;
376 dmae->comp_val = 1;
377
378 /* EMAC_REG_EMAC_RX_STAT_AC_28 */
379 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
380 dmae->opcode = opcode;
381 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_RX_STAT_AC_28) >> 2);
382 dmae->src_addr_hi = 0;
383 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) +
384 offsetof(struct emac_stats,
385 rx_stat_falsecarriererrors));
386 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) +
387 offsetof(struct emac_stats,
388 rx_stat_falsecarriererrors));
389 dmae->len = 1;
390 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
391 dmae->comp_addr_hi = 0;
392 dmae->comp_val = 1;
393
394 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
395 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
396 dmae->opcode = opcode;
397 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_TX_STAT_AC) >> 2);
398 dmae->src_addr_hi = 0;
399 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) +
400 offsetof(struct emac_stats,
401 tx_stat_ifhcoutoctets));
402 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) +
403 offsetof(struct emac_stats,
404 tx_stat_ifhcoutoctets));
405 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
406 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
407 dmae->comp_addr_hi = 0;
408 dmae->comp_val = 1;
409 } else {
410 uint32_t tx_src_addr_lo, rx_src_addr_lo;
411 uint16_t rx_len, tx_len;
412
413 /* configure the params according to MAC type */
414 switch (sc->link_vars.mac_type) {
415 case ELINK_MAC_TYPE_BMAC:
416 mac_addr = (port) ? NIG_REG_INGRESS_BMAC1_MEM :
417 NIG_REG_INGRESS_BMAC0_MEM;
418
419 /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
420 BIGMAC_REGISTER_TX_STAT_GTBYT */
421 if (CHIP_IS_E1x(sc)) {
422 tx_src_addr_lo =
423 ((mac_addr + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2);
424 tx_len = ((8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
425 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2);
426 rx_src_addr_lo =
427 ((mac_addr + BIGMAC_REGISTER_RX_STAT_GR64) >> 2);
428 rx_len = ((8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
429 BIGMAC_REGISTER_RX_STAT_GR64) >> 2);
430 } else {
431 tx_src_addr_lo =
432 ((mac_addr + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2);
433 tx_len = ((8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
434 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2);
435 rx_src_addr_lo =
436 ((mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2);
437 rx_len = ((8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
438 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2);
439 }
440
441 break;
442
443 case ELINK_MAC_TYPE_UMAC: /* handled by MSTAT */
444 case ELINK_MAC_TYPE_XMAC: /* handled by MSTAT */
445 default:
446 mac_addr = (port) ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
447 tx_src_addr_lo = ((mac_addr + MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2);
448 rx_src_addr_lo = ((mac_addr + MSTAT_REG_RX_STAT_GR64_LO) >> 2);
449 tx_len =
450 (sizeof(sc->sp->mac_stats.mstat_stats.stats_tx) >> 2);
451 rx_len =
452 (sizeof(sc->sp->mac_stats.mstat_stats.stats_rx) >> 2);
453 break;
454 }
455
456 /* TX stats */
457 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
458 dmae->opcode = opcode;
459 dmae->src_addr_lo = tx_src_addr_lo;
460 dmae->src_addr_hi = 0;
461 dmae->len = tx_len;
462 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats));
463 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats));
464 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
465 dmae->comp_addr_hi = 0;
466 dmae->comp_val = 1;
467
468 /* RX stats */
469 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
470 dmae->opcode = opcode;
471 dmae->src_addr_hi = 0;
472 dmae->src_addr_lo = rx_src_addr_lo;
473 dmae->dst_addr_lo =
474 U64_LO(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2));
475 dmae->dst_addr_hi =
476 U64_HI(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2));
477 dmae->len = rx_len;
478 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
479 dmae->comp_addr_hi = 0;
480 dmae->comp_val = 1;
481 }
482
483 /* NIG */
484 if (!CHIP_IS_E3(sc)) {
485 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
486 dmae->opcode = opcode;
487 dmae->src_addr_lo =
488 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
489 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
490 dmae->src_addr_hi = 0;
491 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) +
492 offsetof(struct nig_stats,
493 egress_mac_pkt0_lo));
494 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) +
495 offsetof(struct nig_stats,
496 egress_mac_pkt0_lo));
497 dmae->len = ((2 * sizeof(uint32_t)) >> 2);
498 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
499 dmae->comp_addr_hi = 0;
500 dmae->comp_val = 1;
501
502 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
503 dmae->opcode = opcode;
504 dmae->src_addr_lo =
505 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
506 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
507 dmae->src_addr_hi = 0;
508 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) +
509 offsetof(struct nig_stats,
510 egress_mac_pkt1_lo));
511 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) +
512 offsetof(struct nig_stats,
513 egress_mac_pkt1_lo));
514 dmae->len = ((2 * sizeof(uint32_t)) >> 2);
515 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
516 dmae->comp_addr_hi = 0;
517 dmae->comp_val = 1;
518 }
519
520 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
521 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI,
522 TRUE, DMAE_COMP_PCI);
523 dmae->src_addr_lo =
524 (port ? NIG_REG_STAT1_BRB_DISCARD :
525 NIG_REG_STAT0_BRB_DISCARD) >> 2;
526 dmae->src_addr_hi = 0;
527 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats));
528 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats));
529 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(uint32_t)) >> 2;
530
531 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
532 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
533 dmae->comp_val = DMAE_COMP_VAL;
534
535 *stats_comp = 0;
536}
537
538static void
539bxe_func_stats_init(struct bxe_softc *sc)
540{
541 struct dmae_command *dmae = &sc->stats_dmae;
542 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
543
544 /* sanity */
545 if (!sc->func_stx) {
546 BLOGE(sc, "BUG!\n");
547 return;
548 }
549
550 sc->executer_idx = 0;
551 memset(dmae, 0, sizeof(struct dmae_command));
552
553 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC,
554 TRUE, DMAE_COMP_PCI);
555 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats));
556 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats));
557 dmae->dst_addr_lo = (sc->func_stx >> 2);
558 dmae->dst_addr_hi = 0;
559 dmae->len = (sizeof(struct host_func_stats) >> 2);
560 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
561 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
562 dmae->comp_val = DMAE_COMP_VAL;
563
564 *stats_comp = 0;
565}
566
567static void
568bxe_stats_start(struct bxe_softc *sc)
569{
570 /*
571 * VFs travel through here as part of the statistics FSM, but no action
572 * is required
573 */
574 if (IS_VF(sc)) {
575 return;
576 }
577
578 if (sc->port.pmf) {
579 bxe_port_stats_init(sc);
580 }
581
582 else if (sc->func_stx) {
583 bxe_func_stats_init(sc);
584 }
585
586 bxe_hw_stats_post(sc);
587 bxe_storm_stats_post(sc);
588}
589
590static void
591bxe_stats_pmf_start(struct bxe_softc *sc)
592{
593 bxe_stats_comp(sc);
594 bxe_stats_pmf_update(sc);
595 bxe_stats_start(sc);
596}
597
598static void
599bxe_stats_restart(struct bxe_softc *sc)
600{
601 /*
602 * VFs travel through here as part of the statistics FSM, but no action
603 * is required
604 */
605 if (IS_VF(sc)) {
606 return;
607 }
608
609 bxe_stats_comp(sc);
610 bxe_stats_start(sc);
611}
612
613static void
614bxe_bmac_stats_update(struct bxe_softc *sc)
615{
616 struct host_port_stats *pstats = BXE_SP(sc, port_stats);
617 struct bxe_eth_stats *estats = &sc->eth_stats;
618 struct {
619 uint32_t lo;
620 uint32_t hi;
621 } diff;
622
623 if (CHIP_IS_E1x(sc)) {
624 struct bmac1_stats *new = BXE_SP(sc, mac_stats.bmac1_stats);
625
626 /* the macros below will use "bmac1_stats" type */
627 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
628 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
629 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
630 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
631 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
632 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
633 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
634 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
635 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
636
637 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
638 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
639 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
640 UPDATE_STAT64(tx_stat_gt127,
641 tx_stat_etherstatspkts65octetsto127octets);
642 UPDATE_STAT64(tx_stat_gt255,
643 tx_stat_etherstatspkts128octetsto255octets);
644 UPDATE_STAT64(tx_stat_gt511,
645 tx_stat_etherstatspkts256octetsto511octets);
646 UPDATE_STAT64(tx_stat_gt1023,
647 tx_stat_etherstatspkts512octetsto1023octets);
648 UPDATE_STAT64(tx_stat_gt1518,
649 tx_stat_etherstatspkts1024octetsto1522octets);
650 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
651 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
652 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
653 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
654 UPDATE_STAT64(tx_stat_gterr,
655 tx_stat_dot3statsinternalmactransmiterrors);
656 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
657 } else {
658 struct bmac2_stats *new = BXE_SP(sc, mac_stats.bmac2_stats);
659 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old;
660
661 /* the macros below will use "bmac2_stats" type */
662 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
663 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
664 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
665 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
666 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
667 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
668 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
669 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
670 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
671 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
672 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
673 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
674 UPDATE_STAT64(tx_stat_gt127,
675 tx_stat_etherstatspkts65octetsto127octets);
676 UPDATE_STAT64(tx_stat_gt255,
677 tx_stat_etherstatspkts128octetsto255octets);
678 UPDATE_STAT64(tx_stat_gt511,
679 tx_stat_etherstatspkts256octetsto511octets);
680 UPDATE_STAT64(tx_stat_gt1023,
681 tx_stat_etherstatspkts512octetsto1023octets);
682 UPDATE_STAT64(tx_stat_gt1518,
683 tx_stat_etherstatspkts1024octetsto1522octets);
684 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
685 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
686 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
687 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
688 UPDATE_STAT64(tx_stat_gterr,
689 tx_stat_dot3statsinternalmactransmiterrors);
690 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
691
692 /* collect PFC stats */
693 pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
694 pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
695 ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_hi,
696 pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_lo);
697
698 pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
699 pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
700 ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_hi,
701 pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_lo);
702 }
703
704 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi;
705 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo;
706
707 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi;
708 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo;
709
710 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi;
711 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo;
712 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi;
713 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo;
714}
715
716static void
717bxe_mstat_stats_update(struct bxe_softc *sc)
718{
719 struct host_port_stats *pstats = BXE_SP(sc, port_stats);
720 struct bxe_eth_stats *estats = &sc->eth_stats;
721 struct mstat_stats *new = BXE_SP(sc, mac_stats.mstat_stats);
722
723 ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
724 ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
725 ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
726 ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
727 ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
728 ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
729 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
730 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
731 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
732 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
733
734 /* collect pfc stats */
735 ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
736 pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
737 ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
738 pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
739
740 ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
741 ADD_STAT64(stats_tx.tx_gt127, tx_stat_etherstatspkts65octetsto127octets);
742 ADD_STAT64(stats_tx.tx_gt255, tx_stat_etherstatspkts128octetsto255octets);
743 ADD_STAT64(stats_tx.tx_gt511, tx_stat_etherstatspkts256octetsto511octets);
744 ADD_STAT64(stats_tx.tx_gt1023,
745 tx_stat_etherstatspkts512octetsto1023octets);
746 ADD_STAT64(stats_tx.tx_gt1518,
747 tx_stat_etherstatspkts1024octetsto1522octets);
748 ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
749
750 ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
751 ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
752 ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
753
754 ADD_STAT64(stats_tx.tx_gterr, tx_stat_dot3statsinternalmactransmiterrors);
755 ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
756
757 estats->etherstatspkts1024octetsto1522octets_hi =
758 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
759 estats->etherstatspkts1024octetsto1522octets_lo =
760 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
761
762 estats->etherstatspktsover1522octets_hi =
763 pstats->mac_stx[1].tx_stat_mac_2047_hi;
764 estats->etherstatspktsover1522octets_lo =
765 pstats->mac_stx[1].tx_stat_mac_2047_lo;
766
767 ADD_64(estats->etherstatspktsover1522octets_hi,
768 pstats->mac_stx[1].tx_stat_mac_4095_hi,
769 estats->etherstatspktsover1522octets_lo,
770 pstats->mac_stx[1].tx_stat_mac_4095_lo);
771
772 ADD_64(estats->etherstatspktsover1522octets_hi,
773 pstats->mac_stx[1].tx_stat_mac_9216_hi,
774 estats->etherstatspktsover1522octets_lo,
775 pstats->mac_stx[1].tx_stat_mac_9216_lo);
776
777 ADD_64(estats->etherstatspktsover1522octets_hi,
778 pstats->mac_stx[1].tx_stat_mac_16383_hi,
779 estats->etherstatspktsover1522octets_lo,
780 pstats->mac_stx[1].tx_stat_mac_16383_lo);
781
782 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi;
783 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo;
784
785 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi;
786 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo;
787
788 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi;
789 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo;
790 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi;
791 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo;
792}
793
794static void
795bxe_emac_stats_update(struct bxe_softc *sc)
796{
797 struct emac_stats *new = BXE_SP(sc, mac_stats.emac_stats);
798 struct host_port_stats *pstats = BXE_SP(sc, port_stats);
799 struct bxe_eth_stats *estats = &sc->eth_stats;
800
801 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
802 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
803 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
804 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
805 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
806 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
807 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
808 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
809 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
810 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
811 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
812 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
813 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
814 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
815 UPDATE_EXTEND_STAT(tx_stat_outxonsent);
816 UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
817 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
818 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
819 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
820 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
821 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
822 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
823 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
824 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
825 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
826 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
827 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
828 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
829 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
830 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
831 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
832
833 estats->pause_frames_received_hi =
834 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
835 estats->pause_frames_received_lo =
836 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
837 ADD_64(estats->pause_frames_received_hi,
838 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
839 estats->pause_frames_received_lo,
840 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
841
842 estats->pause_frames_sent_hi =
843 pstats->mac_stx[1].tx_stat_outxonsent_hi;
844 estats->pause_frames_sent_lo =
845 pstats->mac_stx[1].tx_stat_outxonsent_lo;
846 ADD_64(estats->pause_frames_sent_hi,
847 pstats->mac_stx[1].tx_stat_outxoffsent_hi,
848 estats->pause_frames_sent_lo,
849 pstats->mac_stx[1].tx_stat_outxoffsent_lo);
850}
851
852static int
853bxe_hw_stats_update(struct bxe_softc *sc)
854{
855 struct nig_stats *new = BXE_SP(sc, nig_stats);
856 struct nig_stats *old = &(sc->port.old_nig_stats);
857 struct host_port_stats *pstats = BXE_SP(sc, port_stats);
858 struct bxe_eth_stats *estats = &sc->eth_stats;
859 uint32_t lpi_reg, nig_timer_max;
860 struct {
861 uint32_t lo;
862 uint32_t hi;
863 } diff;
864
865 switch (sc->link_vars.mac_type) {
866 case ELINK_MAC_TYPE_BMAC:
867 bxe_bmac_stats_update(sc);
868 break;
869
870 case ELINK_MAC_TYPE_EMAC:
871 bxe_emac_stats_update(sc);
872 break;
873
874 case ELINK_MAC_TYPE_UMAC:
875 case ELINK_MAC_TYPE_XMAC:
876 bxe_mstat_stats_update(sc);
877 break;
878
879 case ELINK_MAC_TYPE_NONE: /* unreached */
880 BLOGD(sc, DBG_STATS,
881 "stats updated by DMAE but no MAC active\n");
882 return (-1);
883
884 default: /* unreached */
885 BLOGE(sc, "stats update failed, unknown MAC type\n");
886 }
887
888 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
889 new->brb_discard - old->brb_discard);
890 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
891 new->brb_truncate - old->brb_truncate);
892
893 if (!CHIP_IS_E3(sc)) {
894 UPDATE_STAT64_NIG(egress_mac_pkt0,
895 etherstatspkts1024octetsto1522octets);
896 UPDATE_STAT64_NIG(egress_mac_pkt1,
897 etherstatspktsover1522octets);
898 }
899
900 memcpy(old, new, sizeof(struct nig_stats));
901
902 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
903 sizeof(struct mac_stx));
904 estats->brb_drop_hi = pstats->brb_drop_hi;
905 estats->brb_drop_lo = pstats->brb_drop_lo;
906
907 pstats->host_port_stats_counter++;
908
909 if (CHIP_IS_E3(sc)) {
910 lpi_reg = (SC_PORT(sc)) ?
911 MISC_REG_CPMU_LP_SM_ENT_CNT_P1 :
912 MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
913 estats->eee_tx_lpi += REG_RD(sc, lpi_reg);
914 }
915
916 if (!BXE_NOMCP(sc)) {
917 nig_timer_max = SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_nig_timer);
918 if (nig_timer_max != estats->nig_timer_max) {
919 estats->nig_timer_max = nig_timer_max;
920 BLOGE(sc, "invalid NIG timer max (%u)\n",
921 estats->nig_timer_max);
922 }
923 }
924
925 return (0);
926}
927
928static int
929bxe_storm_stats_validate_counters(struct bxe_softc *sc)
930{
931 struct stats_counter *counters = &sc->fw_stats_data->storm_counters;
932 uint16_t cur_stats_counter;
933
934 /*
935 * Make sure we use the value of the counter
936 * used for sending the last stats ramrod.
937 */
938 BXE_STATS_LOCK(sc);
939 cur_stats_counter = (sc->stats_counter - 1);
940 BXE_STATS_UNLOCK(sc);
941
942 /* are storm stats valid? */
943 if (le16toh(counters->xstats_counter) != cur_stats_counter) {
944 BLOGD(sc, DBG_STATS,
945 "stats not updated by xstorm, "
946 "counter 0x%x != stats_counter 0x%x\n",
947 le16toh(counters->xstats_counter), sc->stats_counter);
948 return (-EAGAIN);
949 }
950
951 if (le16toh(counters->ustats_counter) != cur_stats_counter) {
952 BLOGD(sc, DBG_STATS,
953 "stats not updated by ustorm, "
954 "counter 0x%x != stats_counter 0x%x\n",
955 le16toh(counters->ustats_counter), sc->stats_counter);
956 return (-EAGAIN);
957 }
958
959 if (le16toh(counters->cstats_counter) != cur_stats_counter) {
960 BLOGD(sc, DBG_STATS,
961 "stats not updated by cstorm, "
962 "counter 0x%x != stats_counter 0x%x\n",
963 le16toh(counters->cstats_counter), sc->stats_counter);
964 return (-EAGAIN);
965 }
966
967 if (le16toh(counters->tstats_counter) != cur_stats_counter) {
968 BLOGD(sc, DBG_STATS,
969 "stats not updated by tstorm, "
970 "counter 0x%x != stats_counter 0x%x\n",
971 le16toh(counters->tstats_counter), sc->stats_counter);
972 return (-EAGAIN);
973 }
974
975 return (0);
976}
977
978static int
979bxe_storm_stats_update(struct bxe_softc *sc)
980{
981 struct tstorm_per_port_stats *tport =
982 &sc->fw_stats_data->port.tstorm_port_statistics;
983 struct tstorm_per_pf_stats *tfunc =
984 &sc->fw_stats_data->pf.tstorm_pf_statistics;
985 struct host_func_stats *fstats = &sc->func_stats;
986 struct bxe_eth_stats *estats = &sc->eth_stats;
987 struct bxe_eth_stats_old *estats_old = &sc->eth_stats_old;
988 int i;
989
990 /* vfs stat counter is managed by pf */
991 if (IS_PF(sc) && bxe_storm_stats_validate_counters(sc)) {
992 return (-EAGAIN);
993 }
994
995 estats->error_bytes_received_hi = 0;
996 estats->error_bytes_received_lo = 0;
997
998 for (i = 0; i < sc->num_queues; i++) {
999 struct bxe_fastpath *fp = &sc->fp[i];
1000 struct tstorm_per_queue_stats *tclient =
1001 &sc->fw_stats_data->queue_stats[i].tstorm_queue_statistics;
1002 struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient;
1003 struct ustorm_per_queue_stats *uclient =
1004 &sc->fw_stats_data->queue_stats[i].ustorm_queue_statistics;
1005 struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient;
1006 struct xstorm_per_queue_stats *xclient =
1007 &sc->fw_stats_data->queue_stats[i].xstorm_queue_statistics;
1008 struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient;
1009 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats;
1010 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old;
1011
1012 uint32_t diff;
1013
1014 BLOGD(sc, DBG_STATS,
1015 "queue[%d]: ucast_sent 0x%x bcast_sent 0x%x mcast_sent 0x%x\n",
1016 i, xclient->ucast_pkts_sent, xclient->bcast_pkts_sent,
1017 xclient->mcast_pkts_sent);
1018
1019 BLOGD(sc, DBG_STATS, "---------------\n");
1020
1021 UPDATE_QSTAT(tclient->rcv_bcast_bytes,
1022 total_broadcast_bytes_received);
1023 UPDATE_QSTAT(tclient->rcv_mcast_bytes,
1024 total_multicast_bytes_received);
1025 UPDATE_QSTAT(tclient->rcv_ucast_bytes,
1026 total_unicast_bytes_received);
1027
1028 /*
1029 * sum to total_bytes_received all
1030 * unicast/multicast/broadcast
1031 */
1032 qstats->total_bytes_received_hi =
1033 qstats->total_broadcast_bytes_received_hi;
1034 qstats->total_bytes_received_lo =
1035 qstats->total_broadcast_bytes_received_lo;
1036
1037 ADD_64(qstats->total_bytes_received_hi,
1038 qstats->total_multicast_bytes_received_hi,
1039 qstats->total_bytes_received_lo,
1040 qstats->total_multicast_bytes_received_lo);
1041
1042 ADD_64(qstats->total_bytes_received_hi,
1043 qstats->total_unicast_bytes_received_hi,
1044 qstats->total_bytes_received_lo,
1045 qstats->total_unicast_bytes_received_lo);
1046
1047 qstats->valid_bytes_received_hi = qstats->total_bytes_received_hi;
1048 qstats->valid_bytes_received_lo = qstats->total_bytes_received_lo;
1049
1050 UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, total_unicast_packets_received);
1051 UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, total_multicast_packets_received);
1052 UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, total_broadcast_packets_received);
1053 UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
1054 etherstatsoverrsizepkts, 32);
1055 UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
1056
1057 SUB_EXTEND_USTAT(ucast_no_buff_pkts, total_unicast_packets_received);
1058 SUB_EXTEND_USTAT(mcast_no_buff_pkts,
1059 total_multicast_packets_received);
1060 SUB_EXTEND_USTAT(bcast_no_buff_pkts,
1061 total_broadcast_packets_received);
1062 UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
1063 UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
1064 UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
1065
1066 UPDATE_QSTAT(xclient->bcast_bytes_sent,
1067 total_broadcast_bytes_transmitted);
1068 UPDATE_QSTAT(xclient->mcast_bytes_sent,
1069 total_multicast_bytes_transmitted);
1070 UPDATE_QSTAT(xclient->ucast_bytes_sent,
1071 total_unicast_bytes_transmitted);
1072
1073 /*
1074 * sum to total_bytes_transmitted all
1075 * unicast/multicast/broadcast
1076 */
1077 qstats->total_bytes_transmitted_hi =
1078 qstats->total_unicast_bytes_transmitted_hi;
1079 qstats->total_bytes_transmitted_lo =
1080 qstats->total_unicast_bytes_transmitted_lo;
1081
1082 ADD_64(qstats->total_bytes_transmitted_hi,
1083 qstats->total_broadcast_bytes_transmitted_hi,
1084 qstats->total_bytes_transmitted_lo,
1085 qstats->total_broadcast_bytes_transmitted_lo);
1086
1087 ADD_64(qstats->total_bytes_transmitted_hi,
1088 qstats->total_multicast_bytes_transmitted_hi,
1089 qstats->total_bytes_transmitted_lo,
1090 qstats->total_multicast_bytes_transmitted_lo);
1091
1092 UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
1093 total_unicast_packets_transmitted);
1094 UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
1095 total_multicast_packets_transmitted);
1096 UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
1097 total_broadcast_packets_transmitted);
1098
1099 UPDATE_EXTEND_TSTAT(checksum_discard,
1100 total_packets_received_checksum_discarded);
1101 UPDATE_EXTEND_TSTAT(ttl0_discard,
1102 total_packets_received_ttl0_discarded);
1103
1104 UPDATE_EXTEND_XSTAT(error_drop_pkts,
1105 total_transmitted_dropped_packets_error);
1106
1107 /* TPA aggregations completed */
1108 UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
1109 /* Number of network frames aggregated by TPA */
1110 UPDATE_EXTEND_E_USTAT(coalesced_pkts, total_tpa_aggregated_frames);
1111 /* Total number of bytes in completed TPA aggregations */
1112 UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
1113
1114 UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
1115
1116 UPDATE_FSTAT_QSTAT(total_bytes_received);
1117 UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
1118 UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
1119 UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
1120 UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
1121 UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
1122 UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
1123 UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
1124 UPDATE_FSTAT_QSTAT(valid_bytes_received);
1125 }
1126
1127 ADD_64(estats->total_bytes_received_hi,
1128 estats->rx_stat_ifhcinbadoctets_hi,
1129 estats->total_bytes_received_lo,
1130 estats->rx_stat_ifhcinbadoctets_lo);
1131
1132 ADD_64_LE(estats->total_bytes_received_hi,
1133 tfunc->rcv_error_bytes.hi,
1134 estats->total_bytes_received_lo,
1135 tfunc->rcv_error_bytes.lo);
1136
1137 ADD_64_LE(estats->error_bytes_received_hi,
1138 tfunc->rcv_error_bytes.hi,
1139 estats->error_bytes_received_lo,
1140 tfunc->rcv_error_bytes.lo);
1141
1142 UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
1143
1144 ADD_64(estats->error_bytes_received_hi,
1145 estats->rx_stat_ifhcinbadoctets_hi,
1146 estats->error_bytes_received_lo,
1147 estats->rx_stat_ifhcinbadoctets_lo);
1148
1149 if (sc->port.pmf) {
1150 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old;
1151 UPDATE_FW_STAT(mac_filter_discard);
1152 UPDATE_FW_STAT(mf_tag_discard);
1153 UPDATE_FW_STAT(brb_truncate_discard);
1154 UPDATE_FW_STAT(mac_discard);
1155 }
1156
1157 fstats->host_func_stats_start = ++fstats->host_func_stats_end;
1158
1159 sc->stats_pending = 0;
1160
1161 return (0);
1162}
1163
1164static void
1165bxe_net_stats_update(struct bxe_softc *sc)
1166{
1167
1168 for (int i = 0; i < sc->num_queues; i++)
1169 if_inc_counter(sc->ifp, IFCOUNTER_IQDROPS,
1170 le32toh(sc->fp[i].old_tclient.checksum_discard));
1171}
1172
1173uint64_t
1174bxe_get_counter(if_t ifp, ift_counter cnt)
1175{
1176 struct bxe_softc *sc;
1177 struct bxe_eth_stats *estats;
1178
1179 sc = if_getsoftc(ifp);
1180 estats = &sc->eth_stats;
1181
1182 switch (cnt) {
1183 case IFCOUNTER_IPACKETS:
1184 return (bxe_hilo(&estats->total_unicast_packets_received_hi) +
1185 bxe_hilo(&estats->total_multicast_packets_received_hi) +
1186 bxe_hilo(&estats->total_broadcast_packets_received_hi));
1187 case IFCOUNTER_OPACKETS:
1188 return (bxe_hilo(&estats->total_unicast_packets_transmitted_hi) +
1189 bxe_hilo(&estats->total_multicast_packets_transmitted_hi) +
1190 bxe_hilo(&estats->total_broadcast_packets_transmitted_hi));
1191 case IFCOUNTER_IBYTES:
1192 return (bxe_hilo(&estats->total_bytes_received_hi));
1193 case IFCOUNTER_OBYTES:
1194 return (bxe_hilo(&estats->total_bytes_transmitted_hi));
1195 case IFCOUNTER_IERRORS:
1196 return (bxe_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
1197 bxe_hilo(&estats->etherstatsoverrsizepkts_hi) +
1198 bxe_hilo(&estats->brb_drop_hi) +
1199 bxe_hilo(&estats->brb_truncate_hi) +
1200 bxe_hilo(&estats->rx_stat_dot3statsfcserrors_hi) +
1201 bxe_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi) +
1202 bxe_hilo(&estats->no_buff_discard_hi));
1203 case IFCOUNTER_OERRORS:
1204 return (bxe_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi) +
1205 bxe_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi));
1206 case IFCOUNTER_IMCASTS:
1207 return (bxe_hilo(&estats->total_multicast_packets_received_hi));
1208 case IFCOUNTER_COLLISIONS:
1209 return (bxe_hilo(&estats->tx_stat_etherstatscollisions_hi) +
1210 bxe_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1211 bxe_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi));
1212 default:
1213 return (if_get_counter_default(ifp, cnt));
1214 }
1215}
1216
1217static void
1218bxe_drv_stats_update(struct bxe_softc *sc)
1219{
1220 struct bxe_eth_stats *estats = &sc->eth_stats;
1221 int i;
1222
1223 for (i = 0; i < sc->num_queues; i++) {
1224 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats;
1225 struct bxe_eth_q_stats_old *qstats_old = &sc->fp[i].eth_q_stats_old;
1226
1227 UPDATE_ESTAT_QSTAT(rx_calls);
1228 UPDATE_ESTAT_QSTAT(rx_pkts);
1229 UPDATE_ESTAT_QSTAT(rx_tpa_pkts);
1230 UPDATE_ESTAT_QSTAT(rx_erroneous_jumbo_sge_pkts);
1231 UPDATE_ESTAT_QSTAT(rx_bxe_service_rxsgl);
1232 UPDATE_ESTAT_QSTAT(rx_jumbo_sge_pkts);
1233 UPDATE_ESTAT_QSTAT(rx_soft_errors);
1234 UPDATE_ESTAT_QSTAT(rx_hw_csum_errors);
1235 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip);
1236 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_tcp_udp);
1237 UPDATE_ESTAT_QSTAT(rx_budget_reached);
1238 UPDATE_ESTAT_QSTAT(tx_pkts);
1239 UPDATE_ESTAT_QSTAT(tx_soft_errors);
1240 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_ip);
1241 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_tcp);
1242 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_udp);
1243 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso);
1244 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso_hdr_splits);
1245 UPDATE_ESTAT_QSTAT(tx_encap_failures);
1246 UPDATE_ESTAT_QSTAT(tx_hw_queue_full);
1247 UPDATE_ESTAT_QSTAT(tx_hw_max_queue_depth);
1248 UPDATE_ESTAT_QSTAT(tx_dma_mapping_failure);
1249 UPDATE_ESTAT_QSTAT(tx_max_drbr_queue_depth);
1250 UPDATE_ESTAT_QSTAT(tx_window_violation_std);
1251 UPDATE_ESTAT_QSTAT(tx_window_violation_tso);
1252 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_ipv6);
1253 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_not_tcp);
1254 UPDATE_ESTAT_QSTAT(tx_chain_lost_mbuf);
1255 UPDATE_ESTAT_QSTAT(tx_frames_deferred);
1256 UPDATE_ESTAT_QSTAT(tx_queue_xoff);
1257
1258 /* mbuf driver statistics */
1259 UPDATE_ESTAT_QSTAT(mbuf_defrag_attempts);
1260 UPDATE_ESTAT_QSTAT(mbuf_defrag_failures);
1261 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_alloc_failed);
1262 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_mapping_failed);
1263 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_alloc_failed);
1264 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_mapping_failed);
1265 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_alloc_failed);
1266 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_mapping_failed);
1267
1268 /* track the number of allocated mbufs */
1269 UPDATE_ESTAT_QSTAT(mbuf_alloc_tx);
1270 UPDATE_ESTAT_QSTAT(mbuf_alloc_rx);
1271 UPDATE_ESTAT_QSTAT(mbuf_alloc_sge);
1272 UPDATE_ESTAT_QSTAT(mbuf_alloc_tpa);
1273 }
1274}
1275
1276static uint8_t
1277bxe_edebug_stats_stopped(struct bxe_softc *sc)
1278{
1279 uint32_t val;
1280
1281 if (SHMEM2_HAS(sc, edebug_driver_if[1])) {
1282 val = SHMEM2_RD(sc, edebug_driver_if[1]);
1283
1284 if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) {
1285 return (TRUE);
1286 }
1287 }
1288
1289 return (FALSE);
1290}
1291
1292static void
1293bxe_stats_update(struct bxe_softc *sc)
1294{
1295 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
1296
1297 if (bxe_edebug_stats_stopped(sc)) {
1298 return;
1299 }
1300
1301 if (IS_PF(sc)) {
1302 if (*stats_comp != DMAE_COMP_VAL) {
1303 return;
1304 }
1305
1306 if (sc->port.pmf) {
1307 bxe_hw_stats_update(sc);
1308 }
1309
1310 if (bxe_storm_stats_update(sc)) {
1311 if (sc->stats_pending++ == 3) {
1312 if (if_getdrvflags(sc->ifp) & IFF_DRV_RUNNING) {
1313 atomic_store_rel_long(&sc->chip_tq_flags, CHIP_TQ_REINIT);
1314 taskqueue_enqueue(sc->chip_tq, &sc->chip_tq_task);
1315 }
1316 }
1317 return;
1318 }
1319 } else {
1320 /*
1321 * VF doesn't collect HW statistics, and doesn't get completions,
1322 * performs only update.
1323 */
1324 bxe_storm_stats_update(sc);
1325 }
1326
1327 bxe_net_stats_update(sc);
1328 bxe_drv_stats_update(sc);
1329
1330 /* vf is done */
1331 if (IS_VF(sc)) {
1332 return;
1333 }
1334
1335 bxe_hw_stats_post(sc);
1336 bxe_storm_stats_post(sc);
1337}
1338
1339static void
1340bxe_port_stats_stop(struct bxe_softc *sc)
1341{
1342 struct dmae_command *dmae;
1343 uint32_t opcode;
1344 int loader_idx = PMF_DMAE_C(sc);
1345 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
1346
1347 sc->executer_idx = 0;
1348
1349 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, FALSE, 0);
1350
1351 if (sc->port.port_stx) {
1352 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
1353
1354 if (sc->func_stx) {
1355 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
1356 } else {
1357 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1358 }
1359
1360 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats));
1361 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats));
1362 dmae->dst_addr_lo = sc->port.port_stx >> 2;
1363 dmae->dst_addr_hi = 0;
1364 dmae->len = bxe_get_port_stats_dma_len(sc);
1365 if (sc->func_stx) {
1366 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2);
1367 dmae->comp_addr_hi = 0;
1368 dmae->comp_val = 1;
1369 } else {
1370 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
1371 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
1372 dmae->comp_val = DMAE_COMP_VAL;
1373
1374 *stats_comp = 0;
1375 }
1376 }
1377
1378 if (sc->func_stx) {
1379 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
1380 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1381 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats));
1382 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats));
1383 dmae->dst_addr_lo = (sc->func_stx >> 2);
1384 dmae->dst_addr_hi = 0;
1385 dmae->len = (sizeof(struct host_func_stats) >> 2);
1386 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
1387 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
1388 dmae->comp_val = DMAE_COMP_VAL;
1389
1390 *stats_comp = 0;
1391 }
1392}
1393
1394static void
1395bxe_stats_stop(struct bxe_softc *sc)
1396{
1397 uint8_t update = FALSE;
1398
1399 bxe_stats_comp(sc);
1400
1401 if (sc->port.pmf) {
1402 update = bxe_hw_stats_update(sc) == 0;
1403 }
1404
1405 update |= bxe_storm_stats_update(sc) == 0;
1406
1407 if (update) {
1408 bxe_net_stats_update(sc);
1409
1410 if (sc->port.pmf) {
1411 bxe_port_stats_stop(sc);
1412 }
1413
1414 bxe_hw_stats_post(sc);
1415 bxe_stats_comp(sc);
1416 }
1417}
1418
1419static void
1420bxe_stats_do_nothing(struct bxe_softc *sc)
1421{
1422 return;
1423}
1424
1425static const struct {
1426 void (*action)(struct bxe_softc *sc);
1427 enum bxe_stats_state next_state;
1428} bxe_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1429 {
1430 /* DISABLED PMF */ { bxe_stats_pmf_update, STATS_STATE_DISABLED },
1431 /* LINK_UP */ { bxe_stats_start, STATS_STATE_ENABLED },
1432 /* UPDATE */ { bxe_stats_do_nothing, STATS_STATE_DISABLED },
1433 /* STOP */ { bxe_stats_do_nothing, STATS_STATE_DISABLED }
1434 },
1435 {
1436 /* ENABLED PMF */ { bxe_stats_pmf_start, STATS_STATE_ENABLED },
1437 /* LINK_UP */ { bxe_stats_restart, STATS_STATE_ENABLED },
1438 /* UPDATE */ { bxe_stats_update, STATS_STATE_ENABLED },
1439 /* STOP */ { bxe_stats_stop, STATS_STATE_DISABLED }
1440 }
1441};
1442
1443void bxe_stats_handle(struct bxe_softc *sc,
1444 enum bxe_stats_event event)
1445{
1446 enum bxe_stats_state state;
1447
1448 if (__predict_false(sc->panic)) {
1449 return;
1450 }
1451
1452 BXE_STATS_LOCK(sc);
1453 state = sc->stats_state;
1454 sc->stats_state = bxe_stats_stm[state][event].next_state;
1455 BXE_STATS_UNLOCK(sc);
1456
1457 bxe_stats_stm[state][event].action(sc);
1458
1459 if (event != STATS_EVENT_UPDATE) {
1460 BLOGD(sc, DBG_STATS,
1461 "state %d -> event %d -> state %d\n",
1462 state, event, sc->stats_state);
1463 }
1464}
1465
1466static void
1467bxe_port_stats_base_init(struct bxe_softc *sc)
1468{
1469 struct dmae_command *dmae;
1470 uint32_t *stats_comp = BXE_SP(sc, stats_comp);
1471
1472 /* sanity */
1473 if (!sc->port.pmf || !sc->port.port_stx) {
1474 BLOGE(sc, "BUG!\n");
1475 return;
1476 }
1477
1478 sc->executer_idx = 0;
1479
1480 dmae = BXE_SP(sc, dmae[sc->executer_idx++]);
1481 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC,
1482 TRUE, DMAE_COMP_PCI);
1483 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats));
1484 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats));
1485 dmae->dst_addr_lo = (sc->port.port_stx >> 2);
1486 dmae->dst_addr_hi = 0;
1487 dmae->len = bxe_get_port_stats_dma_len(sc);
1488 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp));
1489 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp));
1490 dmae->comp_val = DMAE_COMP_VAL;
1491
1492 *stats_comp = 0;
1493 bxe_hw_stats_post(sc);
1494 bxe_stats_comp(sc);
1495}
1496
1497/*
1498 * This function will prepare the statistics ramrod data the way
1499 * we will only have to increment the statistics counter and
1500 * send the ramrod each time we have to.
1501 */
1502static void
1503bxe_prep_fw_stats_req(struct bxe_softc *sc)
1504{
1505 int i;
1506 int first_queue_query_index;
1507 struct stats_query_header *stats_hdr = &sc->fw_stats_req->hdr;
1508 bus_addr_t cur_data_offset;
1509 struct stats_query_entry *cur_query_entry;
1510
1511 stats_hdr->cmd_num = sc->fw_stats_num;
1512 stats_hdr->drv_stats_counter = 0;
1513
1514 /*
1515 * The storm_counters struct contains the counters of completed
1516 * statistics requests per storm which are incremented by FW
1517 * each time it completes hadning a statistics ramrod. We will
1518 * check these counters in the timer handler and discard a
1519 * (statistics) ramrod completion.
1520 */
1521 cur_data_offset = (sc->fw_stats_data_mapping +
1522 offsetof(struct bxe_fw_stats_data, storm_counters));
1523
1524 stats_hdr->stats_counters_addrs.hi = htole32(U64_HI(cur_data_offset));
1525 stats_hdr->stats_counters_addrs.lo = htole32(U64_LO(cur_data_offset));
1526
1527 /*
1528 * Prepare the first stats ramrod (will be completed with
1529 * the counters equal to zero) - init counters to somethig different.
1530 */
1531 memset(&sc->fw_stats_data->storm_counters, 0xff,
1532 sizeof(struct stats_counter));
1533
1534 /**** Port FW statistics data ****/
1535 cur_data_offset = (sc->fw_stats_data_mapping +
1536 offsetof(struct bxe_fw_stats_data, port));
1537
1538 cur_query_entry = &sc->fw_stats_req->query[BXE_PORT_QUERY_IDX];
1539
1540 cur_query_entry->kind = STATS_TYPE_PORT;
1541 /* For port query index is a DONT CARE */
1542 cur_query_entry->index = SC_PORT(sc);
1543 /* For port query funcID is a DONT CARE */
1544 cur_query_entry->funcID = htole16(SC_FUNC(sc));
1545 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset));
1546 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset));
1547
1548 /**** PF FW statistics data ****/
1549 cur_data_offset = (sc->fw_stats_data_mapping +
1550 offsetof(struct bxe_fw_stats_data, pf));
1551
1552 cur_query_entry = &sc->fw_stats_req->query[BXE_PF_QUERY_IDX];
1553
1554 cur_query_entry->kind = STATS_TYPE_PF;
1555 /* For PF query index is a DONT CARE */
1556 cur_query_entry->index = SC_PORT(sc);
1557 cur_query_entry->funcID = htole16(SC_FUNC(sc));
1558 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset));
1559 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset));
1560
1561 /**** Clients' queries ****/
1562 cur_data_offset = (sc->fw_stats_data_mapping +
1563 offsetof(struct bxe_fw_stats_data, queue_stats));
1564
1565 /*
1566 * First queue query index depends whether FCoE offloaded request will
1567 * be included in the ramrod
1568 */
1569 first_queue_query_index = (BXE_FIRST_QUEUE_QUERY_IDX - 1);
1570
1571 for (i = 0; i < sc->num_queues; i++) {
1572 cur_query_entry =
1573 &sc->fw_stats_req->query[first_queue_query_index + i];
1574
1575 cur_query_entry->kind = STATS_TYPE_QUEUE;
1576 cur_query_entry->index = bxe_stats_id(&sc->fp[i]);
1577 cur_query_entry->funcID = htole16(SC_FUNC(sc));
1578 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset));
1579 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset));
1580
1581 cur_data_offset += sizeof(struct per_queue_stats);
1582 }
1583}
1584
1585void
1586bxe_stats_init(struct bxe_softc *sc)
1587{
1588 int /*abs*/port = SC_PORT(sc);
1589 int mb_idx = SC_FW_MB_IDX(sc);
1590 int i;
1591
1592 sc->stats_pending = 0;
1593 sc->executer_idx = 0;
1594 sc->stats_counter = 0;
1595
1596 /* port and func stats for management */
1597 if (!BXE_NOMCP(sc)) {
1598 sc->port.port_stx = SHMEM_RD(sc, port_mb[port].port_stx);
1599 sc->func_stx = SHMEM_RD(sc, func_mb[mb_idx].fw_mb_param);
1600 } else {
1601 sc->port.port_stx = 0;
1602 sc->func_stx = 0;
1603 }
1604
1605 BLOGD(sc, DBG_STATS, "port_stx 0x%x func_stx 0x%x\n",
1606 sc->port.port_stx, sc->func_stx);
1607
1608 /* pmf should retrieve port statistics from SP on a non-init*/
1609 if (!sc->stats_init && sc->port.pmf && sc->port.port_stx) {
1610 bxe_stats_handle(sc, STATS_EVENT_PMF);
1611 }
1612
1613 port = SC_PORT(sc);
1614 /* port stats */
1615 memset(&(sc->port.old_nig_stats), 0, sizeof(struct nig_stats));
1616 sc->port.old_nig_stats.brb_discard =
1617 REG_RD(sc, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1618 sc->port.old_nig_stats.brb_truncate =
1619 REG_RD(sc, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1620 if (!CHIP_IS_E3(sc)) {
1621 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1622 &(sc->port.old_nig_stats.egress_mac_pkt0_lo), 2);
1623 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1624 &(sc->port.old_nig_stats.egress_mac_pkt1_lo), 2);
1625 }
1626
1627 /* function stats */
1628 for (i = 0; i < sc->num_queues; i++) {
1629 memset(&sc->fp[i].old_tclient, 0, sizeof(sc->fp[i].old_tclient));
1630 memset(&sc->fp[i].old_uclient, 0, sizeof(sc->fp[i].old_uclient));
1631 memset(&sc->fp[i].old_xclient, 0, sizeof(sc->fp[i].old_xclient));
1632 if (sc->stats_init) {
1633 memset(&sc->fp[i].eth_q_stats, 0,
1634 sizeof(sc->fp[i].eth_q_stats));
1635 memset(&sc->fp[i].eth_q_stats_old, 0,
1636 sizeof(sc->fp[i].eth_q_stats_old));
1637 }
1638 }
1639
1640 /* prepare statistics ramrod data */
1641 bxe_prep_fw_stats_req(sc);
1642
1643 if (sc->stats_init) {
1644 memset(&sc->net_stats_old, 0, sizeof(sc->net_stats_old));
1645 memset(&sc->fw_stats_old, 0, sizeof(sc->fw_stats_old));
1646 memset(&sc->eth_stats_old, 0, sizeof(sc->eth_stats_old));
1647 memset(&sc->eth_stats, 0, sizeof(sc->eth_stats));
1648 memset(&sc->func_stats, 0, sizeof(sc->func_stats));
1649
1650 /* Clean SP from previous statistics */
1651 if (sc->func_stx) {
1652 memset(BXE_SP(sc, func_stats), 0, sizeof(struct host_func_stats));
1653 bxe_func_stats_init(sc);
1654 bxe_hw_stats_post(sc);
1655 bxe_stats_comp(sc);
1656 }
1657 }
1658
1659 sc->stats_state = STATS_STATE_DISABLED;
1660
1661 if (sc->port.pmf && sc->port.port_stx) {
1662 bxe_port_stats_base_init(sc);
1663 }
1664
1665 /* mark the end of statistics initializiation */
1666 sc->stats_init = FALSE;
1667}
1668
1669void
1670bxe_save_statistics(struct bxe_softc *sc)
1671{
1672 int i;
1673
1674 /* save queue statistics */
1675 for (i = 0; i < sc->num_queues; i++) {
1676 struct bxe_fastpath *fp = &sc->fp[i];
1677 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats;
1678 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old;
1679
1680 UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
1681 UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
1682 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
1683 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
1684 UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
1685 UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
1686 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
1687 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
1688 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
1689 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
1690 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
1691 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
1692 UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
1693 UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
1694 }
1695
1696 /* store port firmware statistics */
1697 if (sc->port.pmf) {
1698 struct bxe_eth_stats *estats = &sc->eth_stats;
1699 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old;
1700 struct host_port_stats *pstats = BXE_SP(sc, port_stats);
1701
1702 fwstats->pfc_frames_rx_hi = pstats->pfc_frames_rx_hi;
1703 fwstats->pfc_frames_rx_lo = pstats->pfc_frames_rx_lo;
1704 fwstats->pfc_frames_tx_hi = pstats->pfc_frames_tx_hi;
1705 fwstats->pfc_frames_tx_lo = pstats->pfc_frames_tx_lo;
1706
1707 if (IS_MF(sc)) {
1708 UPDATE_FW_STAT_OLD(mac_filter_discard);
1709 UPDATE_FW_STAT_OLD(mf_tag_discard);
1710 UPDATE_FW_STAT_OLD(brb_truncate_discard);
1711 UPDATE_FW_STAT_OLD(mac_discard);
1712 }
1713 }
1714}
1715
1716void
1717bxe_afex_collect_stats(struct bxe_softc *sc,
1718 void *void_afex_stats,
1719 uint32_t stats_type)
1720{
1721 int i;
1722 struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
1723 struct bxe_eth_stats *estats = &sc->eth_stats;
1724
1725 memset(afex_stats, 0, sizeof(struct afex_stats));
1726
1727 for (i = 0; i < sc->num_queues; i++) {
1728 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats;
1729
1730 ADD_64(afex_stats->rx_unicast_bytes_hi,
1731 qstats->total_unicast_bytes_received_hi,
1732 afex_stats->rx_unicast_bytes_lo,
1733 qstats->total_unicast_bytes_received_lo);
1734
1735 ADD_64(afex_stats->rx_broadcast_bytes_hi,
1736 qstats->total_broadcast_bytes_received_hi,
1737 afex_stats->rx_broadcast_bytes_lo,
1738 qstats->total_broadcast_bytes_received_lo);
1739
1740 ADD_64(afex_stats->rx_multicast_bytes_hi,
1741 qstats->total_multicast_bytes_received_hi,
1742 afex_stats->rx_multicast_bytes_lo,
1743 qstats->total_multicast_bytes_received_lo);
1744
1745 ADD_64(afex_stats->rx_unicast_frames_hi,
1746 qstats->total_unicast_packets_received_hi,
1747 afex_stats->rx_unicast_frames_lo,
1748 qstats->total_unicast_packets_received_lo);
1749
1750 ADD_64(afex_stats->rx_broadcast_frames_hi,
1751 qstats->total_broadcast_packets_received_hi,
1752 afex_stats->rx_broadcast_frames_lo,
1753 qstats->total_broadcast_packets_received_lo);
1754
1755 ADD_64(afex_stats->rx_multicast_frames_hi,
1756 qstats->total_multicast_packets_received_hi,
1757 afex_stats->rx_multicast_frames_lo,
1758 qstats->total_multicast_packets_received_lo);
1759
1760 /*
1761 * sum to rx_frames_discarded all discarded
1762 * packets due to size, ttl0 and checksum
1763 */
1764 ADD_64(afex_stats->rx_frames_discarded_hi,
1765 qstats->total_packets_received_checksum_discarded_hi,
1766 afex_stats->rx_frames_discarded_lo,
1767 qstats->total_packets_received_checksum_discarded_lo);
1768
1769 ADD_64(afex_stats->rx_frames_discarded_hi,
1770 qstats->total_packets_received_ttl0_discarded_hi,
1771 afex_stats->rx_frames_discarded_lo,
1772 qstats->total_packets_received_ttl0_discarded_lo);
1773
1774 ADD_64(afex_stats->rx_frames_discarded_hi,
1775 qstats->etherstatsoverrsizepkts_hi,
1776 afex_stats->rx_frames_discarded_lo,
1777 qstats->etherstatsoverrsizepkts_lo);
1778
1779 ADD_64(afex_stats->rx_frames_dropped_hi,
1780 qstats->no_buff_discard_hi,
1781 afex_stats->rx_frames_dropped_lo,
1782 qstats->no_buff_discard_lo);
1783
1784 ADD_64(afex_stats->tx_unicast_bytes_hi,
1785 qstats->total_unicast_bytes_transmitted_hi,
1786 afex_stats->tx_unicast_bytes_lo,
1787 qstats->total_unicast_bytes_transmitted_lo);
1788
1789 ADD_64(afex_stats->tx_broadcast_bytes_hi,
1790 qstats->total_broadcast_bytes_transmitted_hi,
1791 afex_stats->tx_broadcast_bytes_lo,
1792 qstats->total_broadcast_bytes_transmitted_lo);
1793
1794 ADD_64(afex_stats->tx_multicast_bytes_hi,
1795 qstats->total_multicast_bytes_transmitted_hi,
1796 afex_stats->tx_multicast_bytes_lo,
1797 qstats->total_multicast_bytes_transmitted_lo);
1798
1799 ADD_64(afex_stats->tx_unicast_frames_hi,
1800 qstats->total_unicast_packets_transmitted_hi,
1801 afex_stats->tx_unicast_frames_lo,
1802 qstats->total_unicast_packets_transmitted_lo);
1803
1804 ADD_64(afex_stats->tx_broadcast_frames_hi,
1805 qstats->total_broadcast_packets_transmitted_hi,
1806 afex_stats->tx_broadcast_frames_lo,
1807 qstats->total_broadcast_packets_transmitted_lo);
1808
1809 ADD_64(afex_stats->tx_multicast_frames_hi,
1810 qstats->total_multicast_packets_transmitted_hi,
1811 afex_stats->tx_multicast_frames_lo,
1812 qstats->total_multicast_packets_transmitted_lo);
1813
1814 ADD_64(afex_stats->tx_frames_dropped_hi,
1815 qstats->total_transmitted_dropped_packets_error_hi,
1816 afex_stats->tx_frames_dropped_lo,
1817 qstats->total_transmitted_dropped_packets_error_lo);
1818 }
1819
1820 /*
1821 * If port stats are requested, add them to the PMF
1822 * stats, as anyway they will be accumulated by the
1823 * MCP before sent to the switch
1824 */
1825 if ((sc->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
1826 ADD_64(afex_stats->rx_frames_dropped_hi,
1827 0,
1828 afex_stats->rx_frames_dropped_lo,
1829 estats->mac_filter_discard);
1830 ADD_64(afex_stats->rx_frames_dropped_hi,
1831 0,
1832 afex_stats->rx_frames_dropped_lo,
1833 estats->brb_truncate_discard);
1834 ADD_64(afex_stats->rx_frames_discarded_hi,
1835 0,
1836 afex_stats->rx_frames_discarded_lo,
1837 estats->mac_discard);
1838 }
1839}
1840