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if_bwnvar.h (299110) if_bwnvar.h (299790)
1/*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 12 unchanged lines hidden (view full) ---

21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 *
1/*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 12 unchanged lines hidden (view full) ---

21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 *
29 * $FreeBSD: head/sys/dev/bwn/if_bwnvar.h 299110 2016-05-05 07:04:38Z adrian $
29 * $FreeBSD: head/sys/dev/bwn/if_bwnvar.h 299790 2016-05-14 23:38:21Z adrian $
30 */
31
32#ifndef _IF_BWNVAR_H
33#define _IF_BWNVAR_H
34
35struct siba_dev_softc;
36struct bwn_softc;
37struct bwn_mac;

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53#define BWN_GETTIME(v) do { \
54 struct timespec ts; \
55 nanouptime(&ts); \
56 (v) = ts.tv_nsec / 1000000 + ts.tv_sec * 1000; \
57} while (0)
58#define BWN_ISOLDFMT(mac) ((mac)->mac_fw.rev <= 351)
59#define BWN_TSSI2DBM(num, den) \
60 ((int32_t)((num < 0) ? num / den : (num + den / 2) / den))
30 */
31
32#ifndef _IF_BWNVAR_H
33#define _IF_BWNVAR_H
34
35struct siba_dev_softc;
36struct bwn_softc;
37struct bwn_mac;

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53#define BWN_GETTIME(v) do { \
54 struct timespec ts; \
55 nanouptime(&ts); \
56 (v) = ts.tv_nsec / 1000000 + ts.tv_sec * 1000; \
57} while (0)
58#define BWN_ISOLDFMT(mac) ((mac)->mac_fw.rev <= 351)
59#define BWN_TSSI2DBM(num, den) \
60 ((int32_t)((num < 0) ? num / den : (num + den / 2) / den))
61#define BWN_HDRSIZE(mac) \
62 ((BWN_ISOLDFMT(mac)) ? (100 + sizeof(struct bwn_plcp6)) : \
63 (104 + sizeof(struct bwn_plcp6)))
61#define BWN_HDRSIZE(mac) bwn_tx_hdrsize(mac)
62
64#define BWN_PIO_COOKIE(tq, tp) \
65 ((uint16_t)((((uint16_t)tq->tq_index + 1) << 12) | tp->tp_index))
66#define BWN_DMA_COOKIE(dr, slot) \
67 ((uint16_t)(((uint16_t)dr->dr_index + 1) << 12) | (uint16_t)slot)
68#define BWN_READ_2(mac, o) (siba_read_2(mac->mac_sc->sc_dev, o))
69#define BWN_READ_4(mac, o) (siba_read_4(mac->mac_sc->sc_dev, o))
70#define BWN_WRITE_2(mac, o, v) \
71 (siba_write_2(mac->mac_sc->sc_dev, o, v))
63#define BWN_PIO_COOKIE(tq, tp) \
64 ((uint16_t)((((uint16_t)tq->tq_index + 1) << 12) | tp->tp_index))
65#define BWN_DMA_COOKIE(dr, slot) \
66 ((uint16_t)(((uint16_t)dr->dr_index + 1) << 12) | (uint16_t)slot)
67#define BWN_READ_2(mac, o) (siba_read_2(mac->mac_sc->sc_dev, o))
68#define BWN_READ_4(mac, o) (siba_read_4(mac->mac_sc->sc_dev, o))
69#define BWN_WRITE_2(mac, o, v) \
70 (siba_write_2(mac->mac_sc->sc_dev, o, v))
71#define BWN_WRITE_2_F(mac, o, v) do { \
72 (BWN_WRITE_2(mac, o, v)); \
73 BWN_READ_2(mac, o); \
74} while(0)
75#define BWN_WRITE_SETMASK2(mac, offset, mask, set) \
76 BWN_WRITE_2(mac, offset, (BWN_READ_2(mac, offset) & mask) | set)
72#define BWN_WRITE_4(mac, o, v) \
73 (siba_write_4(mac->mac_sc->sc_dev, o, v))
77#define BWN_WRITE_4(mac, o, v) \
78 (siba_write_4(mac->mac_sc->sc_dev, o, v))
79#define BWN_WRITE_SETMASK4(mac, offset, mask, set) \
80 BWN_WRITE_4(mac, offset, (BWN_READ_4(mac, offset) & mask) | set)
74#define BWN_PIO_TXQOFFSET(mac) \
75 ((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x18 : 0)
76#define BWN_PIO_RXQOFFSET(mac) \
77 ((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x38 : 8)
78#define BWN_SEC_NEWAPI(mac) (mac->mac_fw.rev >= 351)
79#define BWN_SEC_KEY2FW(mac, idx) \
80 (BWN_SEC_NEWAPI(mac) ? idx : ((idx >= 4) ? idx - 4 : idx))
81#define BWN_RF_READ(mac, r) (mac->mac_phy.rf_read(mac, r))

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144 rate == BWN_CCK_RATE_5MB || rate == BWN_CCK_RATE_11MB)
145#define BWN_ISOFDMRATE(rate) (!BWN_ISCCKRATE(rate))
146#define BWN_BARRIER(mac, flags) siba_barrier(mac->mac_sc->sc_dev, flags)
147#define BWN_DMA_READ(dr, offset) \
148 (BWN_READ_4(dr->dr_mac, dr->dr_base + offset))
149#define BWN_DMA_WRITE(dr, offset, value) \
150 (BWN_WRITE_4(dr->dr_mac, dr->dr_base + offset, value))
151
81#define BWN_PIO_TXQOFFSET(mac) \
82 ((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x18 : 0)
83#define BWN_PIO_RXQOFFSET(mac) \
84 ((siba_get_revid(mac->mac_sc->sc_dev) >= 11) ? 0x38 : 8)
85#define BWN_SEC_NEWAPI(mac) (mac->mac_fw.rev >= 351)
86#define BWN_SEC_KEY2FW(mac, idx) \
87 (BWN_SEC_NEWAPI(mac) ? idx : ((idx >= 4) ? idx - 4 : idx))
88#define BWN_RF_READ(mac, r) (mac->mac_phy.rf_read(mac, r))

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151 rate == BWN_CCK_RATE_5MB || rate == BWN_CCK_RATE_11MB)
152#define BWN_ISOFDMRATE(rate) (!BWN_ISCCKRATE(rate))
153#define BWN_BARRIER(mac, flags) siba_barrier(mac->mac_sc->sc_dev, flags)
154#define BWN_DMA_READ(dr, offset) \
155 (BWN_READ_4(dr->dr_mac, dr->dr_base + offset))
156#define BWN_DMA_WRITE(dr, offset, value) \
157 (BWN_WRITE_4(dr->dr_mac, dr->dr_base + offset, value))
158
159
160typedef enum {
161 BWN_PHY_BAND_2G = 0,
162 BWN_PHY_BAND_5G_LO = 1,
163 BWN_PHY_BAND_5G_MI = 2,
164 BWN_PHY_BAND_5G_HI = 3
165} bwn_phy_band_t;
166
167typedef enum {
168 BWN_BAND_2G,
169 BWN_BAND_5G,
170} bwn_band_t;
171
172typedef enum {
173 BWN_CHAN_TYPE_20,
174 BWN_CHAN_TYPE_20_HT,
175 BWN_CHAN_TYPE_40_HT_U,
176 BWN_CHAN_TYPE_40_HT_D,
177} bwn_chan_type_t;
178
152struct bwn_rate {
153 uint16_t rateid;
154 uint32_t flags;
155};
156
157#define BWN_ANT0 0
158#define BWN_ANT1 1
159#define BWN_ANTAUTO0 2

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200
201#define BWN_DC_LT_SIZE 32
202
203struct bwn_loctl {
204 int8_t i;
205 int8_t q;
206};
207
179struct bwn_rate {
180 uint16_t rateid;
181 uint32_t flags;
182};
183
184#define BWN_ANT0 0
185#define BWN_ANT1 1
186#define BWN_ANTAUTO0 2

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227
228#define BWN_DC_LT_SIZE 32
229
230struct bwn_loctl {
231 int8_t i;
232 int8_t q;
233};
234
235typedef enum {
236 BWN_TXPWR_RES_NEED_ADJUST,
237 BWN_TXPWR_RES_DONE,
238} bwn_txpwr_result_t;
239
208struct bwn_lo_calib {
209 struct bwn_bbatt bbatt;
210 struct bwn_rfatt rfatt;
211 struct bwn_loctl ctl;
212 unsigned long calib_time;
213 TAILQ_ENTRY(bwn_lo_calib) list;
214};
215

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222 uint8_t rssi;
223 uint8_t sig_qual;
224 } __packed abg;
225 struct {
226 int8_t power0;
227 int8_t power1;
228 } __packed n;
229 } __packed phy;
240struct bwn_lo_calib {
241 struct bwn_bbatt bbatt;
242 struct bwn_rfatt rfatt;
243 struct bwn_loctl ctl;
244 unsigned long calib_time;
245 TAILQ_ENTRY(bwn_lo_calib) list;
246};
247

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254 uint8_t rssi;
255 uint8_t sig_qual;
256 } __packed abg;
257 struct {
258 int8_t power0;
259 int8_t power1;
260 } __packed n;
261 } __packed phy;
230 uint16_t phy_status2;
262 union {
263 struct {
264 int8_t power2;
265 uint8_t pad;
266 } __packed n;
267 struct {
268 uint8_t pad;
269 int8_t ht_power0;
270 } __packed ht;
271 uint16_t phy_status2;
272 } __packed ps2;
231 uint16_t phy_status3;
232 uint32_t mac_status;
233 uint16_t mac_time;
234 uint16_t channel;
235} __packed;
236
237struct bwn_txstatus {
238 uint16_t cookie;

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309 uint16_t pg_ofdmtab_addr;
310 unsigned pg_ofdmtab_dir;
311};
312
313#define BWN_IMMODE_NONE 0
314#define BWN_IMMODE_NONWLAN 1
315#define BWN_IMMODE_MANUAL 2
316#define BWN_IMMODE_AUTO 3
273 uint16_t phy_status3;
274 uint32_t mac_status;
275 uint16_t mac_time;
276 uint16_t channel;
277} __packed;
278
279struct bwn_txstatus {
280 uint16_t cookie;

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351 uint16_t pg_ofdmtab_addr;
352 unsigned pg_ofdmtab_dir;
353};
354
355#define BWN_IMMODE_NONE 0
356#define BWN_IMMODE_NONWLAN 1
357#define BWN_IMMODE_MANUAL 2
358#define BWN_IMMODE_AUTO 3
317#define BWN_TXPWR_RES_NEED_ADJUST 0
318#define BWN_TXPWR_RES_DONE 1
319
320#define BWN_PHYLP_TXPCTL_UNKNOWN 0
321#define BWN_PHYLP_TXPCTL_OFF 1
322#define BWN_PHYLP_TXPCTL_ON_SW 2
323#define BWN_PHYLP_TXPCTL_ON_HW 3
324
325struct bwn_phy_lp {
326 uint8_t plp_chan;

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391
392struct bwn_b206x_rfinit_entry {
393 uint16_t br_offset;
394 uint16_t br_valuea;
395 uint16_t br_valueg;
396 uint8_t br_flags;
397};
398
359
360#define BWN_PHYLP_TXPCTL_UNKNOWN 0
361#define BWN_PHYLP_TXPCTL_OFF 1
362#define BWN_PHYLP_TXPCTL_ON_SW 2
363#define BWN_PHYLP_TXPCTL_ON_HW 3
364
365struct bwn_phy_lp {
366 uint8_t plp_chan;

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431
432struct bwn_b206x_rfinit_entry {
433 uint16_t br_offset;
434 uint16_t br_valuea;
435 uint16_t br_valueg;
436 uint8_t br_flags;
437};
438
439struct bwn_phy_n;
440
399struct bwn_phy {
400 uint8_t type;
401 uint8_t rev;
402 uint8_t analog;
403
404 int supports_2ghz;
405 int supports_5ghz;
406
407 int gmode;
408 struct bwn_phy_g phy_g;
409 struct bwn_phy_lp phy_lp;
410
441struct bwn_phy {
442 uint8_t type;
443 uint8_t rev;
444 uint8_t analog;
445
446 int supports_2ghz;
447 int supports_5ghz;
448
449 int gmode;
450 struct bwn_phy_g phy_g;
451 struct bwn_phy_lp phy_lp;
452
453 /*
454 * I'd like the newer PHY code to not hide in the top-level
455 * structs..
456 */
457 struct bwn_phy_n *phy_n;
458
411 uint16_t rf_manuf;
412 uint16_t rf_ver;
413 uint8_t rf_rev;
414 int rf_on;
459 uint16_t rf_manuf;
460 uint16_t rf_ver;
461 uint8_t rf_rev;
462 int rf_on;
463 int phy_do_full_init;
415
416 int txpower;
417 int hwpctl;
418 unsigned long nexttime;
419 unsigned int chan;
420 int txerrors;
421
422 int (*attach)(struct bwn_mac *);

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436 int (*use_hwpctl)(struct bwn_mac *);
437 void (*rf_onoff)(struct bwn_mac *, int);
438 void (*switch_analog)(struct bwn_mac *, int);
439 int (*switch_channel)(struct bwn_mac *,
440 unsigned int);
441 uint32_t (*get_default_chan)(struct bwn_mac *);
442 void (*set_antenna)(struct bwn_mac *, int);
443 int (*set_im)(struct bwn_mac *, int);
464
465 int txpower;
466 int hwpctl;
467 unsigned long nexttime;
468 unsigned int chan;
469 int txerrors;
470
471 int (*attach)(struct bwn_mac *);

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485 int (*use_hwpctl)(struct bwn_mac *);
486 void (*rf_onoff)(struct bwn_mac *, int);
487 void (*switch_analog)(struct bwn_mac *, int);
488 int (*switch_channel)(struct bwn_mac *,
489 unsigned int);
490 uint32_t (*get_default_chan)(struct bwn_mac *);
491 void (*set_antenna)(struct bwn_mac *, int);
492 int (*set_im)(struct bwn_mac *, int);
444 int (*recalc_txpwr)(struct bwn_mac *, int);
493 bwn_txpwr_result_t (*recalc_txpwr)(struct bwn_mac *, int);
445 void (*set_txpwr)(struct bwn_mac *);
446 void (*task_15s)(struct bwn_mac *);
447 void (*task_60s)(struct bwn_mac *);
448};
449
450struct bwn_chan_band {
451 uint32_t flags;
452 uint8_t nchan;

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884 unsigned int mac_task_state;
885 struct task mac_intrtask;
886 struct task mac_hwreset;
887 struct task mac_txpower;
888
889 TAILQ_ENTRY(bwn_mac) mac_list;
890};
891
494 void (*set_txpwr)(struct bwn_mac *);
495 void (*task_15s)(struct bwn_mac *);
496 void (*task_60s)(struct bwn_mac *);
497};
498
499struct bwn_chan_band {
500 uint32_t flags;
501 uint8_t nchan;

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933 unsigned int mac_task_state;
934 struct task mac_intrtask;
935 struct task mac_hwreset;
936 struct task mac_txpower;
937
938 TAILQ_ENTRY(bwn_mac) mac_list;
939};
940
941static inline int
942bwn_tx_hdrsize(struct bwn_mac *mac)
943{
944 switch (mac->mac_fw.fw_hdr_format) {
945 case BWN_FW_HDR_598:
946 return (112 + (sizeof(struct bwn_plcp6)));
947 case BWN_FW_HDR_410:
948 return (104 + (sizeof(struct bwn_plcp6)));
949 case BWN_FW_HDR_351:
950 return (100 + (sizeof(struct bwn_plcp6)));
951 default:
952 printf("%s: unknown header format (%d)\n", __func__,
953 mac->mac_fw.fw_hdr_format);
954 return (112 + (sizeof(struct bwn_plcp6)));
955 }
956}
957
892/*
893 * Driver-specific vap state.
894 */
895struct bwn_vap {
896 struct ieee80211vap bv_vap; /* base class */
897 int (*bv_newstate)(struct ieee80211vap *,
898 enum ieee80211_state, int);
899};

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951#define BWN_LOCK_INIT(sc) \
952 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \
953 MTX_NETWORK_LOCK, MTX_DEF)
954#define BWN_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
955#define BWN_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
956#define BWN_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
957#define BWN_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
958
958/*
959 * Driver-specific vap state.
960 */
961struct bwn_vap {
962 struct ieee80211vap bv_vap; /* base class */
963 int (*bv_newstate)(struct ieee80211vap *,
964 enum ieee80211_state, int);
965};

--- 51 unchanged lines hidden (view full) ---

1017#define BWN_LOCK_INIT(sc) \
1018 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \
1019 MTX_NETWORK_LOCK, MTX_DEF)
1020#define BWN_LOCK_DESTROY(sc) mtx_destroy(&(sc)->sc_mtx)
1021#define BWN_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
1022#define BWN_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
1023#define BWN_ASSERT_LOCKED(sc) mtx_assert(&(sc)->sc_mtx, MA_OWNED)
1024
1025static inline bwn_band_t
1026bwn_channel_band(struct bwn_mac *mac, struct ieee80211_channel *c)
1027{
1028 if (IEEE80211_IS_CHAN_5GHZ(c))
1029 return BWN_BAND_5G;
1030 /* XXX check 2g, log error if not 2g or 5g? */
1031 return BWN_BAND_2G;
1032}
1033
1034static inline bwn_band_t
1035bwn_current_band(struct bwn_mac *mac)
1036{
1037 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1038 if (IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan))
1039 return BWN_BAND_5G;
1040 /* XXX check 2g, log error if not 2g or 5g? */
1041 return BWN_BAND_2G;
1042}
1043
1044static inline bool
1045bwn_is_40mhz(struct bwn_mac *mac)
1046{
1047 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1048
1049 return !! (IEEE80211_IS_CHAN_HT40(ic->ic_curchan));
1050}
1051
1052static inline int
1053bwn_get_centre_freq(struct bwn_mac *mac)
1054{
1055
1056 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1057 /* XXX TODO: calculate correctly for HT40 mode */
1058 return ic->ic_curchan->ic_freq;
1059}
1060
1061static inline int
1062bwn_get_chan_centre_freq(struct bwn_mac *mac, struct ieee80211_channel *chan)
1063{
1064
1065 /* XXX TODO: calculate correctly for HT40 mode */
1066 return chan->ic_freq;
1067}
1068
1069static inline int
1070bwn_get_chan(struct bwn_mac *mac)
1071{
1072
1073 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1074 /* XXX TODO: calculate correctly for HT40 mode */
1075 return ic->ic_curchan->ic_ieee;
1076}
1077
1078static inline struct ieee80211_channel *
1079bwn_get_channel(struct bwn_mac *mac)
1080{
1081
1082 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1083 return ic->ic_curchan;
1084}
1085
1086static inline bool
1087bwn_is_chan_passive(struct bwn_mac *mac)
1088{
1089
1090 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1091 return !! IEEE80211_IS_CHAN_PASSIVE(ic->ic_curchan);
1092}
1093
1094static inline bwn_chan_type_t
1095bwn_get_chan_type(struct bwn_mac *mac, struct ieee80211_channel *c)
1096{
1097 struct ieee80211com *ic = &mac->mac_sc->sc_ic;
1098 if (c == NULL)
1099 c = ic->ic_curchan;
1100 if (IEEE80211_IS_CHAN_HT40U(c))
1101 return BWN_CHAN_TYPE_40_HT_U;
1102 else if (IEEE80211_IS_CHAN_HT40D(c))
1103 return BWN_CHAN_TYPE_40_HT_D;
1104 else if (IEEE80211_IS_CHAN_HT20(c))
1105 return BWN_CHAN_TYPE_20_HT;
1106 else
1107 return BWN_CHAN_TYPE_20;
1108}
1109
1110static inline int
1111bwn_get_chan_power(struct bwn_mac *mac, struct ieee80211_channel *c)
1112{
1113
1114 /* return in dbm */
1115 return c->ic_maxpower / 2;
1116}
1117
1118/*
1119 * For now there's no bhnd bus support. Places where it matters
1120 * should call this routine so we can start logging things.
1121 */
1122static inline int
1123bwn_is_bus_siba(struct bwn_mac *mac)
1124{
1125
1126 return 1;
1127}
959#endif /* !_IF_BWNVAR_H */
1128#endif /* !_IF_BWNVAR_H */